Lines Matching refs:e1e_wphy

1006 		ret_val = e1e_wphy(hw, I217_INBAND_CTRL, reg);  in e1000_k1_workaround_lpt_lp()
1674 e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg); in e1000_check_for_copper_link_ich8lan()
2504 ret_val = e1e_wphy(hw, HV_KMRN_MODE_CTRL, data); in e1000_set_mdio_slow_mode_hv()
2534 ret_val = e1e_wphy(hw, PHY_REG(769, 25), 0x4431); in e1000_hv_phy_workarounds_ich8lan()
2539 ret_val = e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, 0xA204); in e1000_hv_phy_workarounds_ich8lan()
2550 ret_val = e1e_wphy(hw, MII_BMCR, 0x3140); in e1000_hv_phy_workarounds_ich8lan()
2649 ret_val = e1e_wphy(hw, PHY_REG(769, 20), phy_reg | BIT(14)); in e1000_lv_jumbo_workaround_ich8lan()
2715 ret_val = e1e_wphy(hw, PHY_REG(769, 23), data); in e1000_lv_jumbo_workaround_ich8lan()
2720 ret_val = e1e_wphy(hw, PHY_REG(769, 16), data); in e1000_lv_jumbo_workaround_ich8lan()
2726 ret_val = e1e_wphy(hw, PHY_REG(776, 20), data); in e1000_lv_jumbo_workaround_ich8lan()
2729 ret_val = e1e_wphy(hw, PHY_REG(776, 23), 0xF100); in e1000_lv_jumbo_workaround_ich8lan()
2733 ret_val = e1e_wphy(hw, HV_PM_CTRL, data | BIT(10)); in e1000_lv_jumbo_workaround_ich8lan()
2772 ret_val = e1e_wphy(hw, PHY_REG(769, 23), data); in e1000_lv_jumbo_workaround_ich8lan()
2777 ret_val = e1e_wphy(hw, PHY_REG(769, 16), data); in e1000_lv_jumbo_workaround_ich8lan()
2783 ret_val = e1e_wphy(hw, PHY_REG(776, 20), data); in e1000_lv_jumbo_workaround_ich8lan()
2786 ret_val = e1e_wphy(hw, PHY_REG(776, 23), 0x7E00); in e1000_lv_jumbo_workaround_ich8lan()
2790 ret_val = e1e_wphy(hw, HV_PM_CTRL, data & ~BIT(10)); in e1000_lv_jumbo_workaround_ich8lan()
2796 return e1e_wphy(hw, PHY_REG(769, 20), phy_reg & ~BIT(14)); in e1000_lv_jumbo_workaround_ich8lan()
2863 ret_val = e1e_wphy(hw, HV_PM_CTRL, pm_phy_reg); in e1000_k1_workaround_lv()
2970 e1e_wphy(hw, BM_PORT_GEN_CFG, reg); in e1000_post_phy_reset_ich8lan()
3053 return e1e_wphy(hw, HV_OEM_BITS, oem_reg); in e1000_set_lplu_state_pchlan()
3099 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data); in e1000_set_d0_lplu_state_ich8lan()
3121 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_ich8lan()
3132 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_ich8lan()
3183 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state_ich8lan()
3194 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state_ich8lan()
3220 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data); in e1000_set_d3_lplu_state_ich8lan()
4913 e1e_wphy(hw, BM_PORT_GEN_CFG, i); in e1000_init_hw_ich8lan()
5093 ret_val = e1e_wphy(hw, PHY_REG(BM_PORT_CTRL_PAGE, 27), in e1000_setup_link_ich8lan()
5175 ret_val = e1e_wphy(hw, IFE_PHY_MDIX_CONTROL, reg_data); in e1000_setup_copper_link_ich8lan()
5362 e1e_wphy(hw, IGP3_VR_CTRL, data | IGP3_VR_CTRL_MODE_SHUTDOWN); in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5613 return e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0); in e1000_cleanup_led_ich8lan()
5628 return e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, in e1000_led_on_ich8lan()
5644 return e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, in e1000_led_off_ich8lan()
5660 return e1e_wphy(hw, HV_LED_CONFIG, (u16)hw->mac.ledctl_mode1); in e1000_setup_led_pchlan()
5671 return e1e_wphy(hw, HV_LED_CONFIG, (u16)hw->mac.ledctl_default); in e1000_cleanup_led_pchlan()
5701 return e1e_wphy(hw, HV_LED_CONFIG, data); in e1000_led_on_pchlan()
5731 return e1e_wphy(hw, HV_LED_CONFIG, data); in e1000_led_off_pchlan()