Lines Matching +full:0 +full:xf0020000
86 static const u16 fec_enet_vlan_pri_to_queue[8] = {0, 0, 1, 1, 1, 2, 2, 2};
88 #define FEC_ENET_RSEM_V 0x84
90 #define FEC_ENET_RAEM_V 0x8
91 #define FEC_ENET_RAFL_V 0x8
92 #define FEC_ENET_OPD_V 0xFFF0
95 #define FEC_ENET_XDP_PASS 0
96 #define FEC_ENET_XDP_CONSUMED BIT(0)
186 .driver_data = 0,
209 module_param_array(macaddr, byte, NULL, 0);
218 #define FEC_FLASHMAC 0xf0006006
220 #define FEC_FLASHMAC 0xf0006000
222 #define FEC_FLASHMAC 0xf0020000
224 #define FEC_FLASHMAC (0xffe04000 + 4)
226 #define FEC_FLASHMAC 0xffc0406b
228 #define FEC_FLASHMAC 0
259 #define OPT_FRAME_SIZE 0
264 #define FEC_MMFR_ST_C45 (0)
268 #define FEC_MMFR_OP_ADDR_WRITE (0)
269 #define FEC_MMFR_PA(v) ((v & 0x1f) << 23)
270 #define FEC_MMFR_RA(v) ((v & 0x1f) << 18)
272 #define FEC_MMFR_DATA(v) (v & 0xffff)
274 #define FEC_ECR_RESET BIT(0)
281 #define FEC_RCR_LOOP BIT(0)
297 #define FEC_PAUSE_FLAG_AUTONEG 0x1
298 #define FEC_PAUSE_FLAG_ENABLE 0x2
299 #define FEC_WOL_HAS_MAGIC_PACKET (0x1 << 0)
300 #define FEC_WOL_FLAG_ENABLE (0x1 << 1)
301 #define FEC_WOL_FLAG_SLEEP_ON (0x1 << 2)
340 return entries >= 0 ? entries : entries + txq->bd.ring_size; in fec_enet_get_free_txdesc_num()
348 for (i = 0; i < len; i += 4, buf++) in swap_buffer()
357 int index = 0; in fec_dump()
362 txq = fep->tx_queue[0]; in fec_dump()
366 pr_info("%3u %c%c 0x%04x 0x%08x %4u %p\n", in fec_dump()
453 return 0; in fec_enet_clear_csum()
455 if (unlikely(skb_cow_head(skb, 0))) in fec_enet_clear_csum()
459 ip_hdr(skb)->check = 0; in fec_enet_clear_csum()
460 *(__sum16 *)(skb->head + skb->csum_start + skb->csum_offset) = 0; in fec_enet_clear_csum()
462 return 0; in fec_enet_clear_csum()
471 .order = 0, in fec_enet_create_page_pool()
489 err = xdp_rxq_info_reg(&rxq->xdp_rxq, fep->netdev, rxq->id, 0); in fec_enet_create_page_pool()
490 if (err < 0) in fec_enet_create_page_pool()
498 return 0; in fec_enet_create_page_pool()
519 unsigned int estatus = 0; in fec_enet_txq_submit_frag_skb()
526 for (frag = 0; frag < nr_frags; frag++) { in fec_enet_txq_submit_frag_skb()
553 ebdp->cbd_bdu = 0; in fec_enet_txq_submit_frag_skb()
589 for (i = 0; i < frag; i++) { in fec_enet_txq_submit_frag_skb()
607 unsigned int estatus = 0; in fec_enet_txq_submit_skb()
688 ebdp->cbd_bdu = 0; in fec_enet_txq_submit_skb()
717 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_submit_skb()
719 return 0; in fec_enet_txq_submit_skb()
731 unsigned int estatus = 0; in fec_enet_txq_put_data_tso()
764 ebdp->cbd_bdu = 0; in fec_enet_txq_put_data_tso()
779 return 0; in fec_enet_txq_put_data_tso()
793 unsigned int estatus = 0; in fec_enet_txq_put_hdr_tso()
827 ebdp->cbd_bdu = 0; in fec_enet_txq_put_hdr_tso()
833 return 0; in fec_enet_txq_put_hdr_tso()
844 unsigned int index = 0; in fec_enet_txq_submit_tso()
864 while (total_len > 0) { in fec_enet_txq_submit_tso()
873 tso_build_hdr(skb, hdr, &tso, data_left, total_len == 0); in fec_enet_txq_submit_tso()
878 while (data_left > 0) { in fec_enet_txq_submit_tso()
888 total_len == 0); in fec_enet_txq_submit_tso()
911 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_submit_tso()
913 return 0; in fec_enet_txq_submit_tso()
959 for (q = 0; q < fep->num_rx_queues; q++) { in fec_enet_bd_init()
964 for (i = 0; i < rxq->bd.ring_size; i++) { in fec_enet_bd_init()
970 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_bd_init()
981 for (q = 0; q < fep->num_tx_queues; q++) { in fec_enet_bd_init()
987 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_bd_init()
989 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_bd_init()
1012 page_pool_put_page(page->pp, page, 0, false); in fec_enet_bd_init()
1018 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_bd_init()
1034 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_active_rxring()
1035 writel(0, fep->rx_queue[i]->bd.reg_desc_active); in fec_enet_active_rxring()
1045 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_enable_ring()
1056 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_enable_ring()
1077 u32 rcntl = OPT_FRAME_SIZE | 0x04; in fec_restart()
1089 writel(0, fep->hwp + FEC_ECNTRL); in fec_restart()
1100 writel((__force u32)cpu_to_be32(temp_mac[0]), in fec_restart()
1106 writel((0xffffffff & ~FEC_ENET_MII), fep->hwp + FEC_IEVENT); in fec_restart()
1115 writel(0x04, fep->hwp + FEC_X_CNTRL); in fec_restart()
1118 rcntl |= 0x02; in fec_restart()
1119 writel(0x0, fep->hwp + FEC_X_CNTRL); in fec_restart()
1147 rcntl |= 0x40000000 | 0x00000020; in fec_restart()
1174 writel(0, fep->hwp + FEC_MIIGSK_ENR); in fec_restart()
1220 writel(0, fep->hwp + FEC_HASH_TABLE_HIGH); in fec_restart()
1221 writel(0, fep->hwp + FEC_HASH_TABLE_LOW); in fec_restart()
1243 writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT); in fec_restart()
1259 writel(0, fep->hwp + FEC_IMASK); in fec_restart()
1271 return 0; in fec_enet_ipc_handle_init()
1286 if (idx < 0) in fec_enet_ipg_stop_set()
1287 idx = 0; in fec_enet_ipg_stop_set()
1290 val = enabled ? 1 : 0; in fec_enet_ipg_stop_set()
1306 BIT(stop_gpr->bit), 0); in fec_enet_stop_mode()
1318 writel(0, fep->hwp + FEC_IMASK); in fec_irqs_disable()
1325 writel(0, fep->hwp + FEC_IMASK); in fec_irqs_disable_except_wakeup()
1353 writel(0, fep->hwp + FEC_ECNTRL); in fec_stop()
1424 memset(hwtstamps, 0, sizeof(*hwtstamps)); in fec_enet_hwtstamp()
1438 int index = 0; in fec_enet_tx_queue()
1470 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_tx_queue()
1475 * the "budget" is 0. Because NAPI is called with budget of in fec_enet_tx_queue()
1476 * 0 (such as netpoll) indicates we may be in an IRQ context, in fec_enet_tx_queue()
1493 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_tx_queue()
1551 /* The dma_sync_size = 0 as XDP_TX has already synced DMA for_device */ in fec_enet_tx_queue()
1552 page_pool_put_page(page->pp, page, 0, true); in fec_enet_tx_queue()
1580 readl(txq->bd.reg_desc_active) == 0) in fec_enet_tx_queue()
1581 writel(0, txq->bd.reg_desc_active); in fec_enet_tx_queue()
1590 for (i = fep->num_tx_queues - 1; i >= 0; i--) in fec_enet_tx()
1689 int pkt_received = 0; in fec_enet_rx_queue()
1693 int index = 0; in fec_enet_rx_queue()
1868 ebdp->cbd_prot = 0; in fec_enet_rx_queue()
1869 ebdp->cbd_bdu = 0; in fec_enet_rx_queue()
1884 writel(0, rxq->bd.reg_desc_active); in fec_enet_rx_queue()
1897 int i, done = 0; in fec_enet_rx()
1900 for (i = fep->num_rx_queues - 1; i >= 0; i--) in fec_enet_rx()
1917 return int_events != 0; in fec_enet_collect_events()
1932 writel(0, fep->hwp + FEC_IMASK); in fec_enet_interrupt()
1944 int done = 0; in fec_enet_rx_napi()
1970 * fec.macaddr=0x00,0x04,0x9f,0x01,0x30,0xe0 in fec_get_mac()
2007 *((__be32 *) &tmpaddr[0]) = in fec_get_mac()
2011 iap = &tmpaddr[0]; in fec_get_mac()
2023 return 0; in fec_get_mac()
2027 eth_hw_addr_gen(ndev, iap, iap == macaddr ? fep->dev_id : 0); in fec_get_mac()
2029 return 0; in fec_get_mac()
2058 sleep_cycle = 0; in fec_enet_eee_mode_set()
2059 wake_cycle = 0; in fec_enet_eee_mode_set()
2065 return 0; in fec_enet_eee_mode_set()
2072 int status_change = 0; in fec_enet_adjust_link()
2080 fep->link = 0; in fec_enet_adjust_link()
2144 int ret = 0, frame_start, frame_addr, frame_op; in fec_enet_mdio_read_c22()
2147 if (ret < 0) in fec_enet_mdio_read_c22()
2181 int ret = 0, frame_start, frame_op; in fec_enet_mdio_read_c45()
2184 if (ret < 0) in fec_enet_mdio_read_c45()
2192 FEC_MMFR_TA | (regnum & 0xFFFF), in fec_enet_mdio_read_c45()
2233 if (ret < 0) in fec_enet_mdio_write_c22()
2265 if (ret < 0) in fec_enet_mdio_write_c45()
2273 FEC_MMFR_TA | (regnum & 0xFFFF), in fec_enet_mdio_write_c45()
2365 return 0; in fec_enet_clk_enable()
2388 /* For rgmii tx internal delay, valid values are 0ps and 2000ps */ in fec_enet_parse_rgmii_delay()
2390 if (rgmii_tx_delay != 0 && rgmii_tx_delay != 2000) { in fec_enet_parse_rgmii_delay()
2391 dev_err(&fep->pdev->dev, "The only allowed RGMII TX delay values are: 0ps, 2000ps"); in fec_enet_parse_rgmii_delay()
2398 /* For rgmii rx internal delay, valid values are 0ps and 2000ps */ in fec_enet_parse_rgmii_delay()
2400 if (rgmii_rx_delay != 0 && rgmii_rx_delay != 2000) { in fec_enet_parse_rgmii_delay()
2401 dev_err(&fep->pdev->dev, "The only allowed RGMII RX delay values are: 0ps, 2000ps"); in fec_enet_parse_rgmii_delay()
2408 return 0; in fec_enet_parse_rgmii_delay()
2422 &fec_enet_adjust_link, 0, in fec_enet_mii_probe()
2430 for (phy_id = 0; (phy_id < PHY_MAX_ADDR); phy_id++) { in fec_enet_mii_probe()
2441 strscpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE); in fec_enet_mii_probe()
2442 phy_id = 0; in fec_enet_mii_probe()
2471 fep->link = 0; in fec_enet_mii_probe()
2472 fep->full_duplex = 0; in fec_enet_mii_probe()
2476 return 0; in fec_enet_mii_probe()
2508 if ((fep->quirks & FEC_QUIRK_SINGLE_MDIO) && fep->dev_id > 0) { in fec_enet_mii_init()
2513 return 0; in fec_enet_mii_init()
2553 * The HOLDTIME bitfield takes values between 0 and 7 (inclusive). in fec_enet_mii_init()
2568 * - mmfr[31:0]_not_zero & mscr[7:0]_is_zero & in fec_enet_mii_init()
2569 * mscr_reg_data_in[7:0] != 0 in fec_enet_mii_init()
2571 * - mscr[7:0]_not_zero in fec_enet_mii_init()
2573 writel(0, fep->hwp + FEC_MII_DATA); in fec_enet_mii_init()
2605 for (addr = 0; addr < PHY_MAX_ADDR; addr++) { in fec_enet_mii_init()
2617 return 0; in fec_enet_mii_init()
2628 if (--mii_cnt == 0) { in fec_enet_mii_remove()
2648 int s = 0; in fec_enet_get_regs_len()
2650 r = platform_get_resource(fep->pdev, IORESOURCE_MEM, 0); in fec_enet_get_regs_len()
2759 if (ret < 0) in fec_enet_get_regs()
2764 memset(buf, 0, regs->len); in fec_enet_get_regs()
2766 for (i = 0; i < reg_cnt; i++) { in fec_enet_get_regs()
2800 return 0; in fec_enet_get_ts_info()
2813 pause->autoneg = (fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) != 0; in fec_enet_get_pauseparam()
2814 pause->tx_pause = (fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) != 0; in fec_enet_get_pauseparam()
2832 fep->pause_flag = 0; in fec_enet_set_pauseparam()
2835 fep->pause_flag |= pause->rx_pause ? FEC_PAUSE_FLAG_ENABLE : 0; in fec_enet_set_pauseparam()
2836 fep->pause_flag |= pause->autoneg ? FEC_PAUSE_FLAG_AUTONEG : 0; in fec_enet_set_pauseparam()
2855 return 0; in fec_enet_set_pauseparam()
2927 "rx_xdp_redirect", /* RX_XDP_REDIRECT = 0, */
2941 for (i = 0; i < ARRAY_SIZE(fec_stats); i++) in fec_enet_update_ethtool_stats()
2947 u64 xdp_stats[XDP_STATS_TOTAL] = { 0 }; in fec_enet_get_xdp_stats()
2951 for (i = fep->num_rx_queues - 1; i >= 0; i--) { in fec_enet_get_xdp_stats()
2954 for (j = 0; j < XDP_STATS_TOTAL; j++) in fec_enet_get_xdp_stats()
2968 for (i = fep->num_rx_queues - 1; i >= 0; i--) { in fec_enet_page_pool_stats()
3004 for (i = 0; i < ARRAY_SIZE(fec_stats); i++) { in fec_enet_get_strings()
3007 for (i = 0; i < ARRAY_SIZE(fec_xdp_stat_strs); i++) { in fec_enet_get_strings()
3045 for (i = 0; i < ARRAY_SIZE(fec_stats); i++) in fec_enet_clear_ethtool_stats()
3046 writel(0, fep->hwp + fec_stats[i].offset); in fec_enet_clear_ethtool_stats()
3048 for (i = fep->num_rx_queues - 1; i >= 0; i--) { in fec_enet_clear_ethtool_stats()
3050 for (j = 0; j < XDP_STATS_TOTAL; j++) in fec_enet_clear_ethtool_stats()
3051 rxq->stats[j] = 0; in fec_enet_clear_ethtool_stats()
3055 writel(0, fep->hwp + FEC_MIB_CTRLSTAT); in fec_enet_clear_ethtool_stats()
3059 #define FEC_STATS_SIZE 0
3132 return 0; in fec_enet_get_coalesce()
3158 if (cycle > 0xFFFF) { in fec_enet_set_coalesce()
3164 if (cycle > 0xFFFF) { in fec_enet_set_coalesce()
3177 return 0; in fec_enet_set_coalesce()
3221 wol->wolopts = fep->wol_flag & FEC_WOL_FLAG_ENABLE ? WAKE_MAGIC : 0; in fec_enet_get_wol()
3223 wol->supported = wol->wolopts = 0; in fec_enet_get_wol()
3244 return 0; in fec_enet_set_wol()
3282 for (q = 0; q < fep->num_rx_queues; q++) { in fec_enet_free_buffers()
3284 for (i = 0; i < rxq->bd.ring_size; i++) in fec_enet_free_buffers()
3287 for (i = 0; i < XDP_STATS_TOTAL; i++) in fec_enet_free_buffers()
3288 rxq->stats[i] = 0; in fec_enet_free_buffers()
3296 for (q = 0; q < fep->num_tx_queues; q++) { in fec_enet_free_buffers()
3298 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_free_buffers()
3314 page_pool_put_page(page->pp, page, 0, false); in fec_enet_free_buffers()
3329 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_free_queue()
3337 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_free_queue()
3339 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_free_queue()
3347 int ret = 0; in fec_enet_alloc_queue()
3350 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_alloc_queue()
3373 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_alloc_queue()
3405 if (err < 0) { in fec_enet_alloc_rxq_buffers()
3410 for (i = 0; i < rxq->bd.ring_size; i++) { in fec_enet_alloc_rxq_buffers()
3433 return 0; in fec_enet_alloc_rxq_buffers()
3450 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_alloc_txq_buffers()
3455 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_alloc_txq_buffers()
3456 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_alloc_txq_buffers()
3470 return 0; in fec_enet_alloc_txq_buffers()
3482 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_alloc_buffers()
3486 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_alloc_buffers()
3489 return 0; in fec_enet_alloc_buffers()
3500 if (ret < 0) in fec_enet_open()
3545 cpu_latency_qos_add_request(&fep->pm_qos_req, 0); in fec_enet_open()
3554 return 0; in fec_enet_open()
3597 return 0; in fec_enet_close()
3618 unsigned int hash_high = 0, hash_low = 0; in set_multicast_list()
3622 tmp |= 0x8; in set_multicast_list()
3628 tmp &= ~0x8; in set_multicast_list()
3635 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH); in set_multicast_list()
3636 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW); in set_multicast_list()
3649 hash = (crc >> (32 - FEC_HASH_BITS)) & 0x3f; in set_multicast_list()
3680 return 0; in fec_set_mac_address()
3683 (ndev->dev_addr[1] << 16) | (ndev->dev_addr[0] << 24), in fec_set_mac_address()
3687 return 0; in fec_set_mac_address()
3726 return 0; in fec_set_features()
3733 u16 vlan_tag = 0; in fec_enet_select_queue()
3790 return 0; in fec_enet_bpf()
3803 if (unlikely(index < 0)) in fec_enet_xdp_get_tx_queue()
3804 return 0; in fec_enet_xdp_get_tx_queue()
3871 ebdp->cbd_bdu = 0; in fec_enet_txq_xmit_frame()
3895 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_xmit_frame()
3897 return 0; in fec_enet_txq_xmit_frame()
3931 unsigned int sent_frames = 0; in fec_enet_xdp_xmit()
3944 for (i = 0; i < num_frames; i++) { in fec_enet_xdp_xmit()
3945 if (fec_enet_txq_xmit_frame(fep, txq, frames[i], 0, true) < 0) in fec_enet_xdp_xmit()
3968 return 0; in fec_hwtstamp_get()
4029 fep->rx_align = 0xf; in fec_enet_init()
4030 fep->tx_align = 0xf; in fec_enet_init()
4032 fep->rx_align = 0x3; in fec_enet_init()
4033 fep->tx_align = 0x3; in fec_enet_init()
4042 if (ret < 0) { in fec_enet_init()
4067 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_init()
4083 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_init()
4122 fep->tx_align = 0; in fec_enet_init()
4123 fep->rx_align = 0x3f; in fec_enet_init()
4139 return 0; in fec_enet_init()
4158 int msec = 1, phy_post_delay = 0; in fec_reset_phy()
4163 return 0; in fec_reset_phy()
4182 return 0; in fec_reset_phy()
4189 gpiod_set_value_cansleep(phy_reset, 0); in fec_reset_phy()
4192 return 0; in fec_reset_phy()
4200 return 0; in fec_reset_phy()
4209 return 0; in fec_reset_phy()
4252 else if (irq_cnt <= 0) in fec_enet_get_irq_cnt()
4265 fep->wake_irq = fep->irq[0]; in fec_enet_get_wakeup_irq()
4273 int ret = 0; in fec_enet_init_stop_mode()
4275 gpr_np = of_parse_phandle(np, "fsl,stop-mode", 0); in fec_enet_init_stop_mode()
4277 return 0; in fec_enet_init_stop_mode()
4310 int i, irq, ret = 0; in fec_probe()
4351 fep->hwp = devm_platform_ioremap_resource(pdev, 0); in fec_probe()
4378 phy_node = of_parse_phandle(np, "phy-handle", 0); in fec_probe()
4381 if (ret < 0) { in fec_probe()
4496 for (i = 0; i < irq_cnt; i++) { in fec_probe()
4499 if (irq < 0) in fec_probe()
4501 if (irq < 0) { in fec_probe()
4506 0, pdev->name, ndev); in fec_probe()
4542 return 0; in fec_probe()
4586 if (ret < 0) in fec_drv_remove()
4605 if (ret >= 0) { in fec_drv_remove()
4637 if (fep->wake_irq > 0) { in fec_suspend()
4649 if (ret < 0) { in fec_suspend()
4664 fep->link = 0; in fec_suspend()
4666 return 0; in fec_suspend()
4716 return 0; in fec_resume()
4732 return 0; in fec_runtime_suspend()
4748 return 0; in fec_runtime_resume()