7 		     struct enetc_cbdr *cbdr)  in enetc_setup_cbdr()  argument
11 	cbdr->bd_base = dma_alloc_coherent(dev, size, &cbdr->bd_dma_base,  in enetc_setup_cbdr()
13 	if (!cbdr->bd_base)  in enetc_setup_cbdr()
17 	if (!IS_ALIGNED(cbdr->bd_dma_base, 128)) {  in enetc_setup_cbdr()
18 		dma_free_coherent(dev, size, cbdr->bd_base,  in enetc_setup_cbdr()
19 				  cbdr->bd_dma_base);  in enetc_setup_cbdr()
23 	cbdr->next_to_clean = 0;  in enetc_setup_cbdr()
24 	cbdr->next_to_use = 0;  in enetc_setup_cbdr()
25 	cbdr->dma_dev = dev;  in enetc_setup_cbdr()
26 	cbdr->bd_count = bd_count;  in enetc_setup_cbdr()
28 	cbdr->pir = hw->reg + ENETC_SICBDRPIR;  in enetc_setup_cbdr()
29 	cbdr->cir = hw->reg + ENETC_SICBDRCIR;  in enetc_setup_cbdr()
30 	cbdr->mr = hw->reg + ENETC_SICBDRMR;  in enetc_setup_cbdr()
36 	enetc_wr(hw, ENETC_SICBDRBAR0, lower_32_bits(cbdr->bd_dma_base));  in enetc_setup_cbdr()
37 	enetc_wr(hw, ENETC_SICBDRBAR1, upper_32_bits(cbdr->bd_dma_base));  in enetc_setup_cbdr()
38 	enetc_wr(hw, ENETC_SICBDRLENR, ENETC_RTBLENR_LEN(cbdr->bd_count));  in enetc_setup_cbdr()
40 	enetc_wr_reg(cbdr->pir, cbdr->next_to_clean);  in enetc_setup_cbdr()
41 	enetc_wr_reg(cbdr->cir, cbdr->next_to_use);  in enetc_setup_cbdr()
43 	enetc_wr_reg(cbdr->mr, BIT(31));  in enetc_setup_cbdr()
49 void enetc_teardown_cbdr(struct enetc_cbdr *cbdr)  in enetc_teardown_cbdr()  argument
51 	int size = cbdr->bd_count * sizeof(struct enetc_cbd);  in enetc_teardown_cbdr()
54 	enetc_wr_reg(cbdr->mr, 0);  in enetc_teardown_cbdr()
56 	dma_free_coherent(cbdr->dma_dev, size, cbdr->bd_base,  in enetc_teardown_cbdr()
57 			  cbdr->bd_dma_base);  in enetc_teardown_cbdr()
58 	cbdr->bd_base = NULL;  in enetc_teardown_cbdr()
59 	cbdr->dma_dev = NULL;  in enetc_teardown_cbdr()