Lines Matching +full:dma +full:- +full:write
1 /* Copyright, 1988-1992, Russell Nelson, Crynwr Software
13 along with this program; if not, write to the Free Software
18 #define PP_ChipID 0x0000 /* offset 0h -> Corp -ID */
19 /* offset 2h -> Model/Product Number */
20 /* offset 3h -> Chip Revision Number */
25 #define PP_CS8900_ISADMA 0x0024 /* ISA Rec DMA channel */
26 #define PP_CS8920_ISADMA 0x0374 /* ISA Rec DMA channel */
27 #define PP_ISASOF 0x0026 /* ISA DMA offset */
28 #define PP_DmaFrameCnt 0x0028 /* ISA DMA Frame count */
29 #define PP_DmaByteCnt 0x002A /* ISA DMA Byte count */
131 /* PP_RxCFG - Receive Configuration and Interrupt Mask bit definition - Read/write */
142 /* PP_RxCTL - Receive Control bit definition - Read/write */
153 /* Default receive mode - individually addressed, broadcast, and error free */
156 /* PP_TxCFG - Transmit Configuration Interrupt Mask bit definition - Read/write */
165 /* PP_TxCMD - Transmit Command bit definition - Read-only */
176 /* PP_BufCFG - Buffer Configuration Interrupt Mask bit definition - Read/write */
187 /* PP_LineCTL - Line Control bit definition - Read/write */
197 /* PP_SelfCTL - Software Self Control bit definition - Read/write */
207 /* PP_BusCTL - ISA Bus Control bit definition - Read/write */
215 /* PP_TestCTL - Test Control bit definition - Read/write */
223 /* PP_RxEvent - Receive Event Bit definition - Read-only */
236 /* PP_TxEvent - Transmit Event Bit definition - Read-only */
246 /* PP_BufEvent - Buffer Event Bit definition - Read-only */
257 /* PP_LineST - Ethernet Line Status bit definition - Read-only */
264 /* PP_SelfST - Chip Software Status bit definition */
273 /* PP_BusST - ISA Bus Status bit definition */
277 /* PP_AutoNegCTL - Auto Negotiation Control bit definition */
286 /* PP_AutoNegST - Auto Negotiation Status bit definition */
303 #define AUTOINCREMENT 0x8000 /* Bit mask to set bit-15 for autoincrement */
319 #define RCV_DMA_ALL 0x400 /* Copy all DMA'ed */
345 #define RBUF_EVENT_LOW 0 /* Low byte of RxEvent - status of received frame */
346 #define RBUF_EVENT_HIGH 1 /* High byte of RxEvent - status of received frame */
347 #define RBUF_LEN_LOW 2 /* Length of received data - low byte */
348 #define RBUF_LEN_HI 3 /* Length of received data - high byte */
351 #define CHIP_READ 0x1 /* Used to mark state of the repins code (chip or dma) */
352 #define DMA_READ 0x2 /* Used to mark state of the repins code (chip or dma) */
410 /* DMA controller registers */
411 #define DMA_BASE 0x00 /* DMA controller base */
412 #define DMA_BASE_2 0x0C0 /* DMA controller base */
414 #define DMA_STAT 0x0D0 /* DMA controller status register */
415 #define DMA_MASK 0x0D4 /* DMA controller mask register */
416 #define DMA_MODE 0x0D6 /* DMA controller mode register */
417 #define DMA_RESETFF 0x0D8 /* DMA controller first/last flip flop */
419 /* DMA data */
427 #define DMA_SIZE (16*1024) /* Size of dma buffer - 16k */