Lines Matching +full:0 +full:x100008
39 #define A_ELMER0_VERSION 0x100000
40 #define A_ELMER0_PHY_CFG 0x100004
41 #define A_ELMER0_INT_ENABLE 0x100008
42 #define A_ELMER0_INT_CAUSE 0x10000c
43 #define A_ELMER0_GPI_CFG 0x100010
44 #define A_ELMER0_GPI_STAT 0x100014
45 #define A_ELMER0_GPO 0x100018
46 #define A_ELMER0_PORT0_MI1_CFG 0x400000
48 #define S_MI1_MDI_ENABLE 0
61 #define M_MI1_SOF 0x3
66 #define M_MI1_CLK_DIV 0xff
70 #define A_ELMER0_PORT0_MI1_ADDR 0x400004
72 #define S_MI1_REG_ADDR 0
73 #define M_MI1_REG_ADDR 0x1f
78 #define M_MI1_PHY_ADDR 0x1f
82 #define A_ELMER0_PORT0_MI1_DATA 0x400008
84 #define S_MI1_DATA 0
85 #define M_MI1_DATA 0xffff
89 #define A_ELMER0_PORT0_MI1_OP 0x40000c
91 #define S_MI1_OP 0
92 #define M_MI1_OP 0x3
104 #define A_ELMER0_PORT1_MI1_CFG 0x500000
105 #define A_ELMER0_PORT1_MI1_ADDR 0x500004
106 #define A_ELMER0_PORT1_MI1_DATA 0x500008
107 #define A_ELMER0_PORT1_MI1_OP 0x50000c
108 #define A_ELMER0_PORT2_MI1_CFG 0x600000
109 #define A_ELMER0_PORT2_MI1_ADDR 0x600004
110 #define A_ELMER0_PORT2_MI1_DATA 0x600008
111 #define A_ELMER0_PORT2_MI1_OP 0x60000c
112 #define A_ELMER0_PORT3_MI1_CFG 0x700000
113 #define A_ELMER0_PORT3_MI1_ADDR 0x700004
114 #define A_ELMER0_PORT3_MI1_DATA 0x700008
115 #define A_ELMER0_PORT3_MI1_OP 0x70000c
118 #define ELMER0_GP_BIT0 0x0001
119 #define ELMER0_GP_BIT1 0x0002
120 #define ELMER0_GP_BIT2 0x0004
121 #define ELMER0_GP_BIT3 0x0008
122 #define ELMER0_GP_BIT4 0x0010
123 #define ELMER0_GP_BIT5 0x0020
124 #define ELMER0_GP_BIT6 0x0040
125 #define ELMER0_GP_BIT7 0x0080
126 #define ELMER0_GP_BIT8 0x0100
127 #define ELMER0_GP_BIT9 0x0200
128 #define ELMER0_GP_BIT10 0x0400
129 #define ELMER0_GP_BIT11 0x0800
130 #define ELMER0_GP_BIT12 0x1000
131 #define ELMER0_GP_BIT13 0x2000
132 #define ELMER0_GP_BIT14 0x4000
133 #define ELMER0_GP_BIT15 0x8000
134 #define ELMER0_GP_BIT16 0x10000
135 #define ELMER0_GP_BIT17 0x20000
136 #define ELMER0_GP_BIT18 0x40000
137 #define ELMER0_GP_BIT19 0x80000
142 #define MI1_OP_INDIRECT_ADDRESS 0