68 		u64 reg_val = octeon_read_csr64(oct,  in cn23xx_vf_reset_io_queues()  local
70 		while ((READ_ONCE(reg_val) & CN23XX_PKT_INPUT_CTL_RST) &&  in cn23xx_vf_reset_io_queues()
71 		       !(READ_ONCE(reg_val) & CN23XX_PKT_INPUT_CTL_QUIET) &&  in cn23xx_vf_reset_io_queues()
73 			WRITE_ONCE(reg_val, octeon_read_csr64(  in cn23xx_vf_reset_io_queues()
83 		WRITE_ONCE(reg_val, READ_ONCE(reg_val) &  in cn23xx_vf_reset_io_queues()
86 				   READ_ONCE(reg_val));  in cn23xx_vf_reset_io_queues()
88 		WRITE_ONCE(reg_val, octeon_read_csr64(  in cn23xx_vf_reset_io_queues()
90 		if (READ_ONCE(reg_val) & CN23XX_PKT_INPUT_CTL_RST) {  in cn23xx_vf_reset_io_queues()
153 	u32 reg_val;  in cn23xx_vf_setup_global_output_regs()  local
160 		reg_val =  in cn23xx_vf_setup_global_output_regs()
163 		reg_val &= 0xEFFFFFFFFFFFFFFFL;  in cn23xx_vf_setup_global_output_regs()
165 		reg_val =  in cn23xx_vf_setup_global_output_regs()
169 		reg_val &= ~CN23XX_PKT_OUTPUT_CTL_IPTR;  in cn23xx_vf_setup_global_output_regs()
172 		reg_val |= CN23XX_PKT_OUTPUT_CTL_DPTR;  in cn23xx_vf_setup_global_output_regs()
175 		reg_val &= ~(CN23XX_PKT_OUTPUT_CTL_BMODE);  in cn23xx_vf_setup_global_output_regs()
180 		reg_val &= ~(CN23XX_PKT_OUTPUT_CTL_ROR_P);  in cn23xx_vf_setup_global_output_regs()
181 		reg_val &= ~(CN23XX_PKT_OUTPUT_CTL_NSR_P);  in cn23xx_vf_setup_global_output_regs()
184 		reg_val &= ~(CN23XX_PKT_OUTPUT_CTL_ES_P);  in cn23xx_vf_setup_global_output_regs()
186 		reg_val |= (CN23XX_PKT_OUTPUT_CTL_ES_P);  in cn23xx_vf_setup_global_output_regs()
191 		reg_val &= ~(CN23XX_PKT_OUTPUT_CTL_ROR);  in cn23xx_vf_setup_global_output_regs()
192 		reg_val &= ~(CN23XX_PKT_OUTPUT_CTL_NSR);  in cn23xx_vf_setup_global_output_regs()
194 		reg_val |= (CN23XX_PKT_OUTPUT_CTL_ES);  in cn23xx_vf_setup_global_output_regs()
198 				 reg_val);  in cn23xx_vf_setup_global_output_regs()
321 		u64 reg_val;  in cn23xx_enable_vf_io_queues()  local
325 			reg_val = octeon_read_csr64(  in cn23xx_enable_vf_io_queues()
327 			reg_val |= CN23XX_PKT_INPUT_CTL_IS_64B;  in cn23xx_enable_vf_io_queues()
329 			    oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no), reg_val);  in cn23xx_enable_vf_io_queues()
334 			reg_val = octeon_read_csr64(  in cn23xx_enable_vf_io_queues()
336 			reg_val |= CN23XX_PKT_INPUT_CTL_RING_ENB;  in cn23xx_enable_vf_io_queues()
338 			    oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no), reg_val);  in cn23xx_enable_vf_io_queues()
342 		u32 reg_val;  in cn23xx_enable_vf_io_queues()  local
346 			reg_val = octeon_read_csr(  in cn23xx_enable_vf_io_queues()
348 			reg_val |= CN23XX_PKT_OUTPUT_CTL_RING_ENB;  in cn23xx_enable_vf_io_queues()
350 			    oct, CN23XX_VF_SLI_OQ_PKT_CONTROL(q_no), reg_val);  in cn23xx_enable_vf_io_queues()
620 	u64 reg_val;  in cn23xx_setup_octeon_vf_device()  local
626 	reg_val = octeon_read_csr64(oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(0));  in cn23xx_setup_octeon_vf_device()
628 	oct->pf_num = (reg_val >> CN23XX_PKT_INPUT_CTL_PF_NUM_POS) &  in cn23xx_setup_octeon_vf_device()
630 	oct->vf_num = (reg_val >> CN23XX_PKT_INPUT_CTL_VF_NUM_POS) &  in cn23xx_setup_octeon_vf_device()
633 	reg_val = reg_val >> CN23XX_PKT_INPUT_CTL_RPVF_POS;  in cn23xx_setup_octeon_vf_device()
635 	rings_per_vf = reg_val & CN23XX_PKT_INPUT_CTL_RPVF_MASK;  in cn23xx_setup_octeon_vf_device()