Lines Matching +full:hb +full:- +full:xgmac
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2010-2011 Calxeda, Inc.
16 #include <linux/dma-mapping.h>
19 /* XGMAC Register definitions */
37 #define XGMAC_REMOTE_WAKE 0x00000700 /* Remote Wake-Up Frm Filter */
39 #define XGMAC_MMC_CTRL 0x00000800 /* XGMAC MMC Control */
121 #define XGMAC_CONTROL_LM 0x00001000 /* Loop-back mode */
128 /* XGMAC Frame Filter defines */
142 /* XGMAC FLOW CTRL defines */
145 #define XGMAC_FLOW_CTRL_DZQP 0x00000080 /* Disable Zero-Quanta Phase */
168 #define DMA_BUS_MODE_RPBL_MASK 0x003e0000 /* Rx-Programmable Burst Len */
218 #define DMA_STATUS_EB_TX_ABORT 0x00080000 /* Error Bits - TX Abort */
219 #define DMA_STATUS_EB_RX_ABORT 0x00100000 /* Error Bits - RX Abort */
244 /* XGMAC Operation Mode Register */
260 /* XGMAC HW Features Register */
265 /* XGMAC Descriptor Defines */
266 #define MAX_DESC_BUF_SZ (0x2000 - 8)
386 /* XGMAC Configuration Settings */
396 #define dma_ring_incr(n, s) (((n) + 1) & ((s) - 1))
401 dma_ring_space((p)->tx_head, (p)->tx_tail, DMA_TX_RING_SZ)
403 /* XGMAC Descriptor Access Helpers */
407 p->buf_size = cpu_to_le32(MAX_DESC_BUF_SZ | in desc_set_buf_len()
408 (buf_sz - MAX_DESC_BUF_SZ) << DESC_BUFFER2_SZ_OFFSET); in desc_set_buf_len()
410 p->buf_size = cpu_to_le32(buf_sz); in desc_set_buf_len()
415 u32 len = le32_to_cpu(p->buf_size); in desc_get_buf_len()
423 struct xgmac_dma_desc *end = p + ring_size - 1; in desc_init_rx_desc()
430 end->buf_size |= cpu_to_le32(RXDESC1_END_RING); in desc_init_rx_desc()
436 p[ring_size - 1].flags = cpu_to_le32(TXDESC_END_RING); in desc_init_tx_desc()
441 return le32_to_cpu(p->flags) & DESC_OWN; in desc_get_owner()
447 p->flags = cpu_to_le32(DESC_OWN); in desc_set_rx_owner()
452 u32 tmpflags = le32_to_cpu(p->flags); in desc_set_tx_owner()
455 p->flags = cpu_to_le32(tmpflags); in desc_set_tx_owner()
460 u32 tmpflags = le32_to_cpu(p->flags); in desc_clear_tx_owner()
462 p->flags = cpu_to_le32(tmpflags); in desc_clear_tx_owner()
467 return le32_to_cpu(p->flags) & TXDESC_LAST_SEG; in desc_get_tx_ls()
472 return le32_to_cpu(p->flags) & TXDESC_FIRST_SEG; in desc_get_tx_fs()
477 return le32_to_cpu(p->buf1_addr); in desc_get_buf_addr()
483 p->buf1_addr = cpu_to_le32(paddr); in desc_set_buf_addr()
485 p->buf2_addr = cpu_to_le32(paddr + MAX_DESC_BUF_SZ); in desc_set_buf_addr()
497 u32 data = le32_to_cpu(p->flags); in desc_get_rx_frame_len()
500 len -= ETH_FCS_LEN; in desc_get_rx_frame_len()
511 while ((timeout-- > 0) && readl(ioaddr + XGMAC_OMR) & XGMAC_OMR_FTF) in xgmac_dma_flush_tx_fifo()
517 struct xgmac_extra_stats *x = &priv->xstats; in desc_get_tx_status()
518 u32 status = le32_to_cpu(p->flags); in desc_get_tx_status()
523 netdev_dbg(priv->dev, "tx desc error = 0x%08x\n", status); in desc_get_tx_status()
525 x->tx_jabber++; in desc_get_tx_status()
527 x->tx_frame_flushed++; in desc_get_tx_status()
529 xgmac_dma_flush_tx_fifo(priv->base); in desc_get_tx_status()
531 x->tx_ip_header_error++; in desc_get_tx_status()
533 x->tx_local_fault++; in desc_get_tx_status()
535 x->tx_remote_fault++; in desc_get_tx_status()
537 x->tx_payload_error++; in desc_get_tx_status()
539 return -1; in desc_get_tx_status()
544 struct xgmac_extra_stats *x = &priv->xstats; in desc_get_rx_status()
546 u32 status = le32_to_cpu(p->flags); in desc_get_rx_status()
547 u32 ext_status = le32_to_cpu(p->ext_status); in desc_get_rx_status()
550 netdev_dbg(priv->dev, "XGMAC RX : Dest Address filter fail\n"); in desc_get_rx_status()
551 x->rx_da_filter_fail++; in desc_get_rx_status()
552 return -1; in desc_get_rx_status()
557 return -1; in desc_get_rx_status()
564 netdev_dbg(priv->dev, "rx status - frame type=%d, csum = %d, ext stat %08x\n", in desc_get_rx_status()
573 return -1; in desc_get_rx_status()
577 x->rx_ip_header_error++; in desc_get_rx_status()
579 x->rx_payload_error++; in desc_get_rx_status()
580 netdev_dbg(priv->dev, "IP checksum error - stat %08x\n", in desc_get_rx_status()
649 priv->rx_pause = rx; in xgmac_set_flow_ctrl()
650 priv->tx_pause = tx; in xgmac_set_flow_ctrl()
661 writel(flow, priv->base + XGMAC_FLOW_CTRL); in xgmac_set_flow_ctrl()
663 reg = readl(priv->base + XGMAC_OMR); in xgmac_set_flow_ctrl()
665 writel(reg, priv->base + XGMAC_OMR); in xgmac_set_flow_ctrl()
667 writel(0, priv->base + XGMAC_FLOW_CTRL); in xgmac_set_flow_ctrl()
669 reg = readl(priv->base + XGMAC_OMR); in xgmac_set_flow_ctrl()
671 writel(reg, priv->base + XGMAC_OMR); in xgmac_set_flow_ctrl()
681 int bufsz = priv->dev->mtu + ETH_HLEN + ETH_FCS_LEN; in xgmac_rx_refill()
683 while (dma_ring_space(priv->rx_head, priv->rx_tail, DMA_RX_RING_SZ) > 1) { in xgmac_rx_refill()
684 int entry = priv->rx_head; in xgmac_rx_refill()
687 p = priv->dma_rx + entry; in xgmac_rx_refill()
689 if (priv->rx_skbuff[entry] == NULL) { in xgmac_rx_refill()
690 skb = netdev_alloc_skb_ip_align(priv->dev, bufsz); in xgmac_rx_refill()
694 paddr = dma_map_single(priv->device, skb->data, in xgmac_rx_refill()
695 priv->dma_buf_sz - NET_IP_ALIGN, in xgmac_rx_refill()
697 if (dma_mapping_error(priv->device, paddr)) { in xgmac_rx_refill()
701 priv->rx_skbuff[entry] = skb; in xgmac_rx_refill()
702 desc_set_buf_addr(p, paddr, priv->dma_buf_sz); in xgmac_rx_refill()
705 netdev_dbg(priv->dev, "rx ring: head %d, tail %d\n", in xgmac_rx_refill()
706 priv->rx_head, priv->rx_tail); in xgmac_rx_refill()
708 priv->rx_head = dma_ring_incr(priv->rx_head, DMA_RX_RING_SZ); in xgmac_rx_refill()
714 * xgmac_dma_desc_rings_init - init the RX/TX descriptor rings
728 bfsize = ALIGN(dev->mtu + ETH_HLEN + ETH_FCS_LEN + NET_IP_ALIGN, 8); in xgmac_dma_desc_rings_init()
730 netdev_dbg(priv->dev, "mtu [%d] bfsize [%d]\n", dev->mtu, bfsize); in xgmac_dma_desc_rings_init()
732 priv->rx_skbuff = kcalloc(DMA_RX_RING_SZ, sizeof(struct sk_buff *), in xgmac_dma_desc_rings_init()
734 if (!priv->rx_skbuff) in xgmac_dma_desc_rings_init()
735 return -ENOMEM; in xgmac_dma_desc_rings_init()
737 priv->dma_rx = dma_alloc_coherent(priv->device, in xgmac_dma_desc_rings_init()
740 &priv->dma_rx_phy, in xgmac_dma_desc_rings_init()
742 if (!priv->dma_rx) in xgmac_dma_desc_rings_init()
745 priv->tx_skbuff = kcalloc(DMA_TX_RING_SZ, sizeof(struct sk_buff *), in xgmac_dma_desc_rings_init()
747 if (!priv->tx_skbuff) in xgmac_dma_desc_rings_init()
750 priv->dma_tx = dma_alloc_coherent(priv->device, in xgmac_dma_desc_rings_init()
753 &priv->dma_tx_phy, in xgmac_dma_desc_rings_init()
755 if (!priv->dma_tx) in xgmac_dma_desc_rings_init()
758 netdev_dbg(priv->dev, "DMA desc rings: virt addr (Rx %p, " in xgmac_dma_desc_rings_init()
760 priv->dma_rx, priv->dma_tx, in xgmac_dma_desc_rings_init()
761 (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy); in xgmac_dma_desc_rings_init()
763 priv->rx_tail = 0; in xgmac_dma_desc_rings_init()
764 priv->rx_head = 0; in xgmac_dma_desc_rings_init()
765 priv->dma_buf_sz = bfsize; in xgmac_dma_desc_rings_init()
766 desc_init_rx_desc(priv->dma_rx, DMA_RX_RING_SZ, priv->dma_buf_sz); in xgmac_dma_desc_rings_init()
769 priv->tx_tail = 0; in xgmac_dma_desc_rings_init()
770 priv->tx_head = 0; in xgmac_dma_desc_rings_init()
771 desc_init_tx_desc(priv->dma_tx, DMA_TX_RING_SZ); in xgmac_dma_desc_rings_init()
773 writel(priv->dma_tx_phy, priv->base + XGMAC_DMA_TX_BASE_ADDR); in xgmac_dma_desc_rings_init()
774 writel(priv->dma_rx_phy, priv->base + XGMAC_DMA_RX_BASE_ADDR); in xgmac_dma_desc_rings_init()
779 kfree(priv->tx_skbuff); in xgmac_dma_desc_rings_init()
781 dma_free_coherent(priv->device, in xgmac_dma_desc_rings_init()
783 priv->dma_rx, priv->dma_rx_phy); in xgmac_dma_desc_rings_init()
785 kfree(priv->rx_skbuff); in xgmac_dma_desc_rings_init()
786 return -ENOMEM; in xgmac_dma_desc_rings_init()
794 if (!priv->rx_skbuff) in xgmac_free_rx_skbufs()
798 struct sk_buff *skb = priv->rx_skbuff[i]; in xgmac_free_rx_skbufs()
802 p = priv->dma_rx + i; in xgmac_free_rx_skbufs()
803 dma_unmap_single(priv->device, desc_get_buf_addr(p), in xgmac_free_rx_skbufs()
804 priv->dma_buf_sz - NET_IP_ALIGN, DMA_FROM_DEVICE); in xgmac_free_rx_skbufs()
806 priv->rx_skbuff[i] = NULL; in xgmac_free_rx_skbufs()
815 if (!priv->tx_skbuff) in xgmac_free_tx_skbufs()
819 if (priv->tx_skbuff[i] == NULL) in xgmac_free_tx_skbufs()
822 p = priv->dma_tx + i; in xgmac_free_tx_skbufs()
824 dma_unmap_single(priv->device, desc_get_buf_addr(p), in xgmac_free_tx_skbufs()
827 dma_unmap_page(priv->device, desc_get_buf_addr(p), in xgmac_free_tx_skbufs()
831 dev_kfree_skb_any(priv->tx_skbuff[i]); in xgmac_free_tx_skbufs()
832 priv->tx_skbuff[i] = NULL; in xgmac_free_tx_skbufs()
843 if (priv->dma_tx) { in xgmac_free_dma_desc_rings()
844 dma_free_coherent(priv->device, in xgmac_free_dma_desc_rings()
846 priv->dma_tx, priv->dma_tx_phy); in xgmac_free_dma_desc_rings()
847 priv->dma_tx = NULL; in xgmac_free_dma_desc_rings()
849 if (priv->dma_rx) { in xgmac_free_dma_desc_rings()
850 dma_free_coherent(priv->device, in xgmac_free_dma_desc_rings()
852 priv->dma_rx, priv->dma_rx_phy); in xgmac_free_dma_desc_rings()
853 priv->dma_rx = NULL; in xgmac_free_dma_desc_rings()
855 kfree(priv->rx_skbuff); in xgmac_free_dma_desc_rings()
856 priv->rx_skbuff = NULL; in xgmac_free_dma_desc_rings()
857 kfree(priv->tx_skbuff); in xgmac_free_dma_desc_rings()
858 priv->tx_skbuff = NULL; in xgmac_free_dma_desc_rings()
868 while (dma_ring_cnt(priv->tx_head, priv->tx_tail, DMA_TX_RING_SZ)) { in xgmac_tx_complete()
869 unsigned int entry = priv->tx_tail; in xgmac_tx_complete()
870 struct sk_buff *skb = priv->tx_skbuff[entry]; in xgmac_tx_complete()
871 struct xgmac_dma_desc *p = priv->dma_tx + entry; in xgmac_tx_complete()
877 netdev_dbg(priv->dev, "tx ring: curr %d, dirty %d\n", in xgmac_tx_complete()
878 priv->tx_head, priv->tx_tail); in xgmac_tx_complete()
881 dma_unmap_single(priv->device, desc_get_buf_addr(p), in xgmac_tx_complete()
884 dma_unmap_page(priv->device, desc_get_buf_addr(p), in xgmac_tx_complete()
893 priv->tx_skbuff[entry] = NULL; in xgmac_tx_complete()
894 priv->tx_tail = dma_ring_incr(entry, DMA_TX_RING_SZ); in xgmac_tx_complete()
899 if (unlikely(netif_queue_stopped(priv->dev) && in xgmac_tx_complete()
901 netif_wake_queue(priv->dev); in xgmac_tx_complete()
910 napi_disable(&priv->napi); in xgmac_tx_timeout_work()
912 writel(0, priv->base + XGMAC_DMA_INTR_ENA); in xgmac_tx_timeout_work()
914 netif_tx_lock(priv->dev); in xgmac_tx_timeout_work()
916 reg = readl(priv->base + XGMAC_DMA_CONTROL); in xgmac_tx_timeout_work()
917 writel(reg & ~DMA_CONTROL_ST, priv->base + XGMAC_DMA_CONTROL); in xgmac_tx_timeout_work()
919 value = readl(priv->base + XGMAC_DMA_STATUS) & 0x700000; in xgmac_tx_timeout_work()
923 desc_init_tx_desc(priv->dma_tx, DMA_TX_RING_SZ); in xgmac_tx_timeout_work()
924 priv->tx_tail = 0; in xgmac_tx_timeout_work()
925 priv->tx_head = 0; in xgmac_tx_timeout_work()
926 writel(priv->dma_tx_phy, priv->base + XGMAC_DMA_TX_BASE_ADDR); in xgmac_tx_timeout_work()
927 writel(reg | DMA_CONTROL_ST, priv->base + XGMAC_DMA_CONTROL); in xgmac_tx_timeout_work()
930 priv->base + XGMAC_DMA_STATUS); in xgmac_tx_timeout_work()
932 netif_tx_unlock(priv->dev); in xgmac_tx_timeout_work()
933 netif_wake_queue(priv->dev); in xgmac_tx_timeout_work()
935 napi_enable(&priv->napi); in xgmac_tx_timeout_work()
938 writel(DMA_INTR_DEFAULT_MASK, priv->base + XGMAC_DMA_STATUS); in xgmac_tx_timeout_work()
939 writel(DMA_INTR_DEFAULT_MASK, priv->base + XGMAC_DMA_INTR_ENA); in xgmac_tx_timeout_work()
947 void __iomem *ioaddr = priv->base; in xgmac_hw_init()
956 while (limit-- && in xgmac_hw_init()
960 return -EBUSY; in xgmac_hw_init()
972 /* XGMAC requires AXI bus init. This is a 'magic number' for now */ in xgmac_hw_init()
977 if (dev->features & NETIF_F_RXCSUM) in xgmac_hw_init()
994 * xgmac_open - open entry point of the driver
999 * 0 on success and an appropriate (-)ve integer as defined in errno.h
1006 void __iomem *ioaddr = priv->base; in xgmac_open()
1012 if (!is_valid_ether_addr(dev->dev_addr)) { in xgmac_open()
1014 netdev_dbg(priv->dev, "generated random MAC address %pM\n", in xgmac_open()
1015 dev->dev_addr); in xgmac_open()
1018 memset(&priv->xstats, 0, sizeof(struct xgmac_extra_stats)); in xgmac_open()
1020 /* Initialize the XGMAC and descriptors */ in xgmac_open()
1022 xgmac_set_mac_addr(ioaddr, dev->dev_addr, 0); in xgmac_open()
1023 xgmac_set_flow_ctrl(priv, priv->rx_pause, priv->tx_pause); in xgmac_open()
1032 napi_enable(&priv->napi); in xgmac_open()
1043 * xgmac_stop - close entry point of the driver
1052 if (readl(priv->base + XGMAC_DMA_INTR_ENA)) in xgmac_stop()
1053 napi_disable(&priv->napi); in xgmac_stop()
1055 writel(0, priv->base + XGMAC_DMA_INTR_ENA); in xgmac_stop()
1060 xgmac_mac_disable(priv->base); in xgmac_stop()
1080 int nfrags = skb_shinfo(skb)->nr_frags; in xgmac_xmit()
1086 priv->tx_irq_cnt = (priv->tx_irq_cnt + 1) & (DMA_TX_RING_SZ/4 - 1); in xgmac_xmit()
1087 irq_flag = priv->tx_irq_cnt ? 0 : TXDESC_INTERRUPT; in xgmac_xmit()
1089 desc_flags = (skb->ip_summed == CHECKSUM_PARTIAL) ? in xgmac_xmit()
1091 entry = priv->tx_head; in xgmac_xmit()
1092 desc = priv->dma_tx + entry; in xgmac_xmit()
1096 paddr = dma_map_single(priv->device, skb->data, len, DMA_TO_DEVICE); in xgmac_xmit()
1097 if (dma_mapping_error(priv->device, paddr)) { in xgmac_xmit()
1101 priv->tx_skbuff[entry] = skb; in xgmac_xmit()
1105 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in xgmac_xmit()
1109 paddr = skb_frag_dma_map(priv->device, frag, 0, len, in xgmac_xmit()
1111 if (dma_mapping_error(priv->device, paddr)) in xgmac_xmit()
1115 desc = priv->dma_tx + entry; in xgmac_xmit()
1116 priv->tx_skbuff[entry] = skb; in xgmac_xmit()
1119 if (i < (nfrags - 1)) in xgmac_xmit()
1134 writel(1, priv->base + XGMAC_DMA_TX_POLL); in xgmac_xmit()
1136 priv->tx_head = dma_ring_incr(entry, DMA_TX_RING_SZ); in xgmac_xmit()
1150 entry = priv->tx_head; in xgmac_xmit()
1151 for ( ; i > 0; i--) { in xgmac_xmit()
1153 desc = priv->dma_tx + entry; in xgmac_xmit()
1154 priv->tx_skbuff[entry] = NULL; in xgmac_xmit()
1155 dma_unmap_page(priv->device, desc_get_buf_addr(desc), in xgmac_xmit()
1160 dma_unmap_single(priv->device, desc_get_buf_addr(desc), in xgmac_xmit()
1177 if (!dma_ring_cnt(priv->rx_head, priv->rx_tail, DMA_RX_RING_SZ)) in xgmac_rx()
1180 entry = priv->rx_tail; in xgmac_rx()
1181 p = priv->dma_rx + entry; in xgmac_rx()
1186 priv->rx_tail = dma_ring_incr(priv->rx_tail, DMA_RX_RING_SZ); in xgmac_rx()
1193 skb = priv->rx_skbuff[entry]; in xgmac_rx()
1195 netdev_err(priv->dev, "Inconsistent Rx descriptor chain\n"); in xgmac_rx()
1198 priv->rx_skbuff[entry] = NULL; in xgmac_rx()
1201 netdev_dbg(priv->dev, "RX frame size %d, COE status: %d\n", in xgmac_rx()
1205 dma_unmap_single(priv->device, desc_get_buf_addr(p), in xgmac_rx()
1206 priv->dma_buf_sz - NET_IP_ALIGN, DMA_FROM_DEVICE); in xgmac_rx()
1208 skb->protocol = eth_type_trans(skb, priv->dev); in xgmac_rx()
1209 skb->ip_summed = ip_checksum; in xgmac_rx()
1213 napi_gro_receive(&priv->napi, skb); in xgmac_rx()
1222 * xgmac_poll - xgmac poll method (NAPI)
1241 __raw_writel(DMA_INTR_DEFAULT_MASK, priv->base + XGMAC_DMA_INTR_ENA); in xgmac_poll()
1259 schedule_work(&priv->tx_timeout_work); in xgmac_tx_timeout()
1263 * xgmac_set_rx_mode - entry point for multicast addressing
1275 void __iomem *ioaddr = priv->base; in xgmac_set_rx_mode()
1282 netdev_dbg(priv->dev, "# mcasts %d, # unicast %d\n", in xgmac_set_rx_mode()
1285 if (dev->flags & IFF_PROMISC) in xgmac_set_rx_mode()
1290 if (netdev_uc_count(dev) > priv->max_macs) { in xgmac_set_rx_mode()
1296 u32 bit_nr = ~ether_crc(ETH_ALEN, ha->addr) >> 23; in xgmac_set_rx_mode()
1303 xgmac_set_mac_addr(ioaddr, ha->addr, reg); in xgmac_set_rx_mode()
1308 if (dev->flags & IFF_ALLMULTI) { in xgmac_set_rx_mode()
1313 if ((netdev_mc_count(dev) + reg - 1) > priv->max_macs) { in xgmac_set_rx_mode()
1321 u32 bit_nr = ~ether_crc(ETH_ALEN, ha->addr) >> 23; in xgmac_set_rx_mode()
1328 xgmac_set_mac_addr(ioaddr, ha->addr, reg); in xgmac_set_rx_mode()
1334 for (i = reg; i <= priv->max_macs; i++) in xgmac_set_rx_mode()
1343 * xgmac_change_mtu - entry point to change MTU size for the device.
1350 * 0 on success and an appropriate (-)ve integer as defined in errno.h
1361 WRITE_ONCE(dev->mtu, new_mtu); in xgmac_change_mtu()
1370 void __iomem *ioaddr = priv->base; in xgmac_pmt_interrupt()
1374 netdev_dbg(priv->dev, "received Magic frame\n"); in xgmac_pmt_interrupt()
1386 struct xgmac_extra_stats *x = &priv->xstats; in xgmac_interrupt()
1389 intr_status = __raw_readl(priv->base + XGMAC_DMA_STATUS); in xgmac_interrupt()
1390 intr_status &= __raw_readl(priv->base + XGMAC_DMA_INTR_ENA); in xgmac_interrupt()
1391 __raw_writel(intr_status, priv->base + XGMAC_DMA_STATUS); in xgmac_interrupt()
1397 netdev_err(priv->dev, "transmit jabber\n"); in xgmac_interrupt()
1398 x->tx_jabber++; in xgmac_interrupt()
1401 x->rx_buf_unav++; in xgmac_interrupt()
1403 netdev_err(priv->dev, "receive process stopped\n"); in xgmac_interrupt()
1404 x->rx_process_stopped++; in xgmac_interrupt()
1407 netdev_err(priv->dev, "transmit early interrupt\n"); in xgmac_interrupt()
1408 x->tx_early++; in xgmac_interrupt()
1411 netdev_err(priv->dev, "transmit process stopped\n"); in xgmac_interrupt()
1412 x->tx_process_stopped++; in xgmac_interrupt()
1413 schedule_work(&priv->tx_timeout_work); in xgmac_interrupt()
1416 netdev_err(priv->dev, "fatal bus error\n"); in xgmac_interrupt()
1417 x->fatal_bus_error++; in xgmac_interrupt()
1423 __raw_writel(DMA_INTR_ABNORMAL, priv->base + XGMAC_DMA_INTR_ENA); in xgmac_interrupt()
1424 napi_schedule(&priv->napi); in xgmac_interrupt()
1431 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1435 disable_irq(dev->irq); in xgmac_poll_controller()
1436 xgmac_interrupt(dev->irq, dev); in xgmac_poll_controller()
1437 enable_irq(dev->irq); in xgmac_poll_controller()
1446 void __iomem *base = priv->base; in xgmac_get_stats64()
1449 spin_lock_bh(&priv->stats_lock); in xgmac_get_stats64()
1452 storage->rx_bytes = readl(base + XGMAC_MMC_RXOCTET_G_LO); in xgmac_get_stats64()
1453 storage->rx_bytes |= (u64)(readl(base + XGMAC_MMC_RXOCTET_G_HI)) << 32; in xgmac_get_stats64()
1455 storage->rx_packets = readl(base + XGMAC_MMC_RXFRAME_GB_LO); in xgmac_get_stats64()
1456 storage->multicast = readl(base + XGMAC_MMC_RXMCFRAME_G); in xgmac_get_stats64()
1457 storage->rx_crc_errors = readl(base + XGMAC_MMC_RXCRCERR); in xgmac_get_stats64()
1458 storage->rx_length_errors = readl(base + XGMAC_MMC_RXLENGTHERR); in xgmac_get_stats64()
1459 storage->rx_missed_errors = readl(base + XGMAC_MMC_RXOVERFLOW); in xgmac_get_stats64()
1461 storage->tx_bytes = readl(base + XGMAC_MMC_TXOCTET_G_LO); in xgmac_get_stats64()
1462 storage->tx_bytes |= (u64)(readl(base + XGMAC_MMC_TXOCTET_G_HI)) << 32; in xgmac_get_stats64()
1465 storage->tx_errors = count - readl(base + XGMAC_MMC_TXFRAME_G_LO); in xgmac_get_stats64()
1466 storage->tx_packets = count; in xgmac_get_stats64()
1467 storage->tx_fifo_errors = readl(base + XGMAC_MMC_TXUNDERFLOW); in xgmac_get_stats64()
1470 spin_unlock_bh(&priv->stats_lock); in xgmac_get_stats64()
1476 void __iomem *ioaddr = priv->base; in xgmac_set_mac_address()
1479 if (!is_valid_ether_addr(addr->sa_data)) in xgmac_set_mac_address()
1480 return -EADDRNOTAVAIL; in xgmac_set_mac_address()
1482 eth_hw_addr_set(dev, addr->sa_data); in xgmac_set_mac_address()
1484 xgmac_set_mac_addr(ioaddr, dev->dev_addr, 0); in xgmac_set_mac_address()
1493 void __iomem *ioaddr = priv->base; in xgmac_set_features()
1494 netdev_features_t changed = dev->features ^ features; in xgmac_set_features()
1527 cmd->base.autoneg = 0; in xgmac_ethtool_get_link_ksettings()
1528 cmd->base.duplex = DUPLEX_FULL; in xgmac_ethtool_get_link_ksettings()
1529 cmd->base.speed = 10000; in xgmac_ethtool_get_link_ksettings()
1530 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, 0); in xgmac_ethtool_get_link_ksettings()
1531 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, 0); in xgmac_ethtool_get_link_ksettings()
1540 pause->rx_pause = priv->rx_pause; in xgmac_get_pauseparam()
1541 pause->tx_pause = priv->tx_pause; in xgmac_get_pauseparam()
1549 if (pause->autoneg) in xgmac_set_pauseparam()
1550 return -EINVAL; in xgmac_set_pauseparam()
1552 return xgmac_set_flow_ctrl(priv, pause->rx_pause, pause->tx_pause); in xgmac_set_pauseparam()
1599 *data++ = readl(priv->base + in xgmac_get_ethtool_stats()
1613 return -EINVAL; in xgmac_get_sset_count()
1642 if (device_can_wakeup(priv->device)) { in xgmac_get_wol()
1643 wol->supported = WAKE_MAGIC | WAKE_UCAST; in xgmac_get_wol()
1644 wol->wolopts = priv->wolopts; in xgmac_get_wol()
1654 if (!device_can_wakeup(priv->device)) in xgmac_set_wol()
1655 return -ENOTSUPP; in xgmac_set_wol()
1657 if (wol->wolopts & ~support) in xgmac_set_wol()
1658 return -EINVAL; in xgmac_set_wol()
1660 priv->wolopts = wol->wolopts; in xgmac_set_wol()
1662 if (wol->wolopts) { in xgmac_set_wol()
1663 device_set_wakeup_enable(priv->device, 1); in xgmac_set_wol()
1664 enable_irq_wake(dev->irq); in xgmac_set_wol()
1666 device_set_wakeup_enable(priv->device, 0); in xgmac_set_wol()
1667 disable_irq_wake(dev->irq); in xgmac_set_wol()
1701 return -ENODEV; in xgmac_probe()
1703 if (!request_mem_region(res->start, resource_size(res), pdev->name)) in xgmac_probe()
1704 return -EBUSY; in xgmac_probe()
1708 ret = -ENOMEM; in xgmac_probe()
1712 SET_NETDEV_DEV(ndev, &pdev->dev); in xgmac_probe()
1715 ndev->netdev_ops = &xgmac_netdev_ops; in xgmac_probe()
1716 ndev->ethtool_ops = &xgmac_ethtool_ops; in xgmac_probe()
1717 spin_lock_init(&priv->stats_lock); in xgmac_probe()
1718 INIT_WORK(&priv->tx_timeout_work, xgmac_tx_timeout_work); in xgmac_probe()
1720 priv->device = &pdev->dev; in xgmac_probe()
1721 priv->dev = ndev; in xgmac_probe()
1722 priv->rx_pause = 1; in xgmac_probe()
1723 priv->tx_pause = 1; in xgmac_probe()
1725 priv->base = ioremap(res->start, resource_size(res)); in xgmac_probe()
1726 if (!priv->base) { in xgmac_probe()
1728 ret = -ENOMEM; in xgmac_probe()
1732 uid = readl(priv->base + XGMAC_VERSION); in xgmac_probe()
1736 writel(1, priv->base + XGMAC_ADDR_HIGH(31)); in xgmac_probe()
1737 if (readl(priv->base + XGMAC_ADDR_HIGH(31)) == 1) in xgmac_probe()
1738 priv->max_macs = 31; in xgmac_probe()
1740 priv->max_macs = 7; in xgmac_probe()
1742 writel(0, priv->base + XGMAC_DMA_INTR_ENA); in xgmac_probe()
1743 ndev->irq = platform_get_irq(pdev, 0); in xgmac_probe()
1744 if (ndev->irq == -ENXIO) { in xgmac_probe()
1746 ret = ndev->irq; in xgmac_probe()
1750 ret = request_irq(ndev->irq, xgmac_interrupt, 0, in xgmac_probe()
1751 dev_name(&pdev->dev), ndev); in xgmac_probe()
1753 netdev_err(ndev, "Could not request irq %d - ret %d)\n", in xgmac_probe()
1754 ndev->irq, ret); in xgmac_probe()
1758 priv->pmt_irq = platform_get_irq(pdev, 1); in xgmac_probe()
1759 if (priv->pmt_irq == -ENXIO) { in xgmac_probe()
1761 ret = priv->pmt_irq; in xgmac_probe()
1765 ret = request_irq(priv->pmt_irq, xgmac_pmt_interrupt, 0, in xgmac_probe()
1766 dev_name(&pdev->dev), ndev); in xgmac_probe()
1768 netdev_err(ndev, "Could not request irq %d - ret %d)\n", in xgmac_probe()
1769 priv->pmt_irq, ret); in xgmac_probe()
1773 device_set_wakeup_capable(&pdev->dev, 1); in xgmac_probe()
1774 if (device_can_wakeup(priv->device)) in xgmac_probe()
1775 priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */ in xgmac_probe()
1777 ndev->hw_features = NETIF_F_SG | NETIF_F_HIGHDMA; in xgmac_probe()
1778 if (readl(priv->base + XGMAC_DMA_HW_FEATURE) & DMA_HW_FEAT_TXCOESEL) in xgmac_probe()
1779 ndev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | in xgmac_probe()
1781 ndev->features |= ndev->hw_features; in xgmac_probe()
1782 ndev->priv_flags |= IFF_UNICAST_FLT; in xgmac_probe()
1784 /* MTU range: 46 - 9000 */ in xgmac_probe()
1785 ndev->min_mtu = ETH_ZLEN - ETH_HLEN; in xgmac_probe()
1786 ndev->max_mtu = XGMAC_MAX_MTU; in xgmac_probe()
1789 xgmac_get_mac_addr(priv->base, addr, 0); in xgmac_probe()
1791 if (!is_valid_ether_addr(ndev->dev_addr)) in xgmac_probe()
1793 ndev->dev_addr); in xgmac_probe()
1795 netif_napi_add(ndev, &priv->napi, xgmac_poll); in xgmac_probe()
1803 netif_napi_del(&priv->napi); in xgmac_probe()
1804 free_irq(priv->pmt_irq, ndev); in xgmac_probe()
1806 free_irq(ndev->irq, ndev); in xgmac_probe()
1808 iounmap(priv->base); in xgmac_probe()
1812 release_mem_region(res->start, resource_size(res)); in xgmac_probe()
1829 xgmac_mac_disable(priv->base); in xgmac_remove()
1832 free_irq(ndev->irq, ndev); in xgmac_remove()
1833 free_irq(priv->pmt_irq, ndev); in xgmac_remove()
1836 netif_napi_del(&priv->napi); in xgmac_remove()
1838 iounmap(priv->base); in xgmac_remove()
1840 release_mem_region(res->start, resource_size(res)); in xgmac_remove()
1868 napi_disable(&priv->napi); in xgmac_suspend()
1869 writel(0, priv->base + XGMAC_DMA_INTR_ENA); in xgmac_suspend()
1871 if (device_may_wakeup(priv->device)) { in xgmac_suspend()
1873 value = readl(priv->base + XGMAC_DMA_CONTROL); in xgmac_suspend()
1875 writel(value, priv->base + XGMAC_DMA_CONTROL); in xgmac_suspend()
1877 xgmac_pmt(priv->base, priv->wolopts); in xgmac_suspend()
1879 xgmac_mac_disable(priv->base); in xgmac_suspend()
1888 void __iomem *ioaddr = priv->base; in xgmac_resume()
1901 napi_enable(&priv->napi); in xgmac_resume()
1910 { .compatible = "calxeda,hb-xgmac", },
1928 MODULE_DESCRIPTION("Calxeda 10G XGMAC driver");