1625 	cfg_req->rx_cfg.frame_size = bna_enet_mtu_get(&rx->bna->enet);  in bna_bfi_rx_enet_start()
1651 				cfg_req->rx_cfg.multi_buffer =  in bna_bfi_rx_enet_start()
1690 		cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_LARGE_SMALL;  in bna_bfi_rx_enet_start()
1694 		cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_HDS;  in bna_bfi_rx_enet_start()
1695 		cfg_req->rx_cfg.hds.type = rx->hds_cfg.hdr_type;  in bna_bfi_rx_enet_start()
1696 		cfg_req->rx_cfg.hds.force_offset = rx->hds_cfg.forced_offset;  in bna_bfi_rx_enet_start()
1697 		cfg_req->rx_cfg.hds.max_header_size = rx->hds_cfg.forced_offset;  in bna_bfi_rx_enet_start()
1701 		cfg_req->rx_cfg.rxq_type = BFI_ENET_RXQ_SINGLE;  in bna_bfi_rx_enet_start()
1707 	cfg_req->rx_cfg.strip_vlan = rx->rxf.vlan_strip_status;  in bna_bfi_rx_enet_start()
1741 bna_rx_res_check(struct bna_rx_mod *rx_mod, struct bna_rx_config *rx_cfg)  in bna_rx_res_check()  argument
1748 	if (rx_cfg->rxp_type == BNA_RXP_SINGLE) {  in bna_rx_res_check()
1749 		if ((rx_mod->rxp_free_count < rx_cfg->num_paths) ||  in bna_rx_res_check()
1750 			(rx_mod->rxq_free_count < rx_cfg->num_paths))  in bna_rx_res_check()
1753 		if ((rx_mod->rxp_free_count < rx_cfg->num_paths) ||  in bna_rx_res_check()
1754 			(rx_mod->rxq_free_count < (2 * rx_cfg->num_paths)))  in bna_rx_res_check()
2251 		struct bna_rx_config *rx_cfg,  in bna_rx_create()  argument
2280 	if (!bna_rx_res_check(rx_mod, rx_cfg))  in bna_rx_create()
2307 	rx = bna_rx_get(rx_mod, rx_cfg->rx_type);  in bna_rx_create()
2338 	rx->num_paths = rx_cfg->num_paths;  in bna_rx_create()
2343 		rxp->type = rx_cfg->rxp_type;  in bna_rx_create()
2348 		if (BNA_RXP_SINGLE == rx_cfg->rxp_type)  in bna_rx_create()
2371 		rxp->cq.ib.coalescing_timeo = rx_cfg->coalescing_timeo;  in bna_rx_create()
2385 		q0->rcb->q_depth = rx_cfg->q0_depth;  in bna_rx_create()
2386 		q0->q_depth = rx_cfg->q0_depth;  in bna_rx_create()
2387 		q0->multi_buffer = rx_cfg->q0_multi_buf;  in bna_rx_create()
2388 		q0->buffer_size = rx_cfg->q0_buf_size;  in bna_rx_create()
2389 		q0->num_vecs = rx_cfg->q0_num_vecs;  in bna_rx_create()
2412 			q1->rcb->q_depth = rx_cfg->q1_depth;  in bna_rx_create()
2413 			q1->q_depth = rx_cfg->q1_depth;  in bna_rx_create()
2419 			q1->buffer_size = (rx_cfg->rxp_type == BNA_RXP_HDS) ?  in bna_rx_create()
2420 					rx_cfg->hds_config.forced_offset  in bna_rx_create()
2421 					: rx_cfg->q1_buf_size;  in bna_rx_create()
2437 		cq_depth = rx_cfg->q0_depth +  in bna_rx_create()
2438 			((rx_cfg->rxp_type == BNA_RXP_SINGLE) ?  in bna_rx_create()
2439 			 0 : rx_cfg->q1_depth);  in bna_rx_create()
2471 	rx->hds_cfg = rx_cfg->hds_config;  in bna_rx_create()
2473 	bna_rxf_init(&rx->rxf, rx, rx_cfg, res_info);  in bna_rx_create()