Lines Matching refs:tg3_asic_rev
629 if (tg3_asic_rev(tp) == ASIC_REV_5906 && in tg3_write_mem()
654 if (tg3_asic_rev(tp) == ASIC_REV_5906 && in tg3_read_mem()
682 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_lock_init()
718 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_lock()
738 if (tg3_asic_rev(tp) == ASIC_REV_5761) { in tg3_ape_lock()
779 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_unlock()
799 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_ape_unlock()
1500 tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_mdio_start()
1598 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_mdio_init()
1819 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_poll_fw()
2020 tg3_asic_rev(tp) != ASIC_REV_5785) in tg3_adjust_link()
2047 if (tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_adjust_link()
2236 if (tg3_asic_rev(tp) != ASIC_REV_5784 || !enable) in tg3_phy_toggle_apd()
2426 (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_phy_eee_enable()
2427 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_phy_eee_enable()
2633 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_phy_reset()
2648 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_phy_reset()
2649 tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_phy_reset()
2650 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_phy_reset()
2658 if (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_phy_reset()
2756 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_phy_reset()
2789 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_function_status()
2790 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_set_function_status()
2799 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_function_status()
2800 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_set_function_status()
2813 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_pwrsrc_switch_to_vmain()
2814 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_pwrsrc_switch_to_vmain()
2815 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_pwrsrc_switch_to_vmain()
2838 tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_pwrsrc_die_with_vmain()
2839 tg3_asic_rev(tp) == ASIC_REV_5701) in tg3_pwrsrc_die_with_vmain()
2862 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_pwrsrc_switch_to_vaux()
2863 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_pwrsrc_switch_to_vaux()
2895 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_pwrsrc_switch_to_vaux()
2967 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_frob_aux_power()
2968 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_frob_aux_power()
2969 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_frob_aux_power()
3018 switch (tg3_asic_rev(tp)) { in tg3_phy_power_bug()
3043 switch (tg3_asic_rev(tp)) { in tg3_phy_led_bug()
3063 if (tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_power_down_phy()
3075 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_phy()
3502 if (tg3_asic_rev(tp) != ASIC_REV_5752 && in tg3_nvram_write_block_buffered()
3636 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_halt_cpu()
3710 if (tg3_flag(tp, 5705_PLUS) && tg3_asic_rev(tp) != ASIC_REV_57766) in tg3_load_firmware_cpu()
3715 if (tg3_asic_rev(tp) != ASIC_REV_57766) { in tg3_load_firmware_cpu()
3915 if (tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_load_tso_firmware()
3977 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in __tg3_set_mac_addr()
3978 tg3_asic_rev(tp) == ASIC_REV_5704) { in __tg3_set_mac_addr()
4104 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_prepare()
4152 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_power_down_prepare()
4185 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4186 tg3_asic_rev(tp) == ASIC_REV_5701)) { in tg3_power_down_prepare()
4197 tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_power_down_prepare()
4202 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4203 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_power_down_prepare()
4225 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_power_down_prepare()
4226 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_power_down_prepare()
4367 switch (tg3_asic_rev(tp)) { in tg3_phy_autoneg_cfg()
4445 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_phy_copper_begin()
4746 if (tg3_asic_rev(tp) != ASIC_REV_5717) in tg3_setup_eee()
4785 if ((tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_setup_copper_phy()
4786 tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_setup_copper_phy()
4787 tg3_asic_rev(tp) == ASIC_REV_5705) && in tg3_setup_copper_phy()
4847 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_setup_copper_phy()
4848 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_setup_copper_phy()
5015 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_setup_copper_phy()
5046 if (tg3_asic_rev(tp) == ASIC_REV_5700 && in tg3_setup_copper_phy()
5807 if ((tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_setup_fiber_mii_phy()
5808 tg3_asic_rev(tp) == ASIC_REV_5720) && in tg3_setup_fiber_mii_phy()
5859 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_setup_fiber_mii_phy()
5928 if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_setup_fiber_mii_phy()
6082 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_setup_phy()
6083 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_setup_phy()
7692 if (tg3_asic_rev(tp) == ASIC_REV_5762 && mss) { in tg3_4g_tso_overflow_test()
7833 if (tg3_asic_rev(tp) != ASIC_REV_5701) in tigon3_dma_hwbug_workaround()
8031 tg3_asic_rev(tp) == ASIC_REV_5705) { in __tg3_start_xmit()
8248 tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_mac_loopback()
8307 tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_phy_lpbk_set()
8331 if (tg3_asic_rev(tp) == ASIC_REV_5700) { in tg3_phy_lpbk_set()
9079 switch (tg3_asic_rev(tp)) { in tg3_override_clk()
9100 switch (tg3_asic_rev(tp)) { in tg3_restore_clk()
9145 if (tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_chip_reset()
9184 if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_chip_reset()
9194 if (tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_chip_reset()
9206 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_chip_reset()
9325 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_chip_reset()
9350 tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_chip_reset()
9362 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_chip_reset()
9589 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_tx_rcbs_disable()
9631 else if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_rx_ret_rcbs_disable()
9632 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_rx_ret_rcbs_disable()
9742 tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_setup_rxbd_thresholds()
9743 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_setup_rxbd_thresholds()
9746 else if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_setup_rxbd_thresholds()
9747 tg3_asic_rev(tp) == ASIC_REV_5787) in tg3_setup_rxbd_thresholds()
9925 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_lso_rd_dma_workaround_bit()
9988 if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_reset_hw()
10113 tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_reset_hw()
10114 tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_reset_hw()
10117 } else if (tg3_asic_rev(tp) != ASIC_REV_5784 && in tg3_reset_hw()
10118 tg3_asic_rev(tp) != ASIC_REV_5761) { in tg3_reset_hw()
10168 } else if (tg3_asic_rev(tp) != ASIC_REV_5705) { in tg3_reset_hw()
10170 if (tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_reset_hw()
10208 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_reset_hw()
10210 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_reset_hw()
10211 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_reset_hw()
10278 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10320 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10321 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10341 if (tg3_asic_rev(tp) == ASIC_REV_5717) in tg3_reset_hw()
10344 if (tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_reset_hw()
10345 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10346 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_reset_hw()
10351 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_reset_hw()
10364 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_reset_hw()
10378 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10379 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_reset_hw()
10382 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10383 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10386 if (tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_reset_hw()
10387 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_reset_hw()
10388 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_reset_hw()
10389 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_reset_hw()
10393 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10400 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10411 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_reset_hw()
10412 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10413 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10416 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10499 tg3_asic_rev(tp) != ASIC_REV_5700) in tg3_reset_hw()
10517 if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_reset_hw()
10521 if (tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_reset_hw()
10556 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_reset_hw()
10572 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_reset_hw()
10583 if (tg3_asic_rev(tp) == ASIC_REV_5703) { in tg3_reset_hw()
10586 } else if (tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_reset_hw()
10597 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_reset_hw()
10598 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_reset_hw()
10615 if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_reset_hw()
10644 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_reset_hw()
10660 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_reset_hw()
10663 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_reset_hw()
10664 tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_reset_hw()
10688 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_reset_hw()
10713 if ((tg3_asic_rev(tp) == ASIC_REV_5704) && in tg3_reset_hw()
10735 if (tg3_asic_rev(tp) == ASIC_REV_5704 && in tg3_reset_hw()
10742 tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_reset_hw()
11005 if (tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_periodic_fetch_stats()
11006 tg3_asic_rev(tp) != ASIC_REV_5762 && in tg3_periodic_fetch_stats()
11058 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_timer()
11194 tg3_asic_rev(tp) != ASIC_REV_5717 && in tg3_timer_init()
11796 if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_open()
11870 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_calc_crc_errors()
11871 tg3_asic_rev(tp) == ASIC_REV_5701)) { in tg3_calc_crc_errors()
12557 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_ringparam()
12558 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_set_ringparam()
12559 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_set_ringparam()
12667 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_set_pauseparam()
12668 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_set_pauseparam()
12669 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_set_pauseparam()
13435 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_test_memory()
13439 else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_test_memory()
13551 tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_run_loopback()
13737 if (tg3_asic_rev(tp) != ASIC_REV_5780 && in tg3_test_loopback()
14339 if (tg3_asic_rev(tp) == ASIC_REV_57766 || in tg3_change_mtu()
14340 tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_change_mtu()
14341 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_change_mtu()
14342 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_change_mtu()
14455 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_get_nvram_info()
14896 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_get_5720_nvram_info()
14980 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_get_5720_nvram_info()
15027 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_get_5720_nvram_info()
15041 if (tg3_asic_rev(tp) == ASIC_REV_5762) { in tg3_get_5720_nvram_info()
15076 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_nvram_init()
15077 tg3_asic_rev(tp) != ASIC_REV_5701) { in tg3_nvram_init()
15090 if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_nvram_init()
15092 else if (tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_nvram_init()
15094 else if (tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_nvram_init()
15095 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_nvram_init()
15096 tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_nvram_init()
15098 else if (tg3_asic_rev(tp) == ASIC_REV_5761) in tg3_nvram_init()
15100 else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_nvram_init()
15102 else if (tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_nvram_init()
15105 else if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_nvram_init()
15106 tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_nvram_init()
15108 else if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_nvram_init()
15109 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_nvram_init()
15222 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_eeprom_hw_cfg()
15250 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_get_eeprom_hw_cfg()
15251 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_get_eeprom_hw_cfg()
15252 tg3_asic_rev(tp) != ASIC_REV_5703 && in tg3_get_eeprom_hw_cfg()
15256 if (tg3_asic_rev(tp) == ASIC_REV_5785) in tg3_get_eeprom_hw_cfg()
15259 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_eeprom_hw_cfg()
15260 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_eeprom_hw_cfg()
15261 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_get_eeprom_hw_cfg()
15309 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_eeprom_hw_cfg()
15310 tg3_asic_rev(tp) == ASIC_REV_5701) in tg3_get_eeprom_hw_cfg()
15323 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_eeprom_hw_cfg()
15342 if ((tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_eeprom_hw_cfg()
15343 tg3_asic_rev(tp) == ASIC_REV_5701) && in tg3_get_eeprom_hw_cfg()
15391 (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_get_eeprom_hw_cfg()
15400 if (tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_get_eeprom_hw_cfg()
15635 (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_phy_probe()
15636 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_phy_probe()
15637 tg3_asic_rev(tp) == ASIC_REV_57766 || in tg3_phy_probe()
15638 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_phy_probe()
15639 (tg3_asic_rev(tp) == ASIC_REV_5717 && in tg3_phy_probe()
15641 (tg3_asic_rev(tp) == ASIC_REV_57765 && in tg3_phy_probe()
15740 if (tg3_asic_rev(tp) == ASIC_REV_5717) { in tg3_read_vpd()
15748 } else if (tg3_asic_rev(tp) == ASIC_REV_57780) { in tg3_read_vpd()
15759 } else if (tg3_asic_rev(tp) == ASIC_REV_57765) { in tg3_read_vpd()
15774 } else if (tg3_asic_rev(tp) == ASIC_REV_57766) { in tg3_read_vpd()
15785 } else if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_read_vpd()
16026 if (tg3_asic_rev(tp) != ASIC_REV_5762) in tg3_read_otp_ver()
16132 if (tg3_asic_rev(tp) == ASIC_REV_USE_PROD_ID_REG) { in tg3_detect_asic_rev()
16178 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_detect_asic_rev()
16179 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_detect_asic_rev()
16180 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_detect_asic_rev()
16183 if (tg3_asic_rev(tp) == ASIC_REV_57765 || in tg3_detect_asic_rev()
16184 tg3_asic_rev(tp) == ASIC_REV_57766) in tg3_detect_asic_rev()
16188 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_detect_asic_rev()
16192 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_detect_asic_rev()
16193 tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_detect_asic_rev()
16194 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_detect_asic_rev()
16195 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_detect_asic_rev()
16196 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_detect_asic_rev()
16197 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_detect_asic_rev()
16201 if (tg3_asic_rev(tp) == ASIC_REV_5780 || in tg3_detect_asic_rev()
16202 tg3_asic_rev(tp) == ASIC_REV_5714) in tg3_detect_asic_rev()
16205 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_detect_asic_rev()
16206 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_detect_asic_rev()
16207 tg3_asic_rev(tp) == ASIC_REV_5906 || in tg3_detect_asic_rev()
16212 if (tg3_asic_rev(tp) == ASIC_REV_5705 || in tg3_detect_asic_rev()
16222 if ((tg3_asic_rev(tp) == ASIC_REV_5703 && in tg3_10_100_only_device()
16228 if (tg3_asic_rev(tp) == ASIC_REV_5705) { in tg3_10_100_only_device()
16330 if (tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_get_invariants()
16390 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_invariants()
16391 tg3_asic_rev(tp) == ASIC_REV_5714) in tg3_get_invariants()
16400 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16405 if (tg3_asic_rev(tp) == ASIC_REV_5750 && in tg3_get_invariants()
16408 } else if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_get_invariants()
16409 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_get_invariants()
16413 if (tg3_asic_rev(tp) == ASIC_REV_5705) in tg3_get_invariants()
16438 if (tg3_asic_rev(tp) == ASIC_REV_57766) in tg3_get_invariants()
16447 (tg3_asic_rev(tp) == ASIC_REV_5714 && in tg3_get_invariants()
16453 tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16469 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16470 tg3_asic_rev(tp) == ASIC_REV_5720) in tg3_get_invariants()
16475 tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16478 if (tg3_asic_rev(tp) == ASIC_REV_5719) in tg3_get_invariants()
16481 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16482 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16483 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_get_invariants()
16484 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16506 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16510 if (tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_get_invariants()
16511 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_get_invariants()
16518 } else if (tg3_asic_rev(tp) == ASIC_REV_5785) { in tg3_get_invariants()
16551 if (tg3_asic_rev(tp) == ASIC_REV_5703 && in tg3_get_invariants()
16620 else if (tg3_asic_rev(tp) == ASIC_REV_5701 || in tg3_get_invariants()
16654 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_get_invariants()
16663 (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16664 tg3_asic_rev(tp) == ASIC_REV_5701))) in tg3_get_invariants()
16676 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_invariants()
16684 } else if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16685 tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_get_invariants()
16686 tg3_asic_rev(tp) == ASIC_REV_5720) { in tg3_get_invariants()
16691 if (tg3_asic_rev(tp) == ASIC_REV_5717) in tg3_get_invariants()
16740 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16747 else if (tg3_asic_rev(tp) == ASIC_REV_5752) in tg3_get_invariants()
16750 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_get_invariants()
16751 tg3_asic_rev(tp) == ASIC_REV_57780 || in tg3_get_invariants()
16765 if (tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16779 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16788 if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_invariants()
16792 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_get_invariants()
16793 (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_get_invariants()
16808 tg3_asic_rev(tp) != ASIC_REV_5785 && in tg3_get_invariants()
16809 tg3_asic_rev(tp) != ASIC_REV_57780 && in tg3_get_invariants()
16811 if (tg3_asic_rev(tp) == ASIC_REV_5755 || in tg3_get_invariants()
16812 tg3_asic_rev(tp) == ASIC_REV_5787 || in tg3_get_invariants()
16813 tg3_asic_rev(tp) == ASIC_REV_5784 || in tg3_get_invariants()
16814 tg3_asic_rev(tp) == ASIC_REV_5761) { in tg3_get_invariants()
16824 if (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_get_invariants()
16842 if (tg3_asic_rev(tp) == ASIC_REV_5717 || in tg3_get_invariants()
16843 tg3_asic_rev(tp) == ASIC_REV_5762 || in tg3_get_invariants()
16850 if (tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_get_invariants()
16851 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_get_invariants()
16860 if (tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_get_invariants()
16861 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_get_invariants()
16908 if (tg3_asic_rev(tp) == ASIC_REV_57766 && in tg3_get_invariants()
16915 if (tg3_asic_rev(tp) == ASIC_REV_5705 && in tg3_get_invariants()
16921 tg3_asic_rev(tp) != ASIC_REV_5700) in tg3_get_invariants()
16954 if (tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_get_invariants()
16964 if (tg3_asic_rev(tp) == ASIC_REV_5700) in tg3_get_invariants()
16974 tg3_asic_rev(tp) == ASIC_REV_5701 && in tg3_get_invariants()
16991 if (tg3_asic_rev(tp) == ASIC_REV_5701 && in tg3_get_invariants()
17008 if (tg3_asic_rev(tp) == ASIC_REV_5750 || in tg3_get_invariants()
17009 tg3_asic_rev(tp) == ASIC_REV_5752 || in tg3_get_invariants()
17010 tg3_asic_rev(tp) == ASIC_REV_5755) in tg3_get_invariants()
17036 if (tg3_asic_rev(tp) == ASIC_REV_5704 || in tg3_get_device_address()
17049 } else if (tg3_asic_rev(tp) == ASIC_REV_5906) in tg3_get_device_address()
17112 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_calc_dma_bndry()
17113 tg3_asic_rev(tp) != ASIC_REV_5701 && in tg3_calc_dma_bndry()
17351 if (tg3_asic_rev(tp) == ASIC_REV_5705 || in tg3_test_dma()
17352 tg3_asic_rev(tp) == ASIC_REV_5750) in tg3_test_dma()
17357 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_test_dma()
17358 tg3_asic_rev(tp) == ASIC_REV_5704) { in tg3_test_dma()
17367 tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_test_dma()
17372 if (tg3_asic_rev(tp) == ASIC_REV_5703) in tg3_test_dma()
17379 } else if (tg3_asic_rev(tp) == ASIC_REV_5780) { in tg3_test_dma()
17382 } else if (tg3_asic_rev(tp) == ASIC_REV_5714) { in tg3_test_dma()
17392 if (tg3_asic_rev(tp) == ASIC_REV_5703 || in tg3_test_dma()
17393 tg3_asic_rev(tp) == ASIC_REV_5704) in tg3_test_dma()
17396 if (tg3_asic_rev(tp) == ASIC_REV_5700 || in tg3_test_dma()
17397 tg3_asic_rev(tp) == ASIC_REV_5701) { in tg3_test_dma()
17417 if (tg3_asic_rev(tp) != ASIC_REV_5700 && in tg3_test_dma()
17418 tg3_asic_rev(tp) != ASIC_REV_5701) in tg3_test_dma()
17523 if (tg3_asic_rev(tp) == ASIC_REV_5906) { in tg3_init_bufmgr_config()
17852 tg3_asic_rev(tp) == ASIC_REV_5761 || in tg3_init_one()
17853 (tg3_asic_rev(tp) == ASIC_REV_5784 && in tg3_init_one()
17855 tg3_asic_rev(tp) == ASIC_REV_5785 || in tg3_init_one()
17856 tg3_asic_rev(tp) == ASIC_REV_57780) in tg3_init_one()
17869 if (tg3_asic_rev(tp) != ASIC_REV_5780 && in tg3_init_one()
17960 if (tg3_asic_rev(tp) == ASIC_REV_5719 || in tg3_init_one()
17961 tg3_asic_rev(tp) == ASIC_REV_5720 || in tg3_init_one()
17962 tg3_asic_rev(tp) == ASIC_REV_5762) in tg3_init_one()