Lines Matching refs:GRC_MODE
3549 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3550 tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
3560 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3561 tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
6451 tg3_rd32_loop(tp, regs, GRC_MODE, 0x4c); in tg3_dump_legacy_regs()
9316 tw32(GRC_MODE, tp->grc_mode); in tg3_chip_reset()
10004 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
10008 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
10014 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
10019 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
10023 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
10030 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
10041 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
10045 tw32(GRC_MODE, val | GRC_MODE_PCIE_DL_SEL); in tg3_reset_hw()
10053 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
10147 tw32(GRC_MODE, tp->grc_mode | val); in tg3_reset_hw()
16859 val = tr32(GRC_MODE); in tg3_get_invariants()
16870 tw32(GRC_MODE, val | tp->grc_mode); in tg3_get_invariants()