1 /* Broadcom NetXtreme-C/E network driver.
3  * Copyright (c) 2014-2016 Broadcom Corporation
4  * Copyright (c) 2016-2019 Broadcom Limited
25 #include <linux/dma-mapping.h>
92 	[BCM57301] = { "Broadcom BCM57301 NetXtreme-C 10Gb Ethernet" },
93 	[BCM57302] = { "Broadcom BCM57302 NetXtreme-C 10Gb/25Gb Ethernet" },
94 	[BCM57304] = { "Broadcom BCM57304 NetXtreme-C 10Gb/25Gb/40Gb/50Gb Ethernet" },
95 	[BCM57417_NPAR] = { "Broadcom BCM57417 NetXtreme-E Ethernet Partition" },
97 	[BCM57311] = { "Broadcom BCM57311 NetXtreme-C 10Gb Ethernet" },
98 	[BCM57312] = { "Broadcom BCM57312 NetXtreme-C 10Gb/25Gb Ethernet" },
99 	[BCM57402] = { "Broadcom BCM57402 NetXtreme-E 10Gb Ethernet" },
100 	[BCM57404] = { "Broadcom BCM57404 NetXtreme-E 10Gb/25Gb Ethernet" },
101 	[BCM57406] = { "Broadcom BCM57406 NetXtreme-E 10GBase-T Ethernet" },
102 	[BCM57402_NPAR] = { "Broadcom BCM57402 NetXtreme-E Ethernet Partition" },
103 	[BCM57407] = { "Broadcom BCM57407 NetXtreme-E 10GBase-T Ethernet" },
104 	[BCM57412] = { "Broadcom BCM57412 NetXtreme-E 10Gb Ethernet" },
105 	[BCM57414] = { "Broadcom BCM57414 NetXtreme-E 10Gb/25Gb Ethernet" },
106 	[BCM57416] = { "Broadcom BCM57416 NetXtreme-E 10GBase-T Ethernet" },
107 	[BCM57417] = { "Broadcom BCM57417 NetXtreme-E 10GBase-T Ethernet" },
108 	[BCM57412_NPAR] = { "Broadcom BCM57412 NetXtreme-E Ethernet Partition" },
109 	[BCM57314] = { "Broadcom BCM57314 NetXtreme-C 10Gb/25Gb/40Gb/50Gb Ethernet" },
110 	[BCM57417_SFP] = { "Broadcom BCM57417 NetXtreme-E 10Gb/25Gb Ethernet" },
111 	[BCM57416_SFP] = { "Broadcom BCM57416 NetXtreme-E 10Gb Ethernet" },
112 	[BCM57404_NPAR] = { "Broadcom BCM57404 NetXtreme-E Ethernet Partition" },
113 	[BCM57406_NPAR] = { "Broadcom BCM57406 NetXtreme-E Ethernet Partition" },
114 	[BCM57407_SFP] = { "Broadcom BCM57407 NetXtreme-E 25Gb Ethernet" },
115 	[BCM57407_NPAR] = { "Broadcom BCM57407 NetXtreme-E Ethernet Partition" },
116 	[BCM57414_NPAR] = { "Broadcom BCM57414 NetXtreme-E Ethernet Partition" },
117 	[BCM57416_NPAR] = { "Broadcom BCM57416 NetXtreme-E Ethernet Partition" },
118 	[BCM57452] = { "Broadcom BCM57452 NetXtreme-E 10Gb/25Gb/40Gb/50Gb Ethernet" },
119 	[BCM57454] = { "Broadcom BCM57454 NetXtreme-E 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
120 	[BCM5745x_NPAR] = { "Broadcom BCM5745x NetXtreme-E Ethernet Partition" },
121 	[BCM57508] = { "Broadcom BCM57508 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet" },
122 	[BCM57504] = { "Broadcom BCM57504 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet" },
123 	[BCM57502] = { "Broadcom BCM57502 NetXtreme-E 10Gb/25Gb/50Gb Ethernet" },
124 	[BCM57608] = { "Broadcom BCM57608 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb/400Gb Ethernet" },
125 	[BCM57604] = { "Broadcom BCM57604 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet" },
126 	[BCM57602] = { "Broadcom BCM57602 NetXtreme-E 10Gb/25Gb/50Gb/100Gb Ethernet" },
127 	[BCM57601] = { "Broadcom BCM57601 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb/400Gb Ethernet" },
128 	[BCM57508_NPAR] = { "Broadcom BCM57508 NetXtreme-E Ethernet Partition" },
129 	[BCM57504_NPAR] = { "Broadcom BCM57504 NetXtreme-E Ethernet Partition" },
130 	[BCM57502_NPAR] = { "Broadcom BCM57502 NetXtreme-E Ethernet Partition" },
131 	[BCM58802] = { "Broadcom BCM58802 NetXtreme-S 10Gb/25Gb/40Gb/50Gb Ethernet" },
132 	[BCM58804] = { "Broadcom BCM58804 NetXtreme-S 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
133 	[BCM58808] = { "Broadcom BCM58808 NetXtreme-S 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
134 	[NETXTREME_E_VF] = { "Broadcom NetXtreme-E Ethernet Virtual Function" },
135 	[NETXTREME_C_VF] = { "Broadcom NetXtreme-C Ethernet Virtual Function" },
136 	[NETXTREME_S_VF] = { "Broadcom NetXtreme-S Ethernet Virtual Function" },
137 	[NETXTREME_C_VF_HV] = { "Broadcom NetXtreme-C Virtual Function for Hyper-V" },
138 	[NETXTREME_E_VF_HV] = { "Broadcom NetXtreme-E Virtual Function for Hyper-V" },
139 	[NETXTREME_E_P5_VF] = { "Broadcom BCM5750X NetXtreme-E Ethernet Virtual Function" },
140 	[NETXTREME_E_P5_VF_HV] = { "Broadcom BCM5750X NetXtreme-E Virtual Function for Hyper-V" },
307 	writel(DB_CP_FLAGS | DB_RING_IDX(db, idx), (db)->doorbell)
310 	bnxt_writeq(bp, (db)->db_key64 | DBR_TYPE_NQ | DB_RING_IDX(db, idx),\
311 		    (db)->doorbell)
314 	bnxt_writeq(bp, (db)->db_key64 | DBR_TYPE_NQ_MASK |		\
315 		    DB_RING_IDX(db, idx), (db)->doorbell)
318 	writel(DB_CP_REARM_FLAGS | DB_RING_IDX(db, idx), (db)->doorbell)
321 	bnxt_writeq(bp, (db)->db_key64 | DBR_TYPE_NQ_ARM |		\
322 		    DB_RING_IDX(db, idx), (db)->doorbell)
326 	if (bp->flags & BNXT_FLAG_CHIP_P7)  in bnxt_db_nq()
328 	else if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_db_nq()
336 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_db_nq_arm()
344 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_db_cq()
345 		bnxt_writeq(bp, db->db_key64 | DBR_TYPE_CQ_ARMALL |  in bnxt_db_cq()
346 			    DB_RING_IDX(db, idx), db->doorbell);  in bnxt_db_cq()
353 	if (!(test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)))  in bnxt_queue_fw_reset_work()
357 		queue_delayed_work(bnxt_pf_wq, &bp->fw_reset_task, delay);  in bnxt_queue_fw_reset_work()
359 		schedule_delayed_work(&bp->fw_reset_task, delay);  in bnxt_queue_fw_reset_work()
365 		queue_work(bnxt_pf_wq, &bp->sp_task);  in __bnxt_queue_sp_work()
367 		schedule_work(&bp->sp_task);  in __bnxt_queue_sp_work()
372 	set_bit(event, &bp->sp_event);  in bnxt_queue_sp_work()
378 	if (!rxr->bnapi->in_reset) {  in bnxt_sched_reset_rxr()
379 		rxr->bnapi->in_reset = true;  in bnxt_sched_reset_rxr()
380 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_sched_reset_rxr()
381 			set_bit(BNXT_RESET_TASK_SP_EVENT, &bp->sp_event);  in bnxt_sched_reset_rxr()
383 			set_bit(BNXT_RST_RING_SP_EVENT, &bp->sp_event);  in bnxt_sched_reset_rxr()
386 	rxr->rx_next_cons = 0xffff;  in bnxt_sched_reset_rxr()
392 	struct bnxt_napi *bnapi = txr->bnapi;  in bnxt_sched_reset_txr()
394 	if (bnapi->tx_fault)  in bnxt_sched_reset_txr()
397 	netdev_err(bp->dev, "Invalid Tx completion (ring:%d tx_hw_cons:%u cons:%u prod:%u curr:%u)",  in bnxt_sched_reset_txr()
398 		   txr->txq_index, txr->tx_hw_cons,  in bnxt_sched_reset_txr()
399 		   txr->tx_cons, txr->tx_prod, curr);  in bnxt_sched_reset_txr()
401 	bnapi->tx_fault = 1;  in bnxt_sched_reset_txr()
431 	if (!md_dst || md_dst->type != METADATA_HW_PORT_MUX)  in bnxt_xmit_get_cfa_action()
434 	return md_dst->u.port_info.port_id;  in bnxt_xmit_get_cfa_action()
442 	bnxt_db_write(bp, &txr->tx_db, prod);  in bnxt_txr_db_kick()
443 	txr->kick_pending = 0;  in bnxt_txr_db_kick()
456 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;  in bnxt_start_xmit()
457 	struct pci_dev *pdev = bp->pdev;  in bnxt_start_xmit()
464 	if (unlikely(i >= bp->tx_nr_rings)) {  in bnxt_start_xmit()
471 	txr = &bp->tx_ring[bp->tx_ring_map[i]];  in bnxt_start_xmit()
472 	prod = txr->tx_prod;  in bnxt_start_xmit()
475 	if (unlikely(free_size < skb_shinfo(skb)->nr_frags + 2)) {  in bnxt_start_xmit()
477 		if (net_ratelimit() && txr->kick_pending)  in bnxt_start_xmit()
481 					bp->tx_wake_thresh))  in bnxt_start_xmit()
488 	length = skb->len;  in bnxt_start_xmit()
490 	last_frag = skb_shinfo(skb)->nr_frags;  in bnxt_start_xmit()
492 	txbd = &txr->tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)];  in bnxt_start_xmit()
494 	tx_buf = &txr->tx_buf_ring[RING_TX(bp, prod)];  in bnxt_start_xmit()
495 	tx_buf->skb = skb;  in bnxt_start_xmit()
496 	tx_buf->nr_frags = last_frag;  in bnxt_start_xmit()
506 		if (skb->vlan_proto == htons(ETH_P_8021Q))  in bnxt_start_xmit()
510 	if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && ptp &&  in bnxt_start_xmit()
511 	    ptp->tx_tstamp_en) {  in bnxt_start_xmit()
512 		if (bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP) {  in bnxt_start_xmit()
514 			tx_buf->is_ts_pkt = 1;  in bnxt_start_xmit()
515 			skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;  in bnxt_start_xmit()
524 				tx_buf->is_ts_pkt = 1;  in bnxt_start_xmit()
525 				skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;  in bnxt_start_xmit()
527 				ptp->txts_req[txts_prod].tx_seqid = seq_id;  in bnxt_start_xmit()
528 				ptp->txts_req[txts_prod].tx_hdr_off = hdr_off;  in bnxt_start_xmit()
529 				tx_buf->txts_prod = txts_prod;  in bnxt_start_xmit()
533 	if (unlikely(skb->no_fcs))  in bnxt_start_xmit()
536 	if (free_size == bp->tx_ring_size && length <= bp->tx_push_thresh &&  in bnxt_start_xmit()
538 		struct tx_push_buffer *tx_push_buf = txr->tx_push;  in bnxt_start_xmit()
539 		struct tx_push_bd *tx_push = &tx_push_buf->push_bd;  in bnxt_start_xmit()
540 		struct tx_bd_ext *tx_push1 = &tx_push->txbd2;  in bnxt_start_xmit()
541 		void __iomem *db = txr->tx_db.doorbell;  in bnxt_start_xmit()
542 		void *pdata = tx_push_buf->data;  in bnxt_start_xmit()
547 		tx_push->tx_bd_len_flags_type =  in bnxt_start_xmit()
555 		if (skb->ip_summed == CHECKSUM_PARTIAL)  in bnxt_start_xmit()
556 			tx_push1->tx_bd_hsize_lflags =  in bnxt_start_xmit()
559 			tx_push1->tx_bd_hsize_lflags = 0;  in bnxt_start_xmit()
561 		tx_push1->tx_bd_cfa_meta = cpu_to_le32(vlan_tag_flags);  in bnxt_start_xmit()
562 		tx_push1->tx_bd_cfa_action =  in bnxt_start_xmit()
566 		end = PTR_ALIGN(end, 8) - 1;  in bnxt_start_xmit()
572 			skb_frag_t *frag = &skb_shinfo(skb)->frags[j];  in bnxt_start_xmit()
583 		txbd->tx_bd_len_flags_type = tx_push->tx_bd_len_flags_type;  in bnxt_start_xmit()
584 		txbd->tx_bd_haddr = txr->data_mapping;  in bnxt_start_xmit()
585 		txbd->tx_bd_opaque = SET_TX_OPAQUE(bp, txr, prod, 2);  in bnxt_start_xmit()
587 		tx_push->tx_bd_opaque = txbd->tx_bd_opaque;  in bnxt_start_xmit()
588 		txbd = &txr->tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)];  in bnxt_start_xmit()
591 		tx_push->doorbell =  in bnxt_start_xmit()
593 				    DB_RING_IDX(&txr->tx_db, prod));  in bnxt_start_xmit()
594 		WRITE_ONCE(txr->tx_prod, prod);  in bnxt_start_xmit()
596 		tx_buf->is_push = 1;  in bnxt_start_xmit()
597 		netdev_tx_sent_queue(txq, skb->len);  in bnxt_start_xmit()
604 					 (push_len - 16) << 1);  in bnxt_start_xmit()
614 		pad = BNXT_MIN_PKT_SIZE - length;  in bnxt_start_xmit()
621 	mapping = dma_map_single(&pdev->dev, skb->data, len, DMA_TO_DEVICE);  in bnxt_start_xmit()
623 	if (unlikely(dma_mapping_error(&pdev->dev, mapping)))  in bnxt_start_xmit()
630 	txbd->tx_bd_haddr = cpu_to_le64(mapping);  in bnxt_start_xmit()
631 	txbd->tx_bd_opaque = SET_TX_OPAQUE(bp, txr, prod, 2 + last_frag);  in bnxt_start_xmit()
635 		&txr->tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)];  in bnxt_start_xmit()
637 	txbd1->tx_bd_hsize_lflags = lflags;  in bnxt_start_xmit()
639 		bool udp_gso = !!(skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4);  in bnxt_start_xmit()
642 		if (skb->encapsulation) {  in bnxt_start_xmit()
655 		txbd1->tx_bd_hsize_lflags |= cpu_to_le32(TX_BD_FLAGS_LSO |  in bnxt_start_xmit()
657 					(hdr_len << (TX_BD_HSIZE_SHIFT - 1)));  in bnxt_start_xmit()
658 		length = skb_shinfo(skb)->gso_size;  in bnxt_start_xmit()
659 		txbd1->tx_bd_mss = cpu_to_le32(length);  in bnxt_start_xmit()
661 	} else if (skb->ip_summed == CHECKSUM_PARTIAL) {  in bnxt_start_xmit()
662 		txbd1->tx_bd_hsize_lflags |=  in bnxt_start_xmit()
664 		txbd1->tx_bd_mss = 0;  in bnxt_start_xmit()
669 		dev_warn_ratelimited(&pdev->dev, "Dropped oversize %d bytes TX packet.\n",  in bnxt_start_xmit()
670 				     skb->len);  in bnxt_start_xmit()
675 	txbd->tx_bd_len_flags_type = cpu_to_le32(flags);  in bnxt_start_xmit()
677 	txbd1->tx_bd_cfa_meta = cpu_to_le32(vlan_tag_flags);  in bnxt_start_xmit()
678 	txbd1->tx_bd_cfa_action =  in bnxt_start_xmit()
682 		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];  in bnxt_start_xmit()
685 		txbd = &txr->tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)];  in bnxt_start_xmit()
688 		mapping = skb_frag_dma_map(&pdev->dev, frag, 0, len,  in bnxt_start_xmit()
691 		if (unlikely(dma_mapping_error(&pdev->dev, mapping)))  in bnxt_start_xmit()
694 		tx_buf = &txr->tx_buf_ring[RING_TX(bp, prod)];  in bnxt_start_xmit()
697 		txbd->tx_bd_haddr = cpu_to_le64(mapping);  in bnxt_start_xmit()
700 		txbd->tx_bd_len_flags_type = cpu_to_le32(flags);  in bnxt_start_xmit()
704 	txbd->tx_bd_len_flags_type =  in bnxt_start_xmit()
708 	netdev_tx_sent_queue(txq, skb->len);  in bnxt_start_xmit()
713 	WRITE_ONCE(txr->tx_prod, prod);  in bnxt_start_xmit()
718 		if (free_size >= bp->tx_wake_thresh)  in bnxt_start_xmit()
719 			txbd0->tx_bd_len_flags_type |=  in bnxt_start_xmit()
721 		txr->kick_pending = 1;  in bnxt_start_xmit()
727 		if (netdev_xmit_more() && !tx_buf->is_push) {  in bnxt_start_xmit()
728 			txbd0->tx_bd_len_flags_type &=  in bnxt_start_xmit()
734 				   bp->tx_wake_thresh);  in bnxt_start_xmit()
742 	prod = txr->tx_prod;  in bnxt_start_xmit()
743 	tx_buf = &txr->tx_buf_ring[RING_TX(bp, prod)];  in bnxt_start_xmit()
744 	dma_unmap_single(&pdev->dev, dma_unmap_addr(tx_buf, mapping),  in bnxt_start_xmit()
751 		tx_buf = &txr->tx_buf_ring[RING_TX(bp, prod)];  in bnxt_start_xmit()
752 		dma_unmap_page(&pdev->dev, dma_unmap_addr(tx_buf, mapping),  in bnxt_start_xmit()
753 			       skb_frag_size(&skb_shinfo(skb)->frags[i]),  in bnxt_start_xmit()
761 		txr->tx_buf_ring[txr->tx_prod].is_ts_pkt = 0;  in bnxt_start_xmit()
762 		atomic64_inc(&bp->ptp_cfg->stats.ts_err);  in bnxt_start_xmit()
763 		if (!(bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP))  in bnxt_start_xmit()
765 			ptp->txts_req[txts_prod].tx_skb = ERR_PTR(-EIO);  in bnxt_start_xmit()
767 	if (txr->kick_pending)  in bnxt_start_xmit()
768 		bnxt_txr_db_kick(bp, txr, txr->tx_prod);  in bnxt_start_xmit()
769 	txr->tx_buf_ring[txr->tx_prod].skb = NULL;  in bnxt_start_xmit()
778 	struct netdev_queue *txq = netdev_get_tx_queue(bp->dev, txr->txq_index);  in __bnxt_tx_int()
779 	struct pci_dev *pdev = bp->pdev;  in __bnxt_tx_int()
780 	u16 hw_cons = txr->tx_hw_cons;  in __bnxt_tx_int()
782 	u16 cons = txr->tx_cons;  in __bnxt_tx_int()
792 		tx_buf = &txr->tx_buf_ring[RING_TX(bp, cons)];  in __bnxt_tx_int()
793 		skb = tx_buf->skb;  in __bnxt_tx_int()
800 		is_ts_pkt = tx_buf->is_ts_pkt;  in __bnxt_tx_int()
801 		if (is_ts_pkt && (bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP)) {  in __bnxt_tx_int()
808 		tx_bytes += skb->len;  in __bnxt_tx_int()
809 		tx_buf->skb = NULL;  in __bnxt_tx_int()
810 		tx_buf->is_ts_pkt = 0;  in __bnxt_tx_int()
812 		if (tx_buf->is_push) {  in __bnxt_tx_int()
813 			tx_buf->is_push = 0;  in __bnxt_tx_int()
817 		dma_unmap_single(&pdev->dev, dma_unmap_addr(tx_buf, mapping),  in __bnxt_tx_int()
819 		last = tx_buf->nr_frags;  in __bnxt_tx_int()
823 			tx_buf = &txr->tx_buf_ring[RING_TX(bp, cons)];  in __bnxt_tx_int()
825 				&pdev->dev,  in __bnxt_tx_int()
827 				skb_frag_size(&skb_shinfo(skb)->frags[j]),  in __bnxt_tx_int()
833 				bnxt_get_tx_ts_p5(bp, skb, tx_buf->txts_prod);  in __bnxt_tx_int()
844 	WRITE_ONCE(txr->tx_cons, cons);  in __bnxt_tx_int()
847 				   bnxt_tx_avail(bp, txr), bp->tx_wake_thresh,  in __bnxt_tx_int()
848 				   READ_ONCE(txr->dev_state) == BNXT_DEV_STATE_CLOSING);  in __bnxt_tx_int()
860 		if (txr->tx_hw_cons != RING_TX(bp, txr->tx_cons))  in bnxt_tx_int()
864 		bnapi->events &= ~BNXT_TX_CMP_EVENT;  in bnxt_tx_int()
875 		page = page_pool_dev_alloc_frag(rxr->page_pool, offset,  in __bnxt_alloc_rx_page()
878 		page = page_pool_dev_alloc_pages(rxr->page_pool);  in __bnxt_alloc_rx_page()
892 	struct pci_dev *pdev = bp->pdev;  in __bnxt_alloc_rx_frag()
895 		data = napi_alloc_frag(bp->rx_buf_size);  in __bnxt_alloc_rx_frag()
897 		data = netdev_alloc_frag(bp->rx_buf_size);  in __bnxt_alloc_rx_frag()
901 	*mapping = dma_map_single_attrs(&pdev->dev, data + bp->rx_dma_offset,  in __bnxt_alloc_rx_frag()
902 					bp->rx_buf_use_size, bp->rx_dir,  in __bnxt_alloc_rx_frag()
905 	if (dma_mapping_error(&pdev->dev, *mapping)) {  in __bnxt_alloc_rx_frag()
915 	struct rx_bd *rxbd = &rxr->rx_desc_ring[RX_RING(bp, prod)][RX_IDX(prod)];  in bnxt_alloc_rx_data()
916 	struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[RING_RX(bp, prod)];  in bnxt_alloc_rx_data()
925 			return -ENOMEM;  in bnxt_alloc_rx_data()
927 		mapping += bp->rx_dma_offset;  in bnxt_alloc_rx_data()
928 		rx_buf->data = page;  in bnxt_alloc_rx_data()
929 		rx_buf->data_ptr = page_address(page) + offset + bp->rx_offset;  in bnxt_alloc_rx_data()
934 			return -ENOMEM;  in bnxt_alloc_rx_data()
936 		rx_buf->data = data;  in bnxt_alloc_rx_data()
937 		rx_buf->data_ptr = data + bp->rx_offset;  in bnxt_alloc_rx_data()
939 	rx_buf->mapping = mapping;  in bnxt_alloc_rx_data()
941 	rxbd->rx_bd_haddr = cpu_to_le64(mapping);  in bnxt_alloc_rx_data()
947 	u16 prod = rxr->rx_prod;  in bnxt_reuse_rx_data()
949 	struct bnxt *bp = rxr->bnapi->bp;  in bnxt_reuse_rx_data()
952 	prod_rx_buf = &rxr->rx_buf_ring[RING_RX(bp, prod)];  in bnxt_reuse_rx_data()
953 	cons_rx_buf = &rxr->rx_buf_ring[cons];  in bnxt_reuse_rx_data()
955 	prod_rx_buf->data = data;  in bnxt_reuse_rx_data()
956 	prod_rx_buf->data_ptr = cons_rx_buf->data_ptr;  in bnxt_reuse_rx_data()
958 	prod_rx_buf->mapping = cons_rx_buf->mapping;  in bnxt_reuse_rx_data()
960 	prod_bd = &rxr->rx_desc_ring[RX_RING(bp, prod)][RX_IDX(prod)];  in bnxt_reuse_rx_data()
961 	cons_bd = &rxr->rx_desc_ring[RX_RING(bp, cons)][RX_IDX(cons)];  in bnxt_reuse_rx_data()
963 	prod_bd->rx_bd_haddr = cons_bd->rx_bd_haddr;  in bnxt_reuse_rx_data()
968 	u16 next, max = rxr->rx_agg_bmap_size;  in bnxt_find_next_agg_idx()
970 	next = find_next_zero_bit(rxr->rx_agg_bmap, max, idx);  in bnxt_find_next_agg_idx()
972 		next = find_first_zero_bit(rxr->rx_agg_bmap, max);  in bnxt_find_next_agg_idx()
981 		&rxr->rx_agg_desc_ring[RX_AGG_RING(bp, prod)][RX_IDX(prod)];  in bnxt_alloc_rx_page()
985 	u16 sw_prod = rxr->rx_sw_agg_prod;  in bnxt_alloc_rx_page()
991 		return -ENOMEM;  in bnxt_alloc_rx_page()
993 	if (unlikely(test_bit(sw_prod, rxr->rx_agg_bmap)))  in bnxt_alloc_rx_page()
996 	__set_bit(sw_prod, rxr->rx_agg_bmap);  in bnxt_alloc_rx_page()
997 	rx_agg_buf = &rxr->rx_agg_ring[sw_prod];  in bnxt_alloc_rx_page()
998 	rxr->rx_sw_agg_prod = RING_RX_AGG(bp, NEXT_RX_AGG(sw_prod));  in bnxt_alloc_rx_page()
1000 	rx_agg_buf->page = page;  in bnxt_alloc_rx_page()
1001 	rx_agg_buf->offset = offset;  in bnxt_alloc_rx_page()
1002 	rx_agg_buf->mapping = mapping;  in bnxt_alloc_rx_page()
1003 	rxbd->rx_bd_haddr = cpu_to_le64(mapping);  in bnxt_alloc_rx_page()
1004 	rxbd->rx_bd_opaque = sw_prod;  in bnxt_alloc_rx_page()
1016 		&cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];  in bnxt_get_agg()
1024 	struct bnxt_tpa_info *tpa_info = &rxr->rx_tpa[agg_id];  in bnxt_get_tpa_agg_p5()
1026 	return &tpa_info->agg_arr[curr];  in bnxt_get_tpa_agg_p5()
1032 	struct bnxt_napi *bnapi = cpr->bnapi;  in bnxt_reuse_rx_agg_bufs()
1033 	struct bnxt *bp = bnapi->bp;  in bnxt_reuse_rx_agg_bufs()
1034 	struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;  in bnxt_reuse_rx_agg_bufs()
1035 	u16 prod = rxr->rx_agg_prod;  in bnxt_reuse_rx_agg_bufs()
1036 	u16 sw_prod = rxr->rx_sw_agg_prod;  in bnxt_reuse_rx_agg_bufs()
1040 	if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && tpa)  in bnxt_reuse_rx_agg_bufs()
1054 		cons = agg->rx_agg_cmp_opaque;  in bnxt_reuse_rx_agg_bufs()
1055 		__clear_bit(cons, rxr->rx_agg_bmap);  in bnxt_reuse_rx_agg_bufs()
1057 		if (unlikely(test_bit(sw_prod, rxr->rx_agg_bmap)))  in bnxt_reuse_rx_agg_bufs()
1060 		__set_bit(sw_prod, rxr->rx_agg_bmap);  in bnxt_reuse_rx_agg_bufs()
1061 		prod_rx_buf = &rxr->rx_agg_ring[sw_prod];  in bnxt_reuse_rx_agg_bufs()
1062 		cons_rx_buf = &rxr->rx_agg_ring[cons];  in bnxt_reuse_rx_agg_bufs()
1065 		 * set cons_rx_buf->page to NULL first.  in bnxt_reuse_rx_agg_bufs()
1067 		page = cons_rx_buf->page;  in bnxt_reuse_rx_agg_bufs()
1068 		cons_rx_buf->page = NULL;  in bnxt_reuse_rx_agg_bufs()
1069 		prod_rx_buf->page = page;  in bnxt_reuse_rx_agg_bufs()
1070 		prod_rx_buf->offset = cons_rx_buf->offset;  in bnxt_reuse_rx_agg_bufs()
1072 		prod_rx_buf->mapping = cons_rx_buf->mapping;  in bnxt_reuse_rx_agg_bufs()
1074 		prod_bd = &rxr->rx_agg_desc_ring[RX_AGG_RING(bp, prod)][RX_IDX(prod)];  in bnxt_reuse_rx_agg_bufs()
1076 		prod_bd->rx_bd_haddr = cpu_to_le64(cons_rx_buf->mapping);  in bnxt_reuse_rx_agg_bufs()
1077 		prod_bd->rx_bd_opaque = sw_prod;  in bnxt_reuse_rx_agg_bufs()
1082 	rxr->rx_agg_prod = prod;  in bnxt_reuse_rx_agg_bufs()
1083 	rxr->rx_sw_agg_prod = sw_prod;  in bnxt_reuse_rx_agg_bufs()
1094 	u16 prod = rxr->rx_prod;  in bnxt_rx_multi_page_skb()
1103 	dma_addr -= bp->rx_dma_offset;  in bnxt_rx_multi_page_skb()
1104 	dma_sync_single_for_cpu(&bp->pdev->dev, dma_addr, BNXT_RX_PAGE_SIZE,  in bnxt_rx_multi_page_skb()
1105 				bp->rx_dir);  in bnxt_rx_multi_page_skb()
1106 	skb = napi_build_skb(data_ptr - bp->rx_offset, BNXT_RX_PAGE_SIZE);  in bnxt_rx_multi_page_skb()
1108 		page_pool_recycle_direct(rxr->page_pool, page);  in bnxt_rx_multi_page_skb()
1112 	skb_reserve(skb, bp->rx_offset);  in bnxt_rx_multi_page_skb()
1128 	u16 prod = rxr->rx_prod;  in bnxt_rx_page_skb()
1137 	dma_addr -= bp->rx_dma_offset;  in bnxt_rx_page_skb()
1138 	dma_sync_single_for_cpu(&bp->pdev->dev, dma_addr, BNXT_RX_PAGE_SIZE,  in bnxt_rx_page_skb()
1139 				bp->rx_dir);  in bnxt_rx_page_skb()
1142 		payload = eth_get_headlen(bp->dev, data_ptr, len);  in bnxt_rx_page_skb()
1144 	skb = napi_alloc_skb(&rxr->bnapi->napi, payload);  in bnxt_rx_page_skb()
1146 		page_pool_recycle_direct(rxr->page_pool, page);  in bnxt_rx_page_skb()
1151 	off = (void *)data_ptr - page_address(page);  in bnxt_rx_page_skb()
1153 	memcpy(skb->data - NET_IP_ALIGN, data_ptr - NET_IP_ALIGN,  in bnxt_rx_page_skb()
1156 	frag = &skb_shinfo(skb)->frags[0];  in bnxt_rx_page_skb()
1159 	skb->data_len -= payload;  in bnxt_rx_page_skb()
1160 	skb->tail += payload;  in bnxt_rx_page_skb()
1171 	u16 prod = rxr->rx_prod;  in bnxt_rx_skb()
1181 	skb = napi_build_skb(data, bp->rx_buf_size);  in bnxt_rx_skb()
1182 	dma_unmap_single_attrs(&bp->pdev->dev, dma_addr, bp->rx_buf_use_size,  in bnxt_rx_skb()
1183 			       bp->rx_dir, DMA_ATTR_WEAK_ORDERING);  in bnxt_rx_skb()
1189 	skb_reserve(skb, bp->rx_offset);  in bnxt_rx_skb()
1200 	struct bnxt_napi *bnapi = cpr->bnapi;  in __bnxt_rx_agg_pages()
1201 	struct pci_dev *pdev = bp->pdev;  in __bnxt_rx_agg_pages()
1202 	struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;  in __bnxt_rx_agg_pages()
1203 	u16 prod = rxr->rx_agg_prod;  in __bnxt_rx_agg_pages()
1207 	if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && tpa)  in __bnxt_rx_agg_pages()
1211 		skb_frag_t *frag = &shinfo->frags[i];  in __bnxt_rx_agg_pages()
1222 		cons = agg->rx_agg_cmp_opaque;  in __bnxt_rx_agg_pages()
1223 		frag_len = (le32_to_cpu(agg->rx_agg_cmp_len_flags_type) &  in __bnxt_rx_agg_pages()
1226 		cons_rx_buf = &rxr->rx_agg_ring[cons];  in __bnxt_rx_agg_pages()
1227 		skb_frag_fill_page_desc(frag, cons_rx_buf->page,  in __bnxt_rx_agg_pages()
1228 					cons_rx_buf->offset, frag_len);  in __bnxt_rx_agg_pages()
1229 		shinfo->nr_frags = i + 1;  in __bnxt_rx_agg_pages()
1230 		__clear_bit(cons, rxr->rx_agg_bmap);  in __bnxt_rx_agg_pages()
1236 		mapping = cons_rx_buf->mapping;  in __bnxt_rx_agg_pages()
1237 		page = cons_rx_buf->page;  in __bnxt_rx_agg_pages()
1238 		cons_rx_buf->page = NULL;  in __bnxt_rx_agg_pages()
1244 			--shinfo->nr_frags;  in __bnxt_rx_agg_pages()
1245 			cons_rx_buf->page = page;  in __bnxt_rx_agg_pages()
1250 			rxr->rx_agg_prod = prod;  in __bnxt_rx_agg_pages()
1251 			bnxt_reuse_rx_agg_bufs(cpr, idx, i, agg_bufs - i, tpa);  in __bnxt_rx_agg_pages()
1255 		dma_sync_single_for_cpu(&pdev->dev, mapping, BNXT_RX_PAGE_SIZE,  in __bnxt_rx_agg_pages()
1256 					bp->rx_dir);  in __bnxt_rx_agg_pages()
1261 	rxr->rx_agg_prod = prod;  in __bnxt_rx_agg_pages()
1281 	skb->data_len += total_frag_len;  in bnxt_rx_agg_pages_skb()
1282 	skb->len += total_frag_len;  in bnxt_rx_agg_pages_skb()
1283 	skb->truesize += BNXT_RX_PAGE_SIZE * agg_bufs;  in bnxt_rx_agg_pages_skb()
1296 		shinfo->nr_frags = 0;  in bnxt_rx_agg_pages_xdp()
1302 		shinfo->nr_frags = agg_bufs;  in bnxt_rx_agg_pages_xdp()
1303 		shinfo->xdp_frags_size = total_frag_len;  in bnxt_rx_agg_pages_xdp()
1317 		&cpr->cp_desc_ring[CP_RING(last)][CP_IDX(last)];  in bnxt_agg_bufs_valid()
1325 	struct bnxt *bp = bnapi->bp;  in bnxt_copy_data()
1326 	struct pci_dev *pdev = bp->pdev;  in bnxt_copy_data()
1329 	skb = napi_alloc_skb(&bnapi->napi, len);  in bnxt_copy_data()
1333 	dma_sync_single_for_cpu(&pdev->dev, mapping, bp->rx_copy_thresh,  in bnxt_copy_data()
1334 				bp->rx_dir);  in bnxt_copy_data()
1336 	memcpy(skb->data - NET_IP_ALIGN, data - NET_IP_ALIGN,  in bnxt_copy_data()
1339 	dma_sync_single_for_device(&pdev->dev, mapping, bp->rx_copy_thresh,  in bnxt_copy_data()
1340 				   bp->rx_dir);  in bnxt_copy_data()
1360 	u8 *data = xdp->data;  in bnxt_copy_xdp()
1363 	len = xdp->data_end - xdp->data_meta;  in bnxt_copy_xdp()
1364 	metasize = xdp->data - xdp->data_meta;  in bnxt_copy_xdp()
1365 	data = xdp->data_meta;  in bnxt_copy_xdp()
1389 		agg_bufs = (le32_to_cpu(rxcmp->rx_cmp_misc_v1) &  in bnxt_discard_rx()
1395 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_discard_rx()
1403 			return -EBUSY;  in bnxt_discard_rx()
1411 	struct bnxt_tpa_idx_map *map = rxr->rx_tpa_idx_map;  in bnxt_alloc_agg_idx()
1414 	if (test_bit(idx, map->agg_idx_bmap))  in bnxt_alloc_agg_idx()
1415 		idx = find_first_zero_bit(map->agg_idx_bmap,  in bnxt_alloc_agg_idx()
1417 	__set_bit(idx, map->agg_idx_bmap);  in bnxt_alloc_agg_idx()
1418 	map->agg_id_tbl[agg_id] = idx;  in bnxt_alloc_agg_idx()
1424 	struct bnxt_tpa_idx_map *map = rxr->rx_tpa_idx_map;  in bnxt_free_agg_idx()
1426 	__clear_bit(idx, map->agg_idx_bmap);  in bnxt_free_agg_idx()
1431 	struct bnxt_tpa_idx_map *map = rxr->rx_tpa_idx_map;  in bnxt_lookup_agg_idx()
1433 	return map->agg_id_tbl[agg_id];  in bnxt_lookup_agg_idx()
1440 	tpa_info->cfa_code_valid = 1;  in bnxt_tpa_metadata()
1441 	tpa_info->cfa_code = TPA_START_CFA_CODE(tpa_start1);  in bnxt_tpa_metadata()
1442 	tpa_info->vlan_valid = 0;  in bnxt_tpa_metadata()
1443 	if (tpa_info->flags2 & RX_CMP_FLAGS2_META_FORMAT_VLAN) {  in bnxt_tpa_metadata()
1444 		tpa_info->vlan_valid = 1;  in bnxt_tpa_metadata()
1445 		tpa_info->metadata =  in bnxt_tpa_metadata()
1446 			le32_to_cpu(tpa_start1->rx_tpa_start_cmp_metadata);  in bnxt_tpa_metadata()
1454 	tpa_info->vlan_valid = 0;  in bnxt_tpa_metadata_v2()
1459 		tpa_info->vlan_valid = 1;  in bnxt_tpa_metadata_v2()
1462 		tpa_info->metadata = vlan_proto << 16 |  in bnxt_tpa_metadata_v2()
1477 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_tpa_start()
1483 	cons = tpa_start->rx_tpa_start_cmp_opaque;  in bnxt_tpa_start()
1484 	prod = rxr->rx_prod;  in bnxt_tpa_start()
1485 	cons_rx_buf = &rxr->rx_buf_ring[cons];  in bnxt_tpa_start()
1486 	prod_rx_buf = &rxr->rx_buf_ring[RING_RX(bp, prod)];  in bnxt_tpa_start()
1487 	tpa_info = &rxr->rx_tpa[agg_id];  in bnxt_tpa_start()
1489 	if (unlikely(cons != rxr->rx_next_cons ||  in bnxt_tpa_start()
1491 		netdev_warn(bp->dev, "TPA cons %x, expected cons %x, error code %x\n",  in bnxt_tpa_start()
1492 			    cons, rxr->rx_next_cons,  in bnxt_tpa_start()
1497 	prod_rx_buf->data = tpa_info->data;  in bnxt_tpa_start()
1498 	prod_rx_buf->data_ptr = tpa_info->data_ptr;  in bnxt_tpa_start()
1500 	mapping = tpa_info->mapping;  in bnxt_tpa_start()
1501 	prod_rx_buf->mapping = mapping;  in bnxt_tpa_start()
1503 	prod_bd = &rxr->rx_desc_ring[RX_RING(bp, prod)][RX_IDX(prod)];  in bnxt_tpa_start()
1505 	prod_bd->rx_bd_haddr = cpu_to_le64(mapping);  in bnxt_tpa_start()
1507 	tpa_info->data = cons_rx_buf->data;  in bnxt_tpa_start()
1508 	tpa_info->data_ptr = cons_rx_buf->data_ptr;  in bnxt_tpa_start()
1509 	cons_rx_buf->data = NULL;  in bnxt_tpa_start()
1510 	tpa_info->mapping = cons_rx_buf->mapping;  in bnxt_tpa_start()
1512 	tpa_info->len =  in bnxt_tpa_start()
1513 		le32_to_cpu(tpa_start->rx_tpa_start_cmp_len_flags_type) >>  in bnxt_tpa_start()
1516 		tpa_info->hash_type = PKT_HASH_TYPE_L4;  in bnxt_tpa_start()
1517 		tpa_info->gso_type = SKB_GSO_TCPV4;  in bnxt_tpa_start()
1519 			tpa_info->gso_type = SKB_GSO_TCPV6;  in bnxt_tpa_start()
1520 		/* RSS profiles 1 and 3 with extract code 0 for inner 4-tuple */  in bnxt_tpa_start()
1523 			tpa_info->gso_type = SKB_GSO_TCPV6;  in bnxt_tpa_start()
1524 		tpa_info->rss_hash =  in bnxt_tpa_start()
1525 			le32_to_cpu(tpa_start->rx_tpa_start_cmp_rss_hash);  in bnxt_tpa_start()
1527 		tpa_info->hash_type = PKT_HASH_TYPE_NONE;  in bnxt_tpa_start()
1528 		tpa_info->gso_type = 0;  in bnxt_tpa_start()
1529 		netif_warn(bp, rx_err, bp->dev, "TPA packet without valid hash\n");  in bnxt_tpa_start()
1531 	tpa_info->flags2 = le32_to_cpu(tpa_start1->rx_tpa_start_cmp_flags2);  in bnxt_tpa_start()
1532 	tpa_info->hdr_info = le32_to_cpu(tpa_start1->rx_tpa_start_cmp_hdr_info);  in bnxt_tpa_start()
1537 	tpa_info->agg_count = 0;  in bnxt_tpa_start()
1539 	rxr->rx_prod = NEXT_RX(prod);  in bnxt_tpa_start()
1541 	rxr->rx_next_cons = RING_RX(bp, NEXT_RX(cons));  in bnxt_tpa_start()
1542 	cons_rx_buf = &rxr->rx_buf_ring[cons];  in bnxt_tpa_start()
1544 	bnxt_reuse_rx_data(rxr, cons, cons_rx_buf->data);  in bnxt_tpa_start()
1545 	rxr->rx_prod = NEXT_RX(rxr->rx_prod);  in bnxt_tpa_start()
1546 	cons_rx_buf->data = NULL;  in bnxt_tpa_start()
1561 		struct iphdr *iph = (struct iphdr *)skb->data;  in bnxt_gro_tunnel()
1563 		if (iph->protocol == IPPROTO_UDP)  in bnxt_gro_tunnel()
1566 		struct ipv6hdr *iph = (struct ipv6hdr *)skb->data;  in bnxt_gro_tunnel()
1568 		if (iph->nexthdr == IPPROTO_UDP)  in bnxt_gro_tunnel()
1572 		if (uh->check)  in bnxt_gro_tunnel()
1573 			skb_shinfo(skb)->gso_type |= SKB_GSO_UDP_TUNNEL_CSUM;  in bnxt_gro_tunnel()
1575 			skb_shinfo(skb)->gso_type |= SKB_GSO_UDP_TUNNEL;  in bnxt_gro_tunnel()
1588 	u32 hdr_info = tpa_info->hdr_info;  in bnxt_gro_func_5731x()
1601 		__be16 proto = *((__be16 *)(skb->data + inner_ip_off -  in bnxt_gro_func_5731x()
1602 					    ETH_HLEN - 2));  in bnxt_gro_func_5731x()
1613 		inner_ip_off -= 4;  in bnxt_gro_func_5731x()
1614 		inner_mac_off -= 4;  in bnxt_gro_func_5731x()
1615 		outer_ip_off -= 4;  in bnxt_gro_func_5731x()
1618 	nw_off = inner_ip_off - ETH_HLEN;  in bnxt_gro_func_5731x()
1620 	if (tpa_info->flags2 & RX_TPA_START_CMP_FLAGS2_IP_TYPE) {  in bnxt_gro_func_5731x()
1624 		len = skb->len - skb_transport_offset(skb);  in bnxt_gro_func_5731x()
1626 		th->check = ~tcp_v6_check(len, &iph->saddr, &iph->daddr, 0);  in bnxt_gro_func_5731x()
1631 		len = skb->len - skb_transport_offset(skb);  in bnxt_gro_func_5731x()
1633 		th->check = ~tcp_v4_check(len, iph->saddr, iph->daddr, 0);  in bnxt_gro_func_5731x()
1637 		__be16 proto = *((__be16 *)(skb->data + outer_ip_off -  in bnxt_gro_func_5731x()
1638 					    ETH_HLEN - 2));  in bnxt_gro_func_5731x()
1652 	u32 hdr_info = tpa_info->hdr_info;  in bnxt_gro_func_5750x()
1659 	nw_off = inner_ip_off - ETH_HLEN;  in bnxt_gro_func_5750x()
1661 	iphdr_len = (tpa_info->flags2 & RX_TPA_START_CMP_FLAGS2_IP_TYPE) ?  in bnxt_gro_func_5750x()
1666 		__be16 proto = *((__be16 *)(skb->data + outer_ip_off -  in bnxt_gro_func_5750x()
1667 					    ETH_HLEN - 2));  in bnxt_gro_func_5750x()
1689 	if (tpa_info->gso_type == SKB_GSO_TCPV4) {  in bnxt_gro_func_5730x()
1692 		nw_off = payload_off - BNXT_IPV4_HDR_SIZE - tcp_opt_len -  in bnxt_gro_func_5730x()
1697 		len = skb->len - skb_transport_offset(skb);  in bnxt_gro_func_5730x()
1699 		th->check = ~tcp_v4_check(len, iph->saddr, iph->daddr, 0);  in bnxt_gro_func_5730x()
1700 	} else if (tpa_info->gso_type == SKB_GSO_TCPV6) {  in bnxt_gro_func_5730x()
1703 		nw_off = payload_off - BNXT_IPV6_HDR_SIZE - tcp_opt_len -  in bnxt_gro_func_5730x()
1708 		len = skb->len - skb_transport_offset(skb);  in bnxt_gro_func_5730x()
1710 		th->check = ~tcp_v6_check(len, &iph->saddr, &iph->daddr, 0);  in bnxt_gro_func_5730x()
1717 		bnxt_gro_tunnel(skb, skb->protocol);  in bnxt_gro_func_5730x()
1736 	NAPI_GRO_CB(skb)->count = segs;  in bnxt_gro_skb()
1737 	skb_shinfo(skb)->gso_size =  in bnxt_gro_skb()
1738 		le32_to_cpu(tpa_end1->rx_tpa_end_cmp_seg_len);  in bnxt_gro_skb()
1739 	skb_shinfo(skb)->gso_type = tpa_info->gso_type;  in bnxt_gro_skb()
1740 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_gro_skb()
1744 	skb = bp->gro_func(tpa_info, payload_off, TPA_END_GRO_TS(tpa_end), skb);  in bnxt_gro_skb()
1752  * netdev (vf-rep or PF) the packet is destined to.
1758 	/* if vf-rep dev is NULL, the must belongs to the PF */  in bnxt_get_pkt_dev()
1759 	return dev ? dev : bp->dev;  in bnxt_get_pkt_dev()
1769 	struct bnxt_napi *bnapi = cpr->bnapi;  in bnxt_tpa_end()
1770 	struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;  in bnxt_tpa_end()
1771 	struct net_device *dev = bp->dev;  in bnxt_tpa_end()
1781 	if (unlikely(bnapi->in_reset)) {  in bnxt_tpa_end()
1785 			return ERR_PTR(-EBUSY);  in bnxt_tpa_end()
1789 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_tpa_end()
1793 		tpa_info = &rxr->rx_tpa[agg_id];  in bnxt_tpa_end()
1794 		if (unlikely(agg_bufs != tpa_info->agg_count)) {  in bnxt_tpa_end()
1795 			netdev_warn(bp->dev, "TPA end agg_buf %d != expected agg_bufs %d\n",  in bnxt_tpa_end()
1796 				    agg_bufs, tpa_info->agg_count);  in bnxt_tpa_end()
1797 			agg_bufs = tpa_info->agg_count;  in bnxt_tpa_end()
1799 		tpa_info->agg_count = 0;  in bnxt_tpa_end()
1803 		gro = !!(bp->flags & BNXT_FLAG_GRO);  in bnxt_tpa_end()
1807 		tpa_info = &rxr->rx_tpa[agg_id];  in bnxt_tpa_end()
1811 				return ERR_PTR(-EBUSY);  in bnxt_tpa_end()
1818 	data = tpa_info->data;  in bnxt_tpa_end()
1819 	data_ptr = tpa_info->data_ptr;  in bnxt_tpa_end()
1821 	len = tpa_info->len;  in bnxt_tpa_end()
1822 	mapping = tpa_info->mapping;  in bnxt_tpa_end()
1827 			netdev_warn(bp->dev, "TPA frags %d exceeded MAX_SKB_FRAGS %d\n",  in bnxt_tpa_end()
1832 	if (len <= bp->rx_copy_thresh) {  in bnxt_tpa_end()
1836 			cpr->sw_stats->rx.rx_oom_discards += 1;  in bnxt_tpa_end()
1846 			cpr->sw_stats->rx.rx_oom_discards += 1;  in bnxt_tpa_end()
1850 		tpa_info->data = new_data;  in bnxt_tpa_end()
1851 		tpa_info->data_ptr = new_data + bp->rx_offset;  in bnxt_tpa_end()
1852 		tpa_info->mapping = new_mapping;  in bnxt_tpa_end()
1854 		skb = napi_build_skb(data, bp->rx_buf_size);  in bnxt_tpa_end()
1855 		dma_unmap_single_attrs(&bp->pdev->dev, mapping,  in bnxt_tpa_end()
1856 				       bp->rx_buf_use_size, bp->rx_dir,  in bnxt_tpa_end()
1862 			cpr->sw_stats->rx.rx_oom_discards += 1;  in bnxt_tpa_end()
1865 		skb_reserve(skb, bp->rx_offset);  in bnxt_tpa_end()
1873 			cpr->sw_stats->rx.rx_oom_discards += 1;  in bnxt_tpa_end()
1878 	if (tpa_info->cfa_code_valid)  in bnxt_tpa_end()
1879 		dev = bnxt_get_pkt_dev(bp, tpa_info->cfa_code);  in bnxt_tpa_end()
1880 	skb->protocol = eth_type_trans(skb, dev);  in bnxt_tpa_end()
1882 	if (tpa_info->hash_type != PKT_HASH_TYPE_NONE)  in bnxt_tpa_end()
1883 		skb_set_hash(skb, tpa_info->rss_hash, tpa_info->hash_type);  in bnxt_tpa_end()
1885 	if (tpa_info->vlan_valid &&  in bnxt_tpa_end()
1886 	    (dev->features & BNXT_HW_FEATURE_VLAN_ALL_RX)) {  in bnxt_tpa_end()
1887 		__be16 vlan_proto = htons(tpa_info->metadata >>  in bnxt_tpa_end()
1889 		u16 vtag = tpa_info->metadata & RX_CMP_FLAGS2_METADATA_TCI_MASK;  in bnxt_tpa_end()
1900 	if (likely(tpa_info->flags2 & RX_TPA_START_CMP_FLAGS2_L4_CS_CALC)) {  in bnxt_tpa_end()
1901 		skb->ip_summed = CHECKSUM_UNNECESSARY;  in bnxt_tpa_end()
1902 		skb->csum_level =  in bnxt_tpa_end()
1903 			(tpa_info->flags2 & RX_CMP_FLAGS2_T_L4_CS_CALC) >> 3;  in bnxt_tpa_end()
1919 	tpa_info = &rxr->rx_tpa[agg_id];  in bnxt_tpa_agg()
1920 	BUG_ON(tpa_info->agg_count >= MAX_SKB_FRAGS);  in bnxt_tpa_agg()
1921 	tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg;  in bnxt_tpa_agg()
1929 	if (skb->dev != bp->dev) {  in bnxt_deliver_skb()
1930 		/* this packet belongs to a vf-rep */  in bnxt_deliver_skb()
1934 	skb_record_rx_queue(skb, bnapi->index);  in bnxt_deliver_skb()
1935 	napi_gro_receive(&bnapi->napi, skb);  in bnxt_deliver_skb()
1941 	u32 ts = le32_to_cpu(rxcmp1->rx_cmp_timestamp);  in bnxt_rx_ts_valid()
1945 	if (!bp->ptp_all_rx_tstamp || !ts || !BNXT_ALL_RX_TS_VALID(flags))  in bnxt_rx_ts_valid()
1961 		__le32 flags2 = rxcmp1->rx_cmp_flags2;  in bnxt_rx_vlan()
1967 		meta_data = le32_to_cpu(rxcmp1->rx_cmp_meta_data);  in bnxt_rx_vlan()
2012  * 1       - 1 packet successfully received
2013  * 0       - successful TPA_START, packet not completed yet
2014  * -EBUSY  - completion ring does not have all the agg buffers yet
2015  * -ENOMEM - packet aborted due to out of memory
2016  * -EIO    - packet aborted due to hw error indicated in BD
2021 	struct bnxt_napi *bnapi = cpr->bnapi;  in bnxt_rx_pkt()
2022 	struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;  in bnxt_rx_pkt()
2023 	struct net_device *dev = bp->dev;  in bnxt_rx_pkt()
2041 			&cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];  in bnxt_rx_pkt()
2053 			&cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];  in bnxt_rx_pkt()
2056 		return -EBUSY;  in bnxt_rx_pkt()
2062 	prod = rxr->rx_prod;  in bnxt_rx_pkt()
2079 			return -EBUSY;  in bnxt_rx_pkt()
2081 		rc = -ENOMEM;  in bnxt_rx_pkt()
2090 	cons = rxcmp->rx_cmp_opaque;  in bnxt_rx_pkt()
2091 	if (unlikely(cons != rxr->rx_next_cons)) {  in bnxt_rx_pkt()
2095 		if (rxr->rx_next_cons != 0xffff)  in bnxt_rx_pkt()
2096 			netdev_warn(bp->dev, "RX cons %x != expected cons %x\n",  in bnxt_rx_pkt()
2097 				    cons, rxr->rx_next_cons);  in bnxt_rx_pkt()
2103 	rx_buf = &rxr->rx_buf_ring[cons];  in bnxt_rx_pkt()
2104 	data = rx_buf->data;  in bnxt_rx_pkt()
2105 	data_ptr = rx_buf->data_ptr;  in bnxt_rx_pkt()
2108 	misc = le32_to_cpu(rxcmp->rx_cmp_misc_v1);  in bnxt_rx_pkt()
2113 			return -EBUSY;  in bnxt_rx_pkt()
2120 	rx_buf->data = NULL;  in bnxt_rx_pkt()
2121 	if (rxcmp1->rx_cmp_cfa_code_errors_v2 & RX_CMP_L2_ERRORS) {  in bnxt_rx_pkt()
2122 		u32 rx_err = le32_to_cpu(rxcmp1->rx_cmp_cfa_code_errors_v2);  in bnxt_rx_pkt()
2129 		rc = -EIO;  in bnxt_rx_pkt()
2131 			bnapi->cp_ring.sw_stats->rx.rx_buf_errors++;  in bnxt_rx_pkt()
2132 			if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS) &&  in bnxt_rx_pkt()
2133 			    !(bp->fw_cap & BNXT_FW_CAP_RING_MONITOR)) {  in bnxt_rx_pkt()
2134 				netdev_warn_once(bp->dev, "RX buffer error %x\n",  in bnxt_rx_pkt()
2142 	flags = le32_to_cpu(rxcmp->rx_cmp_len_flags_type);  in bnxt_rx_pkt()
2144 	dma_addr = rx_buf->mapping;  in bnxt_rx_pkt()
2165 	if (len <= bp->rx_copy_thresh) {  in bnxt_rx_pkt()
2184 		if (rx_buf->data_ptr == data_ptr)  in bnxt_rx_pkt()
2188 		skb = bp->rx_skb_func(bp, rxr, cons, data, data_ptr, dma_addr,  in bnxt_rx_pkt()
2200 			skb = bnxt_xdp_build_skb(bp, skb, agg_bufs, rxr->page_pool, &xdp, rxcmp1);  in bnxt_rx_pkt()
2218 			 * 4-tuple  in bnxt_rx_pkt()
2225 		skb_set_hash(skb, le32_to_cpu(rxcmp->rx_cmp_rss_hash), type);  in bnxt_rx_pkt()
2230 	skb->protocol = eth_type_trans(skb, dev);  in bnxt_rx_pkt()
2232 	if (skb->dev->features & BNXT_HW_FEATURE_VLAN_ALL_RX) {  in bnxt_rx_pkt()
2240 		if (dev->features & NETIF_F_RXCSUM) {  in bnxt_rx_pkt()
2241 			skb->ip_summed = CHECKSUM_UNNECESSARY;  in bnxt_rx_pkt()
2242 			skb->csum_level = RX_CMP_ENCAP(rxcmp1);  in bnxt_rx_pkt()
2245 		if (rxcmp1->rx_cmp_cfa_code_errors_v2 & RX_CMP_L4_CS_ERR_BITS) {  in bnxt_rx_pkt()
2246 			if (dev->features & NETIF_F_RXCSUM)  in bnxt_rx_pkt()
2247 				bnapi->cp_ring.sw_stats->rx.rx_l4_csum_errors++;  in bnxt_rx_pkt()
2252 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_rx_pkt()
2256 				struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;  in bnxt_rx_pkt()
2259 				spin_lock_irqsave(&ptp->ptp_lock, flags);  in bnxt_rx_pkt()
2260 				ns = timecounter_cyc2time(&ptp->tc, ts);  in bnxt_rx_pkt()
2261 				spin_unlock_irqrestore(&ptp->ptp_lock, flags);  in bnxt_rx_pkt()
2264 				skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ns);  in bnxt_rx_pkt()
2272 	cpr->rx_packets += 1;  in bnxt_rx_pkt()
2273 	cpr->rx_bytes += len;  in bnxt_rx_pkt()
2276 	rxr->rx_prod = NEXT_RX(prod);  in bnxt_rx_pkt()
2277 	rxr->rx_next_cons = RING_RX(bp, NEXT_RX(cons));  in bnxt_rx_pkt()
2285 	cpr->sw_stats->rx.rx_oom_discards += 1;  in bnxt_rx_pkt()
2286 	rc = -ENOMEM;  in bnxt_rx_pkt()
2306 			&cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];  in bnxt_force_rx_discard()
2311 			&cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];  in bnxt_force_rx_discard()
2314 		return -EBUSY;  in bnxt_force_rx_discard()
2323 		rxcmp1->rx_cmp_cfa_code_errors_v2 |=  in bnxt_force_rx_discard()
2329 		tpa_end1->rx_tpa_end_cmp_errors_v2 |=  in bnxt_force_rx_discard()
2333 	if (rc && rc != -EBUSY)  in bnxt_force_rx_discard()
2334 		cpr->sw_stats->rx.rx_netpoll_discards += 1;  in bnxt_force_rx_discard()
2340 	struct bnxt_fw_health *fw_health = bp->fw_health;  in bnxt_fw_health_readl()
2341 	u32 reg = fw_health->regs[reg_idx];  in bnxt_fw_health_readl()
2348 		pci_read_config_dword(bp->pdev, reg_off, &val);  in bnxt_fw_health_readl()
2351 		reg_off = fw_health->mapped_regs[reg_idx];  in bnxt_fw_health_readl()
2354 		val = readl(bp->bar0 + reg_off);  in bnxt_fw_health_readl()
2357 		val = readl(bp->bar1 + reg_off);  in bnxt_fw_health_readl()
2361 		val &= fw_health->fw_reset_inprog_reg_mask;  in bnxt_fw_health_readl()
2369 	for (i = 0; i < bp->rx_nr_rings; i++) {  in bnxt_agg_ring_id_to_grp_idx()
2370 		u16 grp_idx = bp->rx_ring[i].bnapi->index;  in bnxt_agg_ring_id_to_grp_idx()
2373 		grp_info = &bp->grp_info[grp_idx];  in bnxt_agg_ring_id_to_grp_idx()
2374 		if (grp_info->agg_fw_ring_id == ring_id)  in bnxt_agg_ring_id_to_grp_idx()
2384 	if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2)  in bnxt_get_force_speed()
2385 		return link_info->force_link_speed2;  in bnxt_get_force_speed()
2386 	if (link_info->req_signal_mode == BNXT_SIG_MODE_PAM4)  in bnxt_get_force_speed()
2387 		return link_info->force_pam4_link_speed;  in bnxt_get_force_speed()
2388 	return link_info->force_link_speed;  in bnxt_get_force_speed()
2395 	if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) {  in bnxt_set_force_speed()
2396 		link_info->req_link_speed = link_info->force_link_speed2;  in bnxt_set_force_speed()
2397 		link_info->req_signal_mode = BNXT_SIG_MODE_NRZ;  in bnxt_set_force_speed()
2398 		switch (link_info->req_link_speed) {  in bnxt_set_force_speed()
2403 			link_info->req_signal_mode = BNXT_SIG_MODE_PAM4;  in bnxt_set_force_speed()
2408 			link_info->req_signal_mode = BNXT_SIG_MODE_PAM4_112;  in bnxt_set_force_speed()
2411 			link_info->req_signal_mode = BNXT_SIG_MODE_NRZ;  in bnxt_set_force_speed()
2415 	link_info->req_link_speed = link_info->force_link_speed;  in bnxt_set_force_speed()
2416 	link_info->req_signal_mode = BNXT_SIG_MODE_NRZ;  in bnxt_set_force_speed()
2417 	if (link_info->force_pam4_link_speed) {  in bnxt_set_force_speed()
2418 		link_info->req_link_speed = link_info->force_pam4_link_speed;  in bnxt_set_force_speed()
2419 		link_info->req_signal_mode = BNXT_SIG_MODE_PAM4;  in bnxt_set_force_speed()
2427 	if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) {  in bnxt_set_auto_speed()
2428 		link_info->advertising = link_info->auto_link_speeds2;  in bnxt_set_auto_speed()
2431 	link_info->advertising = link_info->auto_link_speeds;  in bnxt_set_auto_speed()
2432 	link_info->advertising_pam4 = link_info->auto_pam4_link_speeds;  in bnxt_set_auto_speed()
2439 	if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) {  in bnxt_force_speed_updated()
2440 		if (link_info->req_link_speed != link_info->force_link_speed2)  in bnxt_force_speed_updated()
2444 	if (link_info->req_signal_mode == BNXT_SIG_MODE_NRZ &&  in bnxt_force_speed_updated()
2445 	    link_info->req_link_speed != link_info->force_link_speed)  in bnxt_force_speed_updated()
2447 	if (link_info->req_signal_mode == BNXT_SIG_MODE_PAM4 &&  in bnxt_force_speed_updated()
2448 	    link_info->req_link_speed != link_info->force_pam4_link_speed)  in bnxt_force_speed_updated()
2457 	if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) {  in bnxt_auto_speed_updated()
2458 		if (link_info->advertising != link_info->auto_link_speeds2)  in bnxt_auto_speed_updated()
2462 	if (link_info->advertising != link_info->auto_link_speeds ||  in bnxt_auto_speed_updated()
2463 	    link_info->advertising_pam4 != link_info->auto_pam4_link_speeds)  in bnxt_auto_speed_updated()
2493 …netdev_err(bp->dev, "1PPS: Received invalid signal on pin%lu from the external source. Please fix …  in bnxt_event_error_report()
2497 		netdev_warn(bp->dev, "Pause Storm detected!\n");  in bnxt_event_error_report()
2500 		netdev_warn(bp->dev, "One or more MMIO doorbells dropped by the device!\n");  in bnxt_event_error_report()
2522 			netdev_err(bp->dev, "Unknown Thermal threshold type event\n");  in bnxt_event_error_report()
2531 		netdev_warn(bp->dev, "Chip temperature has gone %s the %s thermal threshold!\n",  in bnxt_event_error_report()
2533 		netdev_warn(bp->dev, "Temperature (In Celsius), Current: %lu, threshold: %lu\n",  in bnxt_event_error_report()
2537 			bp->thermal_threshold_type = type;  in bnxt_event_error_report()
2538 			set_bit(BNXT_THERMAL_THRESHOLD_SP_EVENT, &bp->sp_event);  in bnxt_event_error_report()
2544 		netdev_warn(bp->dev, "Speed change not supported with dual rate transceivers on this board\n");  in bnxt_event_error_report()
2547 		netdev_err(bp->dev, "FW reported unknown error type %u\n",  in bnxt_event_error_report()
2579 	u16 event_id = le16_to_cpu(cmpl->event_id);  in bnxt_async_event_process()
2580 	u32 data1 = le32_to_cpu(cmpl->event_data1);  in bnxt_async_event_process()
2581 	u32 data2 = le32_to_cpu(cmpl->event_data2);  in bnxt_async_event_process()
2583 	netdev_dbg(bp->dev, "hwrm event 0x%x {0x%x, 0x%x}\n",  in bnxt_async_event_process()
2589 		struct bnxt_link_info *link_info = &bp->link_info;  in bnxt_async_event_process()
2595 		if (!(link_info->autoneg & BNXT_AUTONEG_SPEED) &&  in bnxt_async_event_process()
2601 				netdev_warn(bp->dev, "Link speed %d no longer supported\n",  in bnxt_async_event_process()
2604 		set_bit(BNXT_LINK_SPEED_CHNG_SP_EVENT, &bp->sp_event);  in bnxt_async_event_process()
2609 		set_bit(BNXT_LINK_CFG_CHANGE_SP_EVENT, &bp->sp_event);  in bnxt_async_event_process()
2612 		set_bit(BNXT_LINK_CHNG_SP_EVENT, &bp->sp_event);  in bnxt_async_event_process()
2615 		set_bit(BNXT_HWRM_PF_UNLOAD_SP_EVENT, &bp->sp_event);  in bnxt_async_event_process()
2623 		if (bp->pf.port_id != port_id)  in bnxt_async_event_process()
2626 		set_bit(BNXT_HWRM_PORT_MODULE_SP_EVENT, &bp->sp_event);  in bnxt_async_event_process()
2632 		set_bit(BNXT_RESET_TASK_SILENT_SP_EVENT, &bp->sp_event);  in bnxt_async_event_process()
2637 		if (!bp->fw_health)  in bnxt_async_event_process()
2640 		bp->fw_reset_timestamp = jiffies;  in bnxt_async_event_process()
2641 		bp->fw_reset_min_dsecs = cmpl->timestamp_lo;  in bnxt_async_event_process()
2642 		if (!bp->fw_reset_min_dsecs)  in bnxt_async_event_process()
2643 			bp->fw_reset_min_dsecs = BNXT_DFLT_FW_RST_MIN_DSECS;  in bnxt_async_event_process()
2644 		bp->fw_reset_max_dsecs = le16_to_cpu(cmpl->timestamp_hi);  in bnxt_async_event_process()
2645 		if (!bp->fw_reset_max_dsecs)  in bnxt_async_event_process()
2646 			bp->fw_reset_max_dsecs = BNXT_DFLT_FW_RST_MAX_DSECS;  in bnxt_async_event_process()
2648 			set_bit(BNXT_STATE_FW_ACTIVATE_RESET, &bp->state);  in bnxt_async_event_process()
2651 			bp->fw_health->fatalities++;  in bnxt_async_event_process()
2652 			set_bit(BNXT_STATE_FW_FATAL_COND, &bp->state);  in bnxt_async_event_process()
2655 			type_str = "Non-fatal";  in bnxt_async_event_process()
2656 			bp->fw_health->survivals++;  in bnxt_async_event_process()
2657 			set_bit(BNXT_STATE_FW_NON_FATAL_COND, &bp->state);  in bnxt_async_event_process()
2659 		netif_warn(bp, hw, bp->dev,  in bnxt_async_event_process()
2662 			   bp->fw_reset_min_dsecs * 100,  in bnxt_async_event_process()
2663 			   bp->fw_reset_max_dsecs * 100);  in bnxt_async_event_process()
2664 		set_bit(BNXT_FW_RESET_NOTIFY_SP_EVENT, &bp->sp_event);  in bnxt_async_event_process()
2668 		struct bnxt_fw_health *fw_health = bp->fw_health;  in bnxt_async_event_process()
2676 			fw_health->enabled = false;  in bnxt_async_event_process()
2677 			netif_info(bp, drv, bp->dev, "Driver recovery watchdog is disabled\n");  in bnxt_async_event_process()
2680 		fw_health->primary = EVENT_DATA1_RECOVERY_MASTER_FUNC(data1);  in bnxt_async_event_process()
2681 		fw_health->tmr_multiplier =  in bnxt_async_event_process()
2682 			DIV_ROUND_UP(fw_health->polling_dsecs * HZ,  in bnxt_async_event_process()
2683 				     bp->current_interval * 10);  in bnxt_async_event_process()
2684 		fw_health->tmr_counter = fw_health->tmr_multiplier;  in bnxt_async_event_process()
2685 		if (!fw_health->enabled)  in bnxt_async_event_process()
2686 			fw_health->last_fw_heartbeat =  in bnxt_async_event_process()
2688 		fw_health->last_fw_reset_cnt =  in bnxt_async_event_process()
2693 		netif_info(bp, drv, bp->dev,  in bnxt_async_event_process()
2695 			   fw_health->primary ? "primary" : "backup", status,  in bnxt_async_event_process()
2696 			   status_desc, fw_health->last_fw_reset_cnt);  in bnxt_async_event_process()
2697 		if (!fw_health->enabled) {  in bnxt_async_event_process()
2702 			fw_health->enabled = true;  in bnxt_async_event_process()
2707 		netif_notice(bp, hw, bp->dev,  in bnxt_async_event_process()
2715 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_async_event_process()
2718 		netdev_warn(bp->dev, "Ring monitor event, ring type %lu id 0x%x\n",  in bnxt_async_event_process()
2725 			netdev_warn(bp->dev, "Unknown RX agg ring id 0x%x\n",  in bnxt_async_event_process()
2729 		rxr = bp->bnapi[grp_idx]->rx_ring;  in bnxt_async_event_process()
2734 		struct bnxt_fw_health *fw_health = bp->fw_health;  in bnxt_async_event_process()
2736 		netif_notice(bp, hw, bp->dev,  in bnxt_async_event_process()
2740 			fw_health->echo_req_data1 = data1;  in bnxt_async_event_process()
2741 			fw_health->echo_req_data2 = data2;  in bnxt_async_event_process()
2742 			set_bit(BNXT_FW_ECHO_REQUEST_SP_EVENT, &bp->sp_event);  in bnxt_async_event_process()
2760 				struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;  in bnxt_async_event_process()
2767 				spin_lock_irqsave(&ptp->ptp_lock, flags);  in bnxt_async_event_process()
2770 				       BNXT_PHC_BITS) | ptp->current_time);  in bnxt_async_event_process()
2772 				spin_unlock_irqrestore(&ptp->ptp_lock, flags);  in bnxt_async_event_process()
2779 		u16 seq_id = le32_to_cpu(cmpl->event_data2) & 0xffff;  in bnxt_async_event_process()
2801 		seq_id = le16_to_cpu(h_cmpl->sequence_id);  in bnxt_hwrm_handler()
2806 		vf_id = le16_to_cpu(fwd_req_cmpl->source_id);  in bnxt_hwrm_handler()
2808 		if ((vf_id < bp->pf.first_vf_id) ||  in bnxt_hwrm_handler()
2809 		    (vf_id >= bp->pf.first_vf_id + bp->pf.active_vfs)) {  in bnxt_hwrm_handler()
2810 			netdev_err(bp->dev, "Msg contains invalid VF id %x\n",  in bnxt_hwrm_handler()
2812 			return -EINVAL;  in bnxt_hwrm_handler()
2815 		set_bit(vf_id - bp->pf.first_vf_id, bp->pf.vf_event_bmap);  in bnxt_hwrm_handler()
2834 	struct bnxt *bp = bnapi->bp;  in bnxt_msix()
2835 	struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_msix()
2836 	u32 cons = RING_CMP(cpr->cp_raw_cons);  in bnxt_msix()
2838 	cpr->event_ctr++;  in bnxt_msix()
2839 	prefetch(&cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]);  in bnxt_msix()
2840 	napi_schedule(&bnapi->napi);  in bnxt_msix()
2846 	u32 raw_cons = cpr->cp_raw_cons;  in bnxt_has_work()
2850 	txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];  in bnxt_has_work()
2858 	struct bnxt_napi *bnapi = cpr->bnapi;  in __bnxt_poll_work()
2859 	u32 raw_cons = cpr->cp_raw_cons;  in __bnxt_poll_work()
2865 	cpr->has_more_work = 0;  in __bnxt_poll_work()
2866 	cpr->had_work_done = 1;  in __bnxt_poll_work()
2872 		txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];  in __bnxt_poll_work()
2884 			u32 opaque = txcmp->tx_cmp_opaque;  in __bnxt_poll_work()
2888 			txr = bnapi->tx_ring[TX_OPAQUE_RING(opaque)];  in __bnxt_poll_work()
2891 				txr->tx_hw_cons = TX_CMP_SQ_CONS_IDX(txcmp);  in __bnxt_poll_work()
2893 				txr->tx_hw_cons = TX_OPAQUE_PROD(bp, opaque);  in __bnxt_poll_work()
2894 			tx_freed = (txr->tx_hw_cons - txr->tx_cons) &  in __bnxt_poll_work()
2895 				   bp->tx_ring_mask;  in __bnxt_poll_work()
2897 			if (unlikely(tx_freed >= bp->tx_wake_thresh)) {  in __bnxt_poll_work()
2901 					cpr->has_more_work = 1;  in __bnxt_poll_work()
2915 			/* Increment rx_pkts when rc is -ENOMEM to count towards  in __bnxt_poll_work()
2920 			else if (rc == -ENOMEM && budget)  in __bnxt_poll_work()
2922 			else if (rc == -EBUSY)	/* partial completion */  in __bnxt_poll_work()
2932 			cpr->has_more_work = 1;  in __bnxt_poll_work()
2943 		struct bnxt_tx_ring_info *txr = bnapi->tx_ring[0];  in __bnxt_poll_work()
2944 		u16 prod = txr->tx_prod;  in __bnxt_poll_work()
2949 		bnxt_db_write_relaxed(bp, &txr->tx_db, prod);  in __bnxt_poll_work()
2953 	cpr->cp_raw_cons = raw_cons;  in __bnxt_poll_work()
2954 	bnapi->events |= event;  in __bnxt_poll_work()
2961 	if ((bnapi->events & BNXT_TX_CMP_EVENT) && !bnapi->tx_fault)  in __bnxt_poll_work_done()
2962 		bnapi->tx_int(bp, bnapi, budget);  in __bnxt_poll_work_done()
2964 	if ((bnapi->events & BNXT_RX_EVENT) && !(bnapi->in_reset)) {  in __bnxt_poll_work_done()
2965 		struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;  in __bnxt_poll_work_done()
2967 		bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod);  in __bnxt_poll_work_done()
2968 		bnapi->events &= ~BNXT_RX_EVENT;  in __bnxt_poll_work_done()
2970 	if (bnapi->events & BNXT_AGG_EVENT) {  in __bnxt_poll_work_done()
2971 		struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;  in __bnxt_poll_work_done()
2973 		bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod);  in __bnxt_poll_work_done()
2974 		bnapi->events &= ~BNXT_AGG_EVENT;  in __bnxt_poll_work_done()
2981 	struct bnxt_napi *bnapi = cpr->bnapi;  in bnxt_poll_work()
2990 	bnxt_db_cq(bp, &cpr->cp_db, cpr->cp_raw_cons);  in bnxt_poll_work()
2999 	struct bnxt *bp = bnapi->bp;  in bnxt_poll_nitroa0()
3000 	struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_poll_nitroa0()
3001 	struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;  in bnxt_poll_nitroa0()
3005 	u32 raw_cons = cpr->cp_raw_cons;  in bnxt_poll_nitroa0()
3014 		txcmp = &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];  in bnxt_poll_nitroa0()
3027 			  &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];  in bnxt_poll_nitroa0()
3033 			rxcmp1->rx_cmp_cfa_code_errors_v2 |=  in bnxt_poll_nitroa0()
3037 			if (likely(rc == -EIO) && budget)  in bnxt_poll_nitroa0()
3039 			else if (rc == -EBUSY)	/* partial completion */  in bnxt_poll_nitroa0()
3047 			netdev_err(bp->dev,  in bnxt_poll_nitroa0()
3056 	cpr->cp_raw_cons = raw_cons;  in bnxt_poll_nitroa0()
3057 	BNXT_DB_CQ(&cpr->cp_db, cpr->cp_raw_cons);  in bnxt_poll_nitroa0()
3058 	bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod);  in bnxt_poll_nitroa0()
3061 		bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod);  in bnxt_poll_nitroa0()
3067 		BNXT_DB_CQ_ARM(&cpr->cp_db, cpr->cp_raw_cons);  in bnxt_poll_nitroa0()
3075 	struct bnxt *bp = bnapi->bp;  in bnxt_poll()
3076 	struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_poll()
3079 	if (unlikely(test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state))) {  in bnxt_poll()
3084 		work_done += bnxt_poll_work(bp, cpr, budget - work_done);  in bnxt_poll()
3088 				BNXT_DB_CQ_ARM(&cpr->cp_db, cpr->cp_raw_cons);  in bnxt_poll()
3094 				BNXT_DB_CQ_ARM(&cpr->cp_db, cpr->cp_raw_cons);  in bnxt_poll()
3098 	if (bp->flags & BNXT_FLAG_DIM) {  in bnxt_poll()
3101 		dim_update_sample(cpr->event_ctr,  in bnxt_poll()
3102 				  cpr->rx_packets,  in bnxt_poll()
3103 				  cpr->rx_bytes,  in bnxt_poll()
3105 		net_dim(&cpr->dim, dim_sample);  in bnxt_poll()
3112 	struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in __bnxt_poll_cqs()
3115 	for (i = 0; i < cpr->cp_ring_count; i++) {  in __bnxt_poll_cqs()
3116 		struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[i];  in __bnxt_poll_cqs()
3118 		if (cpr2->had_nqe_notify) {  in __bnxt_poll_cqs()
3120 						      budget - work_done);  in __bnxt_poll_cqs()
3121 			cpr->has_more_work |= cpr2->has_more_work;  in __bnxt_poll_cqs()
3130 	struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in __bnxt_poll_cqs_done()
3133 	for (i = 0; i < cpr->cp_ring_count; i++) {  in __bnxt_poll_cqs_done()
3134 		struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[i];  in __bnxt_poll_cqs_done()
3137 		if (cpr2->had_work_done) {  in __bnxt_poll_cqs_done()
3141 				cpr2->had_nqe_notify = 0;  in __bnxt_poll_cqs_done()
3142 				tgl = cpr2->toggle;  in __bnxt_poll_cqs_done()
3144 			db = &cpr2->cp_db;  in __bnxt_poll_cqs_done()
3146 				    db->db_key64 | dbr_type | DB_TOGGLE(tgl) |  in __bnxt_poll_cqs_done()
3147 				    DB_RING_IDX(db, cpr2->cp_raw_cons),  in __bnxt_poll_cqs_done()
3148 				    db->doorbell);  in __bnxt_poll_cqs_done()
3149 			cpr2->had_work_done = 0;  in __bnxt_poll_cqs_done()
3158 	struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_poll_p5()
3160 	u32 raw_cons = cpr->cp_raw_cons;  in bnxt_poll_p5()
3161 	struct bnxt *bp = bnapi->bp;  in bnxt_poll_p5()
3166 	if (unlikely(test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state))) {  in bnxt_poll_p5()
3170 	if (cpr->has_more_work) {  in bnxt_poll_p5()
3171 		cpr->has_more_work = 0;  in bnxt_poll_p5()
3178 		nqcmp = &cpr->nq_desc_ring[CP_RING(cons)][CP_IDX(cons)];  in bnxt_poll_p5()
3181 			if (cpr->has_more_work)  in bnxt_poll_p5()
3186 			cpr->cp_raw_cons = raw_cons;  in bnxt_poll_p5()
3188 				BNXT_DB_NQ_ARM_P5(&cpr->cp_db,  in bnxt_poll_p5()
3189 						  cpr->cp_raw_cons);  in bnxt_poll_p5()
3198 		type = le16_to_cpu(nqcmp->type);  in bnxt_poll_p5()
3200 			u32 idx = le32_to_cpu(nqcmp->cq_handle_low);  in bnxt_poll_p5()
3210 			cpr2 = &cpr->cp_ring_arr[idx];  in bnxt_poll_p5()
3211 			cpr2->had_nqe_notify = 1;  in bnxt_poll_p5()
3212 			cpr2->toggle = NQE_CN_TOGGLE(type);  in bnxt_poll_p5()
3214 						      budget - work_done);  in bnxt_poll_p5()
3215 			cpr->has_more_work |= cpr2->has_more_work;  in bnxt_poll_p5()
3222 	if (raw_cons != cpr->cp_raw_cons) {  in bnxt_poll_p5()
3223 		cpr->cp_raw_cons = raw_cons;  in bnxt_poll_p5()
3224 		BNXT_DB_NQ_P5(&cpr->cp_db, raw_cons);  in bnxt_poll_p5()
3227 	cpr_rx = &cpr->cp_ring_arr[0];  in bnxt_poll_p5()
3228 	if (cpr_rx->cp_ring_type == BNXT_NQ_HDL_TYPE_RX &&  in bnxt_poll_p5()
3229 	    (bp->flags & BNXT_FLAG_DIM)) {  in bnxt_poll_p5()
3232 		dim_update_sample(cpr->event_ctr,  in bnxt_poll_p5()
3233 				  cpr_rx->rx_packets,  in bnxt_poll_p5()
3234 				  cpr_rx->rx_bytes,  in bnxt_poll_p5()
3236 		net_dim(&cpr->dim, dim_sample);  in bnxt_poll_p5()
3244 	struct pci_dev *pdev = bp->pdev;  in bnxt_free_tx_skbs()
3246 	if (!bp->tx_ring)  in bnxt_free_tx_skbs()
3249 	max_idx = bp->tx_nr_pages * TX_DESC_CNT;  in bnxt_free_tx_skbs()
3250 	for (i = 0; i < bp->tx_nr_rings; i++) {  in bnxt_free_tx_skbs()
3251 		struct bnxt_tx_ring_info *txr = &bp->tx_ring[i];  in bnxt_free_tx_skbs()
3254 		if (!txr->tx_buf_ring)  in bnxt_free_tx_skbs()
3258 			struct bnxt_sw_tx_bd *tx_buf = &txr->tx_buf_ring[j];  in bnxt_free_tx_skbs()
3262 			if (i < bp->tx_nr_rings_xdp &&  in bnxt_free_tx_skbs()
3263 			    tx_buf->action == XDP_REDIRECT) {  in bnxt_free_tx_skbs()
3264 				dma_unmap_single(&pdev->dev,  in bnxt_free_tx_skbs()
3268 				xdp_return_frame(tx_buf->xdpf);  in bnxt_free_tx_skbs()
3269 				tx_buf->action = 0;  in bnxt_free_tx_skbs()
3270 				tx_buf->xdpf = NULL;  in bnxt_free_tx_skbs()
3275 			skb = tx_buf->skb;  in bnxt_free_tx_skbs()
3281 			tx_buf->skb = NULL;  in bnxt_free_tx_skbs()
3283 			if (tx_buf->is_push) {  in bnxt_free_tx_skbs()
3289 			dma_unmap_single(&pdev->dev,  in bnxt_free_tx_skbs()
3294 			last = tx_buf->nr_frags;  in bnxt_free_tx_skbs()
3297 				int ring_idx = j & bp->tx_ring_mask;  in bnxt_free_tx_skbs()
3298 				skb_frag_t *frag = &skb_shinfo(skb)->frags[k];  in bnxt_free_tx_skbs()
3300 				tx_buf = &txr->tx_buf_ring[ring_idx];  in bnxt_free_tx_skbs()
3302 					&pdev->dev,  in bnxt_free_tx_skbs()
3308 		netdev_tx_reset_queue(netdev_get_tx_queue(bp->dev, i));  in bnxt_free_tx_skbs()
3314 	struct pci_dev *pdev = bp->pdev;  in bnxt_free_one_rx_ring()
3317 	max_idx = bp->rx_nr_pages * RX_DESC_CNT;  in bnxt_free_one_rx_ring()
3320 		struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[i];  in bnxt_free_one_rx_ring()
3321 		dma_addr_t mapping = rx_buf->mapping;  in bnxt_free_one_rx_ring()
3322 		void *data = rx_buf->data;  in bnxt_free_one_rx_ring()
3327 		rx_buf->data = NULL;  in bnxt_free_one_rx_ring()
3329 			page_pool_recycle_direct(rxr->page_pool, data);  in bnxt_free_one_rx_ring()
3331 			dma_unmap_single_attrs(&pdev->dev, mapping,  in bnxt_free_one_rx_ring()
3332 					       bp->rx_buf_use_size, bp->rx_dir,  in bnxt_free_one_rx_ring()
3343 	max_idx = bp->rx_agg_nr_pages * RX_DESC_CNT;  in bnxt_free_one_rx_agg_ring()
3346 		struct bnxt_sw_rx_agg_bd *rx_agg_buf = &rxr->rx_agg_ring[i];  in bnxt_free_one_rx_agg_ring()
3347 		struct page *page = rx_agg_buf->page;  in bnxt_free_one_rx_agg_ring()
3352 		rx_agg_buf->page = NULL;  in bnxt_free_one_rx_agg_ring()
3353 		__clear_bit(i, rxr->rx_agg_bmap);  in bnxt_free_one_rx_agg_ring()
3355 		page_pool_recycle_direct(rxr->page_pool, page);  in bnxt_free_one_rx_agg_ring()
3361 	struct bnxt_rx_ring_info *rxr = &bp->rx_ring[ring_nr];  in bnxt_free_one_rx_ring_skbs()
3362 	struct pci_dev *pdev = bp->pdev;  in bnxt_free_one_rx_ring_skbs()
3366 	if (!rxr->rx_tpa)  in bnxt_free_one_rx_ring_skbs()
3369 	for (i = 0; i < bp->max_tpa; i++) {  in bnxt_free_one_rx_ring_skbs()
3370 		struct bnxt_tpa_info *tpa_info = &rxr->rx_tpa[i];  in bnxt_free_one_rx_ring_skbs()
3371 		u8 *data = tpa_info->data;  in bnxt_free_one_rx_ring_skbs()
3376 		dma_unmap_single_attrs(&pdev->dev, tpa_info->mapping,  in bnxt_free_one_rx_ring_skbs()
3377 				       bp->rx_buf_use_size, bp->rx_dir,  in bnxt_free_one_rx_ring_skbs()
3380 		tpa_info->data = NULL;  in bnxt_free_one_rx_ring_skbs()
3386 	if (!rxr->rx_buf_ring)  in bnxt_free_one_rx_ring_skbs()
3392 	if (!rxr->rx_agg_ring)  in bnxt_free_one_rx_ring_skbs()
3398 	map = rxr->rx_tpa_idx_map;  in bnxt_free_one_rx_ring_skbs()
3400 		memset(map->agg_idx_bmap, 0, sizeof(map->agg_idx_bmap));  in bnxt_free_one_rx_ring_skbs()
3407 	if (!bp->rx_ring)  in bnxt_free_rx_skbs()
3410 	for (i = 0; i < bp->rx_nr_rings; i++)  in bnxt_free_rx_skbs()
3422 	u8 init_val = ctxm->init_value;  in bnxt_init_ctx_mem()
3423 	u16 offset = ctxm->init_offset;  in bnxt_init_ctx_mem()
3433 	for (i = 0; i < len; i += ctxm->entry_size)  in bnxt_init_ctx_mem()
3439 	struct pci_dev *pdev = bp->pdev;  in bnxt_free_ring()
3442 	if (!rmem->pg_arr)  in bnxt_free_ring()
3445 	for (i = 0; i < rmem->nr_pages; i++) {  in bnxt_free_ring()
3446 		if (!rmem->pg_arr[i])  in bnxt_free_ring()
3449 		dma_free_coherent(&pdev->dev, rmem->page_size,  in bnxt_free_ring()
3450 				  rmem->pg_arr[i], rmem->dma_arr[i]);  in bnxt_free_ring()
3452 		rmem->pg_arr[i] = NULL;  in bnxt_free_ring()
3455 	if (rmem->pg_tbl) {  in bnxt_free_ring()
3456 		size_t pg_tbl_size = rmem->nr_pages * 8;  in bnxt_free_ring()
3458 		if (rmem->flags & BNXT_RMEM_USE_FULL_PAGE_FLAG)  in bnxt_free_ring()
3459 			pg_tbl_size = rmem->page_size;  in bnxt_free_ring()
3460 		dma_free_coherent(&pdev->dev, pg_tbl_size,  in bnxt_free_ring()
3461 				  rmem->pg_tbl, rmem->pg_tbl_map);  in bnxt_free_ring()
3462 		rmem->pg_tbl = NULL;  in bnxt_free_ring()
3464 	if (rmem->vmem_size && *rmem->vmem) {  in bnxt_free_ring()
3465 		vfree(*rmem->vmem);  in bnxt_free_ring()
3466 		*rmem->vmem = NULL;  in bnxt_free_ring()
3472 	struct pci_dev *pdev = bp->pdev;  in bnxt_alloc_ring()
3476 	if (rmem->flags & (BNXT_RMEM_VALID_PTE_FLAG | BNXT_RMEM_RING_PTE_FLAG))  in bnxt_alloc_ring()
3478 	if ((rmem->nr_pages > 1 || rmem->depth > 0) && !rmem->pg_tbl) {  in bnxt_alloc_ring()
3479 		size_t pg_tbl_size = rmem->nr_pages * 8;  in bnxt_alloc_ring()
3481 		if (rmem->flags & BNXT_RMEM_USE_FULL_PAGE_FLAG)  in bnxt_alloc_ring()
3482 			pg_tbl_size = rmem->page_size;  in bnxt_alloc_ring()
3483 		rmem->pg_tbl = dma_alloc_coherent(&pdev->dev, pg_tbl_size,  in bnxt_alloc_ring()
3484 						  &rmem->pg_tbl_map,  in bnxt_alloc_ring()
3486 		if (!rmem->pg_tbl)  in bnxt_alloc_ring()
3487 			return -ENOMEM;  in bnxt_alloc_ring()
3490 	for (i = 0; i < rmem->nr_pages; i++) {  in bnxt_alloc_ring()
3493 		rmem->pg_arr[i] = dma_alloc_coherent(&pdev->dev,  in bnxt_alloc_ring()
3494 						     rmem->page_size,  in bnxt_alloc_ring()
3495 						     &rmem->dma_arr[i],  in bnxt_alloc_ring()
3497 		if (!rmem->pg_arr[i])  in bnxt_alloc_ring()
3498 			return -ENOMEM;  in bnxt_alloc_ring()
3500 		if (rmem->ctx_mem)  in bnxt_alloc_ring()
3501 			bnxt_init_ctx_mem(rmem->ctx_mem, rmem->pg_arr[i],  in bnxt_alloc_ring()
3502 					  rmem->page_size);  in bnxt_alloc_ring()
3503 		if (rmem->nr_pages > 1 || rmem->depth > 0) {  in bnxt_alloc_ring()
3504 			if (i == rmem->nr_pages - 2 &&  in bnxt_alloc_ring()
3505 			    (rmem->flags & BNXT_RMEM_RING_PTE_FLAG))  in bnxt_alloc_ring()
3507 			else if (i == rmem->nr_pages - 1 &&  in bnxt_alloc_ring()
3508 				 (rmem->flags & BNXT_RMEM_RING_PTE_FLAG))  in bnxt_alloc_ring()
3510 			rmem->pg_tbl[i] =  in bnxt_alloc_ring()
3511 				cpu_to_le64(rmem->dma_arr[i] | extra_bits);  in bnxt_alloc_ring()
3515 	if (rmem->vmem_size) {  in bnxt_alloc_ring()
3516 		*rmem->vmem = vzalloc(rmem->vmem_size);  in bnxt_alloc_ring()
3517 		if (!(*rmem->vmem))  in bnxt_alloc_ring()
3518 			return -ENOMEM;  in bnxt_alloc_ring()
3527 	for (i = 0; i < bp->rx_nr_rings; i++) {  in bnxt_free_tpa_info()
3528 		struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];  in bnxt_free_tpa_info()
3530 		kfree(rxr->rx_tpa_idx_map);  in bnxt_free_tpa_info()
3531 		rxr->rx_tpa_idx_map = NULL;  in bnxt_free_tpa_info()
3532 		if (rxr->rx_tpa) {  in bnxt_free_tpa_info()
3533 			for (j = 0; j < bp->max_tpa; j++) {  in bnxt_free_tpa_info()
3534 				kfree(rxr->rx_tpa[j].agg_arr);  in bnxt_free_tpa_info()
3535 				rxr->rx_tpa[j].agg_arr = NULL;  in bnxt_free_tpa_info()
3538 		kfree(rxr->rx_tpa);  in bnxt_free_tpa_info()
3539 		rxr->rx_tpa = NULL;  in bnxt_free_tpa_info()
3547 	bp->max_tpa = MAX_TPA;  in bnxt_alloc_tpa_info()
3548 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_alloc_tpa_info()
3549 		if (!bp->max_tpa_v2)  in bnxt_alloc_tpa_info()
3551 		bp->max_tpa = max_t(u16, bp->max_tpa_v2, MAX_TPA_P5);  in bnxt_alloc_tpa_info()
3554 	for (i = 0; i < bp->rx_nr_rings; i++) {  in bnxt_alloc_tpa_info()
3555 		struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];  in bnxt_alloc_tpa_info()
3558 		rxr->rx_tpa = kcalloc(bp->max_tpa, sizeof(struct bnxt_tpa_info),  in bnxt_alloc_tpa_info()
3560 		if (!rxr->rx_tpa)  in bnxt_alloc_tpa_info()
3561 			return -ENOMEM;  in bnxt_alloc_tpa_info()
3563 		if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_alloc_tpa_info()
3565 		for (j = 0; j < bp->max_tpa; j++) {  in bnxt_alloc_tpa_info()
3568 				return -ENOMEM;  in bnxt_alloc_tpa_info()
3569 			rxr->rx_tpa[j].agg_arr = agg;  in bnxt_alloc_tpa_info()
3571 		rxr->rx_tpa_idx_map = kzalloc(sizeof(*rxr->rx_tpa_idx_map),  in bnxt_alloc_tpa_info()
3573 		if (!rxr->rx_tpa_idx_map)  in bnxt_alloc_tpa_info()
3574 			return -ENOMEM;  in bnxt_alloc_tpa_info()
3583 	if (!bp->rx_ring)  in bnxt_free_rx_rings()
3587 	for (i = 0; i < bp->rx_nr_rings; i++) {  in bnxt_free_rx_rings()
3588 		struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];  in bnxt_free_rx_rings()
3591 		if (rxr->xdp_prog)  in bnxt_free_rx_rings()
3592 			bpf_prog_put(rxr->xdp_prog);  in bnxt_free_rx_rings()
3594 		if (xdp_rxq_info_is_reg(&rxr->xdp_rxq))  in bnxt_free_rx_rings()
3595 			xdp_rxq_info_unreg(&rxr->xdp_rxq);  in bnxt_free_rx_rings()
3597 		page_pool_destroy(rxr->page_pool);  in bnxt_free_rx_rings()
3598 		rxr->page_pool = NULL;  in bnxt_free_rx_rings()
3600 		kfree(rxr->rx_agg_bmap);  in bnxt_free_rx_rings()
3601 		rxr->rx_agg_bmap = NULL;  in bnxt_free_rx_rings()
3603 		ring = &rxr->rx_ring_struct;  in bnxt_free_rx_rings()
3604 		bnxt_free_ring(bp, &ring->ring_mem);  in bnxt_free_rx_rings()
3606 		ring = &rxr->rx_agg_ring_struct;  in bnxt_free_rx_rings()
3607 		bnxt_free_ring(bp, &ring->ring_mem);  in bnxt_free_rx_rings()
3617 	pp.pool_size = bp->rx_agg_ring_size;  in bnxt_alloc_rx_page_pool()
3619 		pp.pool_size += bp->rx_ring_size;  in bnxt_alloc_rx_page_pool()
3621 	pp.napi = &rxr->bnapi->napi;  in bnxt_alloc_rx_page_pool()
3622 	pp.netdev = bp->dev;  in bnxt_alloc_rx_page_pool()
3623 	pp.dev = &bp->pdev->dev;  in bnxt_alloc_rx_page_pool()
3624 	pp.dma_dir = bp->rx_dir;  in bnxt_alloc_rx_page_pool()
3628 	rxr->page_pool = page_pool_create(&pp);  in bnxt_alloc_rx_page_pool()
3629 	if (IS_ERR(rxr->page_pool)) {  in bnxt_alloc_rx_page_pool()
3630 		int err = PTR_ERR(rxr->page_pool);  in bnxt_alloc_rx_page_pool()
3632 		rxr->page_pool = NULL;  in bnxt_alloc_rx_page_pool()
3640 	int numa_node = dev_to_node(&bp->pdev->dev);  in bnxt_alloc_rx_rings()
3643 	if (!bp->rx_ring)  in bnxt_alloc_rx_rings()
3644 		return -ENOMEM;  in bnxt_alloc_rx_rings()
3646 	if (bp->flags & BNXT_FLAG_AGG_RINGS)  in bnxt_alloc_rx_rings()
3649 	for (i = 0; i < bp->rx_nr_rings; i++) {  in bnxt_alloc_rx_rings()
3650 		struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];  in bnxt_alloc_rx_rings()
3654 		ring = &rxr->rx_ring_struct;  in bnxt_alloc_rx_rings()
3658 		netdev_dbg(bp->dev, "Allocating page pool for rx_ring[%d] on numa_node: %d\n",  in bnxt_alloc_rx_rings()
3664 		rc = xdp_rxq_info_reg(&rxr->xdp_rxq, bp->dev, i, 0);  in bnxt_alloc_rx_rings()
3668 		rc = xdp_rxq_info_reg_mem_model(&rxr->xdp_rxq,  in bnxt_alloc_rx_rings()
3670 						rxr->page_pool);  in bnxt_alloc_rx_rings()
3672 			xdp_rxq_info_unreg(&rxr->xdp_rxq);  in bnxt_alloc_rx_rings()
3676 		rc = bnxt_alloc_ring(bp, &ring->ring_mem);  in bnxt_alloc_rx_rings()
3680 		ring->grp_idx = i;  in bnxt_alloc_rx_rings()
3684 			ring = &rxr->rx_agg_ring_struct;  in bnxt_alloc_rx_rings()
3685 			rc = bnxt_alloc_ring(bp, &ring->ring_mem);  in bnxt_alloc_rx_rings()
3689 			ring->grp_idx = i;  in bnxt_alloc_rx_rings()
3690 			rxr->rx_agg_bmap_size = bp->rx_agg_ring_mask + 1;  in bnxt_alloc_rx_rings()
3691 			mem_size = rxr->rx_agg_bmap_size / 8;  in bnxt_alloc_rx_rings()
3692 			rxr->rx_agg_bmap = kzalloc(mem_size, GFP_KERNEL);  in bnxt_alloc_rx_rings()
3693 			if (!rxr->rx_agg_bmap)  in bnxt_alloc_rx_rings()
3694 				return -ENOMEM;  in bnxt_alloc_rx_rings()
3697 	if (bp->flags & BNXT_FLAG_TPA)  in bnxt_alloc_rx_rings()
3705 	struct pci_dev *pdev = bp->pdev;  in bnxt_free_tx_rings()
3707 	if (!bp->tx_ring)  in bnxt_free_tx_rings()
3710 	for (i = 0; i < bp->tx_nr_rings; i++) {  in bnxt_free_tx_rings()
3711 		struct bnxt_tx_ring_info *txr = &bp->tx_ring[i];  in bnxt_free_tx_rings()
3714 		if (txr->tx_push) {  in bnxt_free_tx_rings()
3715 			dma_free_coherent(&pdev->dev, bp->tx_push_size,  in bnxt_free_tx_rings()
3716 					  txr->tx_push, txr->tx_push_mapping);  in bnxt_free_tx_rings()
3717 			txr->tx_push = NULL;  in bnxt_free_tx_rings()
3720 		ring = &txr->tx_ring_struct;  in bnxt_free_tx_rings()
3722 		bnxt_free_ring(bp, &ring->ring_mem);  in bnxt_free_tx_rings()
3727 	((tc) * (bp)->tx_nr_rings_per_tc)
3730 	((tx) % (bp)->tx_nr_rings_per_tc)
3733 	((tx) / (bp)->tx_nr_rings_per_tc)
3738 	struct pci_dev *pdev = bp->pdev;  in bnxt_alloc_tx_rings()
3740 	bp->tx_push_size = 0;  in bnxt_alloc_tx_rings()
3741 	if (bp->tx_push_thresh) {  in bnxt_alloc_tx_rings()
3745 					bp->tx_push_thresh);  in bnxt_alloc_tx_rings()
3749 			bp->tx_push_thresh = 0;  in bnxt_alloc_tx_rings()
3752 		bp->tx_push_size = push_size;  in bnxt_alloc_tx_rings()
3755 	for (i = 0, j = 0; i < bp->tx_nr_rings; i++) {  in bnxt_alloc_tx_rings()
3756 		struct bnxt_tx_ring_info *txr = &bp->tx_ring[i];  in bnxt_alloc_tx_rings()
3760 		ring = &txr->tx_ring_struct;  in bnxt_alloc_tx_rings()
3762 		rc = bnxt_alloc_ring(bp, &ring->ring_mem);  in bnxt_alloc_tx_rings()
3766 		ring->grp_idx = txr->bnapi->index;  in bnxt_alloc_tx_rings()
3767 		if (bp->tx_push_size) {  in bnxt_alloc_tx_rings()
3770 			/* One pre-allocated DMA buffer to backup  in bnxt_alloc_tx_rings()
3773 			txr->tx_push = dma_alloc_coherent(&pdev->dev,  in bnxt_alloc_tx_rings()
3774 						bp->tx_push_size,  in bnxt_alloc_tx_rings()
3775 						&txr->tx_push_mapping,  in bnxt_alloc_tx_rings()
3778 			if (!txr->tx_push)  in bnxt_alloc_tx_rings()
3779 				return -ENOMEM;  in bnxt_alloc_tx_rings()
3781 			mapping = txr->tx_push_mapping +  in bnxt_alloc_tx_rings()
3783 			txr->data_mapping = cpu_to_le64(mapping);  in bnxt_alloc_tx_rings()
3785 		qidx = bp->tc_to_qidx[j];  in bnxt_alloc_tx_rings()
3786 		ring->queue_id = bp->q_info[qidx].queue_id;  in bnxt_alloc_tx_rings()
3787 		spin_lock_init(&txr->xdp_tx_lock);  in bnxt_alloc_tx_rings()
3788 		if (i < bp->tx_nr_rings_xdp)  in bnxt_alloc_tx_rings()
3790 		if (BNXT_RING_TO_TC_OFF(bp, i) == (bp->tx_nr_rings_per_tc - 1))  in bnxt_alloc_tx_rings()
3798 	struct bnxt_ring_struct *ring = &cpr->cp_ring_struct;  in bnxt_free_cp_arrays()
3800 	kfree(cpr->cp_desc_ring);  in bnxt_free_cp_arrays()
3801 	cpr->cp_desc_ring = NULL;  in bnxt_free_cp_arrays()
3802 	ring->ring_mem.pg_arr = NULL;  in bnxt_free_cp_arrays()
3803 	kfree(cpr->cp_desc_mapping);  in bnxt_free_cp_arrays()
3804 	cpr->cp_desc_mapping = NULL;  in bnxt_free_cp_arrays()
3805 	ring->ring_mem.dma_arr = NULL;  in bnxt_free_cp_arrays()
3810 	cpr->cp_desc_ring = kcalloc(n, sizeof(*cpr->cp_desc_ring), GFP_KERNEL);  in bnxt_alloc_cp_arrays()
3811 	if (!cpr->cp_desc_ring)  in bnxt_alloc_cp_arrays()
3812 		return -ENOMEM;  in bnxt_alloc_cp_arrays()
3813 	cpr->cp_desc_mapping = kcalloc(n, sizeof(*cpr->cp_desc_mapping),  in bnxt_alloc_cp_arrays()
3815 	if (!cpr->cp_desc_mapping)  in bnxt_alloc_cp_arrays()
3816 		return -ENOMEM;  in bnxt_alloc_cp_arrays()
3824 	if (!bp->bnapi)  in bnxt_free_all_cp_arrays()
3826 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_free_all_cp_arrays()
3827 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_free_all_cp_arrays()
3831 		bnxt_free_cp_arrays(&bnapi->cp_ring);  in bnxt_free_all_cp_arrays()
3837 	int i, n = bp->cp_nr_pages;  in bnxt_alloc_all_cp_arrays()
3839 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_alloc_all_cp_arrays()
3840 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_alloc_all_cp_arrays()
3845 		rc = bnxt_alloc_cp_arrays(&bnapi->cp_ring, n);  in bnxt_alloc_all_cp_arrays()
3856 	if (!bp->bnapi)  in bnxt_free_cp_rings()
3859 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_free_cp_rings()
3860 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_free_cp_rings()
3868 		cpr = &bnapi->cp_ring;  in bnxt_free_cp_rings()
3869 		ring = &cpr->cp_ring_struct;  in bnxt_free_cp_rings()
3871 		bnxt_free_ring(bp, &ring->ring_mem);  in bnxt_free_cp_rings()
3873 		if (!cpr->cp_ring_arr)  in bnxt_free_cp_rings()
3876 		for (j = 0; j < cpr->cp_ring_count; j++) {  in bnxt_free_cp_rings()
3877 			struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[j];  in bnxt_free_cp_rings()
3879 			ring = &cpr2->cp_ring_struct;  in bnxt_free_cp_rings()
3880 			bnxt_free_ring(bp, &ring->ring_mem);  in bnxt_free_cp_rings()
3883 		kfree(cpr->cp_ring_arr);  in bnxt_free_cp_rings()
3884 		cpr->cp_ring_arr = NULL;  in bnxt_free_cp_rings()
3885 		cpr->cp_ring_count = 0;  in bnxt_free_cp_rings()
3896 	rc = bnxt_alloc_cp_arrays(cpr, bp->cp_nr_pages);  in bnxt_alloc_cp_sub_ring()
3899 		return -ENOMEM;  in bnxt_alloc_cp_sub_ring()
3901 	ring = &cpr->cp_ring_struct;  in bnxt_alloc_cp_sub_ring()
3902 	rmem = &ring->ring_mem;  in bnxt_alloc_cp_sub_ring()
3903 	rmem->nr_pages = bp->cp_nr_pages;  in bnxt_alloc_cp_sub_ring()
3904 	rmem->page_size = HW_CMPD_RING_SIZE;  in bnxt_alloc_cp_sub_ring()
3905 	rmem->pg_arr = (void **)cpr->cp_desc_ring;  in bnxt_alloc_cp_sub_ring()
3906 	rmem->dma_arr = cpr->cp_desc_mapping;  in bnxt_alloc_cp_sub_ring()
3907 	rmem->flags = BNXT_RMEM_RING_PTE_FLAG;  in bnxt_alloc_cp_sub_ring()
3918 	bool sh = !!(bp->flags & BNXT_FLAG_SHARED_RINGS);  in bnxt_alloc_cp_rings()
3920 	int tcs = bp->num_tc;  in bnxt_alloc_cp_rings()
3925 	for (i = 0, j = 0; i < bp->cp_nr_rings; i++) {  in bnxt_alloc_cp_rings()
3926 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_alloc_cp_rings()
3935 		cpr = &bnapi->cp_ring;  in bnxt_alloc_cp_rings()
3936 		cpr->bnapi = bnapi;  in bnxt_alloc_cp_rings()
3937 		ring = &cpr->cp_ring_struct;  in bnxt_alloc_cp_rings()
3939 		rc = bnxt_alloc_ring(bp, &ring->ring_mem);  in bnxt_alloc_cp_rings()
3943 		ring->map_idx = ulp_msix + i;  in bnxt_alloc_cp_rings()
3945 		if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_alloc_cp_rings()
3948 		if (i < bp->rx_nr_rings) {  in bnxt_alloc_cp_rings()
3952 		if (i < bp->tx_nr_rings_xdp) {  in bnxt_alloc_cp_rings()
3955 		} else if ((sh && i < bp->tx_nr_rings) ||  in bnxt_alloc_cp_rings()
3956 			 (!sh && i >= bp->rx_nr_rings)) {  in bnxt_alloc_cp_rings()
3961 		cpr->cp_ring_arr = kcalloc(cp_count, sizeof(*cpr),  in bnxt_alloc_cp_rings()
3963 		if (!cpr->cp_ring_arr)  in bnxt_alloc_cp_rings()
3964 			return -ENOMEM;  in bnxt_alloc_cp_rings()
3965 		cpr->cp_ring_count = cp_count;  in bnxt_alloc_cp_rings()
3968 			cpr2 = &cpr->cp_ring_arr[k];  in bnxt_alloc_cp_rings()
3972 			cpr2->bnapi = bnapi;  in bnxt_alloc_cp_rings()
3973 			cpr2->sw_stats = cpr->sw_stats;  in bnxt_alloc_cp_rings()
3974 			cpr2->cp_idx = k;  in bnxt_alloc_cp_rings()
3976 				bp->rx_ring[i].rx_cpr = cpr2;  in bnxt_alloc_cp_rings()
3977 				cpr2->cp_ring_type = BNXT_NQ_HDL_TYPE_RX;  in bnxt_alloc_cp_rings()
3979 				int n, tc = k - rx;  in bnxt_alloc_cp_rings()
3982 				bp->tx_ring[n].tx_cpr = cpr2;  in bnxt_alloc_cp_rings()
3983 				cpr2->cp_ring_type = BNXT_NQ_HDL_TYPE_TX;  in bnxt_alloc_cp_rings()
3998 	ring = &rxr->rx_ring_struct;  in bnxt_init_rx_ring_struct()
3999 	rmem = &ring->ring_mem;  in bnxt_init_rx_ring_struct()
4000 	rmem->nr_pages = bp->rx_nr_pages;  in bnxt_init_rx_ring_struct()
4001 	rmem->page_size = HW_RXBD_RING_SIZE;  in bnxt_init_rx_ring_struct()
4002 	rmem->pg_arr = (void **)rxr->rx_desc_ring;  in bnxt_init_rx_ring_struct()
4003 	rmem->dma_arr = rxr->rx_desc_mapping;  in bnxt_init_rx_ring_struct()
4004 	rmem->vmem_size = SW_RXBD_RING_SIZE * bp->rx_nr_pages;  in bnxt_init_rx_ring_struct()
4005 	rmem->vmem = (void **)&rxr->rx_buf_ring;  in bnxt_init_rx_ring_struct()
4007 	ring = &rxr->rx_agg_ring_struct;  in bnxt_init_rx_ring_struct()
4008 	rmem = &ring->ring_mem;  in bnxt_init_rx_ring_struct()
4009 	rmem->nr_pages = bp->rx_agg_nr_pages;  in bnxt_init_rx_ring_struct()
4010 	rmem->page_size = HW_RXBD_RING_SIZE;  in bnxt_init_rx_ring_struct()
4011 	rmem->pg_arr = (void **)rxr->rx_agg_desc_ring;  in bnxt_init_rx_ring_struct()
4012 	rmem->dma_arr = rxr->rx_agg_desc_mapping;  in bnxt_init_rx_ring_struct()
4013 	rmem->vmem_size = SW_RXBD_AGG_RING_SIZE * bp->rx_agg_nr_pages;  in bnxt_init_rx_ring_struct()
4014 	rmem->vmem = (void **)&rxr->rx_agg_ring;  in bnxt_init_rx_ring_struct()
4024 	rxr->page_pool->p.napi = NULL;  in bnxt_reset_rx_ring_struct()
4025 	rxr->page_pool = NULL;  in bnxt_reset_rx_ring_struct()
4026 	memset(&rxr->xdp_rxq, 0, sizeof(struct xdp_rxq_info));  in bnxt_reset_rx_ring_struct()
4028 	ring = &rxr->rx_ring_struct;  in bnxt_reset_rx_ring_struct()
4029 	rmem = &ring->ring_mem;  in bnxt_reset_rx_ring_struct()
4030 	rmem->pg_tbl = NULL;  in bnxt_reset_rx_ring_struct()
4031 	rmem->pg_tbl_map = 0;  in bnxt_reset_rx_ring_struct()
4032 	for (i = 0; i < rmem->nr_pages; i++) {  in bnxt_reset_rx_ring_struct()
4033 		rmem->pg_arr[i] = NULL;  in bnxt_reset_rx_ring_struct()
4034 		rmem->dma_arr[i] = 0;  in bnxt_reset_rx_ring_struct()
4036 	*rmem->vmem = NULL;  in bnxt_reset_rx_ring_struct()
4038 	ring = &rxr->rx_agg_ring_struct;  in bnxt_reset_rx_ring_struct()
4039 	rmem = &ring->ring_mem;  in bnxt_reset_rx_ring_struct()
4040 	rmem->pg_tbl = NULL;  in bnxt_reset_rx_ring_struct()
4041 	rmem->pg_tbl_map = 0;  in bnxt_reset_rx_ring_struct()
4042 	for (i = 0; i < rmem->nr_pages; i++) {  in bnxt_reset_rx_ring_struct()
4043 		rmem->pg_arr[i] = NULL;  in bnxt_reset_rx_ring_struct()
4044 		rmem->dma_arr[i] = 0;  in bnxt_reset_rx_ring_struct()
4046 	*rmem->vmem = NULL;  in bnxt_reset_rx_ring_struct()
4053 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_init_ring_struct()
4054 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_init_ring_struct()
4064 		cpr = &bnapi->cp_ring;  in bnxt_init_ring_struct()
4065 		ring = &cpr->cp_ring_struct;  in bnxt_init_ring_struct()
4066 		rmem = &ring->ring_mem;  in bnxt_init_ring_struct()
4067 		rmem->nr_pages = bp->cp_nr_pages;  in bnxt_init_ring_struct()
4068 		rmem->page_size = HW_CMPD_RING_SIZE;  in bnxt_init_ring_struct()
4069 		rmem->pg_arr = (void **)cpr->cp_desc_ring;  in bnxt_init_ring_struct()
4070 		rmem->dma_arr = cpr->cp_desc_mapping;  in bnxt_init_ring_struct()
4071 		rmem->vmem_size = 0;  in bnxt_init_ring_struct()
4073 		rxr = bnapi->rx_ring;  in bnxt_init_ring_struct()
4077 		ring = &rxr->rx_ring_struct;  in bnxt_init_ring_struct()
4078 		rmem = &ring->ring_mem;  in bnxt_init_ring_struct()
4079 		rmem->nr_pages = bp->rx_nr_pages;  in bnxt_init_ring_struct()
4080 		rmem->page_size = HW_RXBD_RING_SIZE;  in bnxt_init_ring_struct()
4081 		rmem->pg_arr = (void **)rxr->rx_desc_ring;  in bnxt_init_ring_struct()
4082 		rmem->dma_arr = rxr->rx_desc_mapping;  in bnxt_init_ring_struct()
4083 		rmem->vmem_size = SW_RXBD_RING_SIZE * bp->rx_nr_pages;  in bnxt_init_ring_struct()
4084 		rmem->vmem = (void **)&rxr->rx_buf_ring;  in bnxt_init_ring_struct()
4086 		ring = &rxr->rx_agg_ring_struct;  in bnxt_init_ring_struct()
4087 		rmem = &ring->ring_mem;  in bnxt_init_ring_struct()
4088 		rmem->nr_pages = bp->rx_agg_nr_pages;  in bnxt_init_ring_struct()
4089 		rmem->page_size = HW_RXBD_RING_SIZE;  in bnxt_init_ring_struct()
4090 		rmem->pg_arr = (void **)rxr->rx_agg_desc_ring;  in bnxt_init_ring_struct()
4091 		rmem->dma_arr = rxr->rx_agg_desc_mapping;  in bnxt_init_ring_struct()
4092 		rmem->vmem_size = SW_RXBD_AGG_RING_SIZE * bp->rx_agg_nr_pages;  in bnxt_init_ring_struct()
4093 		rmem->vmem = (void **)&rxr->rx_agg_ring;  in bnxt_init_ring_struct()
4097 			ring = &txr->tx_ring_struct;  in bnxt_init_ring_struct()
4098 			rmem = &ring->ring_mem;  in bnxt_init_ring_struct()
4099 			rmem->nr_pages = bp->tx_nr_pages;  in bnxt_init_ring_struct()
4100 			rmem->page_size = HW_TXBD_RING_SIZE;  in bnxt_init_ring_struct()
4101 			rmem->pg_arr = (void **)txr->tx_desc_ring;  in bnxt_init_ring_struct()
4102 			rmem->dma_arr = txr->tx_desc_mapping;  in bnxt_init_ring_struct()
4103 			rmem->vmem_size = SW_TXBD_RING_SIZE * bp->tx_nr_pages;  in bnxt_init_ring_struct()
4104 			rmem->vmem = (void **)&txr->tx_buf_ring;  in bnxt_init_ring_struct()
4115 	rx_buf_ring = (struct rx_bd **)ring->ring_mem.pg_arr;  in bnxt_init_rxbd_pages()
4116 	for (i = 0, prod = 0; i < ring->ring_mem.nr_pages; i++) {  in bnxt_init_rxbd_pages()
4125 			rxbd->rx_bd_len_flags_type = cpu_to_le32(type);  in bnxt_init_rxbd_pages()
4126 			rxbd->rx_bd_opaque = prod;  in bnxt_init_rxbd_pages()
4138 	prod = rxr->rx_prod;  in bnxt_alloc_one_rx_ring_skb()
4139 	for (i = 0; i < bp->rx_ring_size; i++) {  in bnxt_alloc_one_rx_ring_skb()
4141 			netdev_warn(bp->dev, "init'ed rx ring %d with %d/%d skbs only\n",  in bnxt_alloc_one_rx_ring_skb()
4142 				    ring_nr, i, bp->rx_ring_size);  in bnxt_alloc_one_rx_ring_skb()
4147 	rxr->rx_prod = prod;  in bnxt_alloc_one_rx_ring_skb()
4157 	prod = rxr->rx_agg_prod;  in bnxt_alloc_one_rx_ring_page()
4158 	for (i = 0; i < bp->rx_agg_ring_size; i++) {  in bnxt_alloc_one_rx_ring_page()
4160 			netdev_warn(bp->dev, "init'ed rx ring %d with %d/%d pages only\n",  in bnxt_alloc_one_rx_ring_page()
4161 				    ring_nr, i, bp->rx_ring_size);  in bnxt_alloc_one_rx_ring_page()
4166 	rxr->rx_agg_prod = prod;  in bnxt_alloc_one_rx_ring_page()
4171 	struct bnxt_rx_ring_info *rxr = &bp->rx_ring[ring_nr];  in bnxt_alloc_one_rx_ring()
4176 	if (!(bp->flags & BNXT_FLAG_AGG_RINGS))  in bnxt_alloc_one_rx_ring()
4181 	if (rxr->rx_tpa) {  in bnxt_alloc_one_rx_ring()
4185 		for (i = 0; i < bp->max_tpa; i++) {  in bnxt_alloc_one_rx_ring()
4188 				return -ENOMEM;  in bnxt_alloc_one_rx_ring()
4190 			rxr->rx_tpa[i].data = data;  in bnxt_alloc_one_rx_ring()
4191 			rxr->rx_tpa[i].data_ptr = data + bp->rx_offset;  in bnxt_alloc_one_rx_ring()
4192 			rxr->rx_tpa[i].mapping = mapping;  in bnxt_alloc_one_rx_ring()
4204 	type = (bp->rx_buf_use_size << RX_BD_LEN_SHIFT) |  in bnxt_init_one_rx_ring_rxbd()
4210 	ring = &rxr->rx_ring_struct;  in bnxt_init_one_rx_ring_rxbd()
4212 	ring->fw_ring_id = INVALID_HW_RING_ID;  in bnxt_init_one_rx_ring_rxbd()
4221 	ring = &rxr->rx_agg_ring_struct;  in bnxt_init_one_rx_agg_ring_rxbd()
4222 	ring->fw_ring_id = INVALID_HW_RING_ID;  in bnxt_init_one_rx_agg_ring_rxbd()
4223 	if ((bp->flags & BNXT_FLAG_AGG_RINGS)) {  in bnxt_init_one_rx_agg_ring_rxbd()
4235 	rxr = &bp->rx_ring[ring_nr];  in bnxt_init_one_rx_ring()
4238 	netif_queue_set_napi(bp->dev, ring_nr, NETDEV_QUEUE_TYPE_RX,  in bnxt_init_one_rx_ring()
4239 			     &rxr->bnapi->napi);  in bnxt_init_one_rx_ring()
4241 	if (BNXT_RX_PAGE_MODE(bp) && bp->xdp_prog) {  in bnxt_init_one_rx_ring()
4242 		bpf_prog_add(bp->xdp_prog, 1);  in bnxt_init_one_rx_ring()
4243 		rxr->xdp_prog = bp->xdp_prog;  in bnxt_init_one_rx_ring()
4255 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_init_cp_rings()
4256 		struct bnxt_cp_ring_info *cpr = &bp->bnapi[i]->cp_ring;  in bnxt_init_cp_rings()
4257 		struct bnxt_ring_struct *ring = &cpr->cp_ring_struct;  in bnxt_init_cp_rings()
4259 		ring->fw_ring_id = INVALID_HW_RING_ID;  in bnxt_init_cp_rings()
4260 		cpr->rx_ring_coal.coal_ticks = bp->rx_coal.coal_ticks;  in bnxt_init_cp_rings()
4261 		cpr->rx_ring_coal.coal_bufs = bp->rx_coal.coal_bufs;  in bnxt_init_cp_rings()
4262 		if (!cpr->cp_ring_arr)  in bnxt_init_cp_rings()
4264 		for (j = 0; j < cpr->cp_ring_count; j++) {  in bnxt_init_cp_rings()
4265 			struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[j];  in bnxt_init_cp_rings()
4267 			ring = &cpr2->cp_ring_struct;  in bnxt_init_cp_rings()
4268 			ring->fw_ring_id = INVALID_HW_RING_ID;  in bnxt_init_cp_rings()
4269 			cpr2->rx_ring_coal.coal_ticks = bp->rx_coal.coal_ticks;  in bnxt_init_cp_rings()
4270 			cpr2->rx_ring_coal.coal_bufs = bp->rx_coal.coal_bufs;  in bnxt_init_cp_rings()
4280 		bp->rx_offset = NET_IP_ALIGN + XDP_PACKET_HEADROOM;  in bnxt_init_rx_rings()
4281 		bp->rx_dma_offset = XDP_PACKET_HEADROOM;  in bnxt_init_rx_rings()
4283 		bp->rx_offset = BNXT_RX_OFFSET;  in bnxt_init_rx_rings()
4284 		bp->rx_dma_offset = BNXT_RX_DMA_OFFSET;  in bnxt_init_rx_rings()
4287 	for (i = 0; i < bp->rx_nr_rings; i++) {  in bnxt_init_rx_rings()
4300 	bp->tx_wake_thresh = max_t(int, bp->tx_ring_size / 2,  in bnxt_init_tx_rings()
4303 	for (i = 0; i < bp->tx_nr_rings; i++) {  in bnxt_init_tx_rings()
4304 		struct bnxt_tx_ring_info *txr = &bp->tx_ring[i];  in bnxt_init_tx_rings()
4305 		struct bnxt_ring_struct *ring = &txr->tx_ring_struct;  in bnxt_init_tx_rings()
4307 		ring->fw_ring_id = INVALID_HW_RING_ID;  in bnxt_init_tx_rings()
4309 		if (i >= bp->tx_nr_rings_xdp)  in bnxt_init_tx_rings()
4310 			netif_queue_set_napi(bp->dev, i - bp->tx_nr_rings_xdp,  in bnxt_init_tx_rings()
4312 					     &txr->bnapi->napi);  in bnxt_init_tx_rings()
4320 	kfree(bp->grp_info);  in bnxt_free_ring_grps()
4321 	bp->grp_info = NULL;  in bnxt_free_ring_grps()
4329 		bp->grp_info = kcalloc(bp->cp_nr_rings,  in bnxt_init_ring_grps()
4332 		if (!bp->grp_info)  in bnxt_init_ring_grps()
4333 			return -ENOMEM;  in bnxt_init_ring_grps()
4335 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_init_ring_grps()
4337 			bp->grp_info[i].fw_stats_ctx = INVALID_HW_RING_ID;  in bnxt_init_ring_grps()
4338 		bp->grp_info[i].fw_grp_id = INVALID_HW_RING_ID;  in bnxt_init_ring_grps()
4339 		bp->grp_info[i].rx_fw_ring_id = INVALID_HW_RING_ID;  in bnxt_init_ring_grps()
4340 		bp->grp_info[i].agg_fw_ring_id = INVALID_HW_RING_ID;  in bnxt_init_ring_grps()
4341 		bp->grp_info[i].cp_fw_ring_id = INVALID_HW_RING_ID;  in bnxt_init_ring_grps()
4348 	kfree(bp->vnic_info);  in bnxt_free_vnics()
4349 	bp->vnic_info = NULL;  in bnxt_free_vnics()
4350 	bp->nr_vnics = 0;  in bnxt_free_vnics()
4358 	if (bp->flags & BNXT_FLAG_RFS) {  in bnxt_alloc_vnics()
4361 		else if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_alloc_vnics()
4362 			num_vnics += bp->rx_nr_rings;  in bnxt_alloc_vnics()
4369 	bp->vnic_info = kcalloc(num_vnics, sizeof(struct bnxt_vnic_info),  in bnxt_alloc_vnics()
4371 	if (!bp->vnic_info)  in bnxt_alloc_vnics()
4372 		return -ENOMEM;  in bnxt_alloc_vnics()
4374 	bp->nr_vnics = num_vnics;  in bnxt_alloc_vnics()
4380 	struct bnxt_vnic_info *vnic0 = &bp->vnic_info[BNXT_VNIC_DEFAULT];  in bnxt_init_vnics()
4383 	for (i = 0; i < bp->nr_vnics; i++) {  in bnxt_init_vnics()
4384 		struct bnxt_vnic_info *vnic = &bp->vnic_info[i];  in bnxt_init_vnics()
4387 		vnic->fw_vnic_id = INVALID_HW_RING_ID;  in bnxt_init_vnics()
4388 		vnic->vnic_id = i;  in bnxt_init_vnics()
4390 			vnic->fw_rss_cos_lb_ctx[j] = INVALID_HW_RING_ID;  in bnxt_init_vnics()
4392 		vnic->fw_l2_ctx_id = INVALID_HW_RING_ID;  in bnxt_init_vnics()
4394 		if (bp->vnic_info[i].rss_hash_key) {  in bnxt_init_vnics()
4396 				u8 *key = (void *)vnic->rss_hash_key;  in bnxt_init_vnics()
4399 				if (!bp->rss_hash_key_valid &&  in bnxt_init_vnics()
4400 				    !bp->rss_hash_key_updated) {  in bnxt_init_vnics()
4401 					get_random_bytes(bp->rss_hash_key,  in bnxt_init_vnics()
4403 					bp->rss_hash_key_updated = true;  in bnxt_init_vnics()
4406 				memcpy(vnic->rss_hash_key, bp->rss_hash_key,  in bnxt_init_vnics()
4409 				if (!bp->rss_hash_key_updated)  in bnxt_init_vnics()
4412 				bp->rss_hash_key_updated = false;  in bnxt_init_vnics()
4413 				bp->rss_hash_key_valid = true;  in bnxt_init_vnics()
4415 				bp->toeplitz_prefix = 0;  in bnxt_init_vnics()
4417 					bp->toeplitz_prefix <<= 8;  in bnxt_init_vnics()
4418 					bp->toeplitz_prefix |= key[k];  in bnxt_init_vnics()
4421 				memcpy(vnic->rss_hash_key, vnic0->rss_hash_key,  in bnxt_init_vnics()
4439 	while (pages & (pages - 1))  in bnxt_calc_nr_ring_pages()
4447 	bp->flags &= ~BNXT_FLAG_TPA;  in bnxt_set_tpa_flags()
4448 	if (bp->flags & BNXT_FLAG_NO_AGG_RINGS)  in bnxt_set_tpa_flags()
4450 	if (bp->dev->features & NETIF_F_LRO)  in bnxt_set_tpa_flags()
4451 		bp->flags |= BNXT_FLAG_LRO;  in bnxt_set_tpa_flags()
4452 	else if (bp->dev->features & NETIF_F_GRO_HW)  in bnxt_set_tpa_flags()
4453 		bp->flags |= BNXT_FLAG_GRO;  in bnxt_set_tpa_flags()
4456 /* bp->rx_ring_size, bp->tx_ring_size, dev->mtu, BNXT_FLAG_{G|L}RO flags must
4465 	rx_size = SKB_DATA_ALIGN(bp->dev->mtu + ETH_HLEN + NET_IP_ALIGN + 8);  in bnxt_set_ring_params()
4470 	bp->rx_copy_thresh = BNXT_RX_COPY_THRESH;  in bnxt_set_ring_params()
4471 	ring_size = bp->rx_ring_size;  in bnxt_set_ring_params()
4472 	bp->rx_agg_ring_size = 0;  in bnxt_set_ring_params()
4473 	bp->rx_agg_nr_pages = 0;  in bnxt_set_ring_params()
4475 	if (bp->flags & BNXT_FLAG_TPA)  in bnxt_set_ring_params()
4478 	bp->flags &= ~BNXT_FLAG_JUMBO;  in bnxt_set_ring_params()
4479 	if (rx_space > PAGE_SIZE && !(bp->flags & BNXT_FLAG_NO_AGG_RINGS)) {  in bnxt_set_ring_params()
4482 		bp->flags |= BNXT_FLAG_JUMBO;  in bnxt_set_ring_params()
4483 		jumbo_factor = PAGE_ALIGN(bp->dev->mtu - 40) >> PAGE_SHIFT;  in bnxt_set_ring_params()
4490 …	netdev_warn(bp->dev, "RX ring size reduced from %d to %d because the jumbo ring is now enabled\n",  in bnxt_set_ring_params()
4491 				    bp->rx_ring_size, ring_size);  in bnxt_set_ring_params()
4492 			bp->rx_ring_size = ring_size;  in bnxt_set_ring_params()
4496 		bp->rx_agg_nr_pages = bnxt_calc_nr_ring_pages(agg_ring_size,  in bnxt_set_ring_params()
4498 		if (bp->rx_agg_nr_pages > MAX_RX_AGG_PAGES) {  in bnxt_set_ring_params()
4501 			bp->rx_agg_nr_pages = MAX_RX_AGG_PAGES;  in bnxt_set_ring_params()
4502 			agg_ring_size = MAX_RX_AGG_PAGES * RX_DESC_CNT - 1;  in bnxt_set_ring_params()
4503 			netdev_warn(bp->dev, "rx agg ring size %d reduced to %d.\n",  in bnxt_set_ring_params()
4506 		bp->rx_agg_ring_size = agg_ring_size;  in bnxt_set_ring_params()
4507 		bp->rx_agg_ring_mask = (bp->rx_agg_nr_pages * RX_DESC_CNT) - 1;  in bnxt_set_ring_params()
4511 			rx_size = PAGE_SIZE -  in bnxt_set_ring_params()
4512 				  ALIGN(max(NET_SKB_PAD, XDP_PACKET_HEADROOM), 8) -  in bnxt_set_ring_params()
4521 	bp->rx_buf_use_size = rx_size;  in bnxt_set_ring_params()
4522 	bp->rx_buf_size = rx_space;  in bnxt_set_ring_params()
4524 	bp->rx_nr_pages = bnxt_calc_nr_ring_pages(ring_size, RX_DESC_CNT);  in bnxt_set_ring_params()
4525 	bp->rx_ring_mask = (bp->rx_nr_pages * RX_DESC_CNT) - 1;  in bnxt_set_ring_params()
4527 	ring_size = bp->tx_ring_size;  in bnxt_set_ring_params()
4528 	bp->tx_nr_pages = bnxt_calc_nr_ring_pages(ring_size, TX_DESC_CNT);  in bnxt_set_ring_params()
4529 	bp->tx_ring_mask = (bp->tx_nr_pages * TX_DESC_CNT) - 1;  in bnxt_set_ring_params()
4531 	max_rx_cmpl = bp->rx_ring_size;  in bnxt_set_ring_params()
4536 	if (bp->flags & BNXT_FLAG_TPA)  in bnxt_set_ring_params()
4537 		max_rx_cmpl += bp->max_tpa;  in bnxt_set_ring_params()
4538 	/* RX and TPA completions are 32-byte, all others are 16-byte */  in bnxt_set_ring_params()
4539 	ring_size = max_rx_cmpl * 2 + agg_ring_size + bp->tx_ring_size;  in bnxt_set_ring_params()
4540 	bp->cp_ring_size = ring_size;  in bnxt_set_ring_params()
4542 	bp->cp_nr_pages = bnxt_calc_nr_ring_pages(ring_size, CP_DESC_CNT);  in bnxt_set_ring_params()
4543 	if (bp->cp_nr_pages > MAX_CP_PAGES) {  in bnxt_set_ring_params()
4544 		bp->cp_nr_pages = MAX_CP_PAGES;  in bnxt_set_ring_params()
4545 		bp->cp_ring_size = MAX_CP_PAGES * CP_DESC_CNT - 1;  in bnxt_set_ring_params()
4546 		netdev_warn(bp->dev, "completion ring size %d reduced to %d.\n",  in bnxt_set_ring_params()
4547 			    ring_size, bp->cp_ring_size);  in bnxt_set_ring_params()
4549 	bp->cp_bit = bp->cp_nr_pages * CP_DESC_CNT;  in bnxt_set_ring_params()
4550 	bp->cp_ring_mask = bp->cp_bit - 1;  in bnxt_set_ring_params()
4558 	struct net_device *dev = bp->dev;  in bnxt_set_rx_skb_mode()
4561 		bp->flags &= ~BNXT_FLAG_AGG_RINGS;  in bnxt_set_rx_skb_mode()
4562 		bp->flags |= BNXT_FLAG_RX_PAGE_MODE;  in bnxt_set_rx_skb_mode()
4564 		if (bp->xdp_prog->aux->xdp_has_frags)  in bnxt_set_rx_skb_mode()
4565 			dev->max_mtu = min_t(u16, bp->max_mtu, BNXT_MAX_MTU);  in bnxt_set_rx_skb_mode()
4567 			dev->max_mtu =  in bnxt_set_rx_skb_mode()
4568 				min_t(u16, bp->max_mtu, BNXT_MAX_PAGE_MODE_MTU);  in bnxt_set_rx_skb_mode()
4569 		if (dev->mtu > BNXT_MAX_PAGE_MODE_MTU) {  in bnxt_set_rx_skb_mode()
4570 			bp->flags |= BNXT_FLAG_JUMBO;  in bnxt_set_rx_skb_mode()
4571 			bp->rx_skb_func = bnxt_rx_multi_page_skb;  in bnxt_set_rx_skb_mode()
4573 			bp->flags |= BNXT_FLAG_NO_AGG_RINGS;  in bnxt_set_rx_skb_mode()
4574 			bp->rx_skb_func = bnxt_rx_page_skb;  in bnxt_set_rx_skb_mode()
4576 		bp->rx_dir = DMA_BIDIRECTIONAL;  in bnxt_set_rx_skb_mode()
4580 		dev->max_mtu = bp->max_mtu;  in bnxt_set_rx_skb_mode()
4581 		bp->flags &= ~BNXT_FLAG_RX_PAGE_MODE;  in bnxt_set_rx_skb_mode()
4582 		bp->rx_dir = DMA_FROM_DEVICE;  in bnxt_set_rx_skb_mode()
4583 		bp->rx_skb_func = bnxt_rx_skb;  in bnxt_set_rx_skb_mode()
4592 	struct pci_dev *pdev = bp->pdev;  in bnxt_free_vnic_attributes()
4594 	if (!bp->vnic_info)  in bnxt_free_vnic_attributes()
4597 	for (i = 0; i < bp->nr_vnics; i++) {  in bnxt_free_vnic_attributes()
4598 		vnic = &bp->vnic_info[i];  in bnxt_free_vnic_attributes()
4600 		kfree(vnic->fw_grp_ids);  in bnxt_free_vnic_attributes()
4601 		vnic->fw_grp_ids = NULL;  in bnxt_free_vnic_attributes()
4603 		kfree(vnic->uc_list);  in bnxt_free_vnic_attributes()
4604 		vnic->uc_list = NULL;  in bnxt_free_vnic_attributes()
4606 		if (vnic->mc_list) {  in bnxt_free_vnic_attributes()
4607 			dma_free_coherent(&pdev->dev, vnic->mc_list_size,  in bnxt_free_vnic_attributes()
4608 					  vnic->mc_list, vnic->mc_list_mapping);  in bnxt_free_vnic_attributes()
4609 			vnic->mc_list = NULL;  in bnxt_free_vnic_attributes()
4612 		if (vnic->rss_table) {  in bnxt_free_vnic_attributes()
4613 			dma_free_coherent(&pdev->dev, vnic->rss_table_size,  in bnxt_free_vnic_attributes()
4614 					  vnic->rss_table,  in bnxt_free_vnic_attributes()
4615 					  vnic->rss_table_dma_addr);  in bnxt_free_vnic_attributes()
4616 			vnic->rss_table = NULL;  in bnxt_free_vnic_attributes()
4619 		vnic->rss_hash_key = NULL;  in bnxt_free_vnic_attributes()
4620 		vnic->flags = 0;  in bnxt_free_vnic_attributes()
4628 	struct pci_dev *pdev = bp->pdev;  in bnxt_alloc_vnic_attributes()
4631 	for (i = 0; i < bp->nr_vnics; i++) {  in bnxt_alloc_vnic_attributes()
4632 		vnic = &bp->vnic_info[i];  in bnxt_alloc_vnic_attributes()
4634 		if (vnic->flags & BNXT_VNIC_UCAST_FLAG) {  in bnxt_alloc_vnic_attributes()
4635 			int mem_size = (BNXT_MAX_UC_ADDRS - 1) * ETH_ALEN;  in bnxt_alloc_vnic_attributes()
4638 				vnic->uc_list = kmalloc(mem_size, GFP_KERNEL);  in bnxt_alloc_vnic_attributes()
4639 				if (!vnic->uc_list) {  in bnxt_alloc_vnic_attributes()
4640 					rc = -ENOMEM;  in bnxt_alloc_vnic_attributes()
4646 		if (vnic->flags & BNXT_VNIC_MCAST_FLAG) {  in bnxt_alloc_vnic_attributes()
4647 			vnic->mc_list_size = BNXT_MAX_MC_ADDRS * ETH_ALEN;  in bnxt_alloc_vnic_attributes()
4648 			vnic->mc_list =  in bnxt_alloc_vnic_attributes()
4649 				dma_alloc_coherent(&pdev->dev,  in bnxt_alloc_vnic_attributes()
4650 						   vnic->mc_list_size,  in bnxt_alloc_vnic_attributes()
4651 						   &vnic->mc_list_mapping,  in bnxt_alloc_vnic_attributes()
4653 			if (!vnic->mc_list) {  in bnxt_alloc_vnic_attributes()
4654 				rc = -ENOMEM;  in bnxt_alloc_vnic_attributes()
4659 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_alloc_vnic_attributes()
4662 		if (vnic->flags & BNXT_VNIC_RSS_FLAG)  in bnxt_alloc_vnic_attributes()
4663 			max_rings = bp->rx_nr_rings;  in bnxt_alloc_vnic_attributes()
4667 		vnic->fw_grp_ids = kcalloc(max_rings, sizeof(u16), GFP_KERNEL);  in bnxt_alloc_vnic_attributes()
4668 		if (!vnic->fw_grp_ids) {  in bnxt_alloc_vnic_attributes()
4669 			rc = -ENOMEM;  in bnxt_alloc_vnic_attributes()
4673 		if ((bp->rss_cap & BNXT_RSS_CAP_NEW_RSS_CAP) &&  in bnxt_alloc_vnic_attributes()
4674 		    !(vnic->flags & BNXT_VNIC_RSS_FLAG))  in bnxt_alloc_vnic_attributes()
4679 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_alloc_vnic_attributes()
4682 		vnic->rss_table_size = size + HW_HASH_KEY_SIZE;  in bnxt_alloc_vnic_attributes()
4683 		vnic->rss_table = dma_alloc_coherent(&pdev->dev,  in bnxt_alloc_vnic_attributes()
4684 						     vnic->rss_table_size,  in bnxt_alloc_vnic_attributes()
4685 						     &vnic->rss_table_dma_addr,  in bnxt_alloc_vnic_attributes()
4687 		if (!vnic->rss_table) {  in bnxt_alloc_vnic_attributes()
4688 			rc = -ENOMEM;  in bnxt_alloc_vnic_attributes()
4692 		vnic->rss_hash_key = ((void *)vnic->rss_table) + size;  in bnxt_alloc_vnic_attributes()
4693 		vnic->rss_hash_key_dma_addr = vnic->rss_table_dma_addr + size;  in bnxt_alloc_vnic_attributes()
4705 	dma_pool_destroy(bp->hwrm_dma_pool);  in bnxt_free_hwrm_resources()
4706 	bp->hwrm_dma_pool = NULL;  in bnxt_free_hwrm_resources()
4709 	hlist_for_each_entry_rcu(token, &bp->hwrm_pending_list, node)  in bnxt_free_hwrm_resources()
4710 		WRITE_ONCE(token->state, BNXT_HWRM_CANCELLED);  in bnxt_free_hwrm_resources()
4716 	bp->hwrm_dma_pool = dma_pool_create("bnxt_hwrm", &bp->pdev->dev,  in bnxt_alloc_hwrm_resources()
4719 	if (!bp->hwrm_dma_pool)  in bnxt_alloc_hwrm_resources()
4720 		return -ENOMEM;  in bnxt_alloc_hwrm_resources()
4722 	INIT_HLIST_HEAD(&bp->hwrm_pending_list);  in bnxt_alloc_hwrm_resources()
4729 	kfree(stats->hw_masks);  in bnxt_free_stats_mem()
4730 	stats->hw_masks = NULL;  in bnxt_free_stats_mem()
4731 	kfree(stats->sw_stats);  in bnxt_free_stats_mem()
4732 	stats->sw_stats = NULL;  in bnxt_free_stats_mem()
4733 	if (stats->hw_stats) {  in bnxt_free_stats_mem()
4734 		dma_free_coherent(&bp->pdev->dev, stats->len, stats->hw_stats,  in bnxt_free_stats_mem()
4735 				  stats->hw_stats_map);  in bnxt_free_stats_mem()
4736 		stats->hw_stats = NULL;  in bnxt_free_stats_mem()
4743 	stats->hw_stats = dma_alloc_coherent(&bp->pdev->dev, stats->len,  in bnxt_alloc_stats_mem()
4744 					     &stats->hw_stats_map, GFP_KERNEL);  in bnxt_alloc_stats_mem()
4745 	if (!stats->hw_stats)  in bnxt_alloc_stats_mem()
4746 		return -ENOMEM;  in bnxt_alloc_stats_mem()
4748 	stats->sw_stats = kzalloc(stats->len, GFP_KERNEL);  in bnxt_alloc_stats_mem()
4749 	if (!stats->sw_stats)  in bnxt_alloc_stats_mem()
4753 		stats->hw_masks = kzalloc(stats->len, GFP_KERNEL);  in bnxt_alloc_stats_mem()
4754 		if (!stats->hw_masks)  in bnxt_alloc_stats_mem()
4761 	return -ENOMEM;  in bnxt_alloc_stats_mem()
4788 	if (!(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED) ||  in bnxt_hwrm_func_qstat_ext()
4789 	    !(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_hwrm_func_qstat_ext()
4790 		return -EOPNOTSUPP;  in bnxt_hwrm_func_qstat_ext()
4796 	req->fid = cpu_to_le16(0xffff);  in bnxt_hwrm_func_qstat_ext()
4797 	req->flags = FUNC_QSTATS_EXT_REQ_FLAGS_COUNTER_MASK;  in bnxt_hwrm_func_qstat_ext()
4802 		hw_masks = &resp->rx_ucast_pkts;  in bnxt_hwrm_func_qstat_ext()
4803 		bnxt_copy_hw_masks(stats->hw_masks, hw_masks, stats->len / 8);  in bnxt_hwrm_func_qstat_ext()
4814 	struct bnxt_napi *bnapi = bp->bnapi[0];  in bnxt_init_stats()
4823 	cpr = &bnapi->cp_ring;  in bnxt_init_stats()
4824 	stats = &cpr->stats;  in bnxt_init_stats()
4827 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_init_stats()
4828 			mask = (1ULL << 48) - 1;  in bnxt_init_stats()
4830 			mask = -1ULL;  in bnxt_init_stats()
4831 		bnxt_fill_masks(stats->hw_masks, mask, stats->len / 8);  in bnxt_init_stats()
4833 	if (bp->flags & BNXT_FLAG_PORT_STATS) {  in bnxt_init_stats()
4834 		stats = &bp->port_stats;  in bnxt_init_stats()
4835 		rx_stats = stats->hw_stats;  in bnxt_init_stats()
4836 		rx_masks = stats->hw_masks;  in bnxt_init_stats()
4845 			mask = (1ULL << 40) - 1;  in bnxt_init_stats()
4855 	if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {  in bnxt_init_stats()
4856 		stats = &bp->rx_port_stats_ext;  in bnxt_init_stats()
4857 		rx_stats = stats->hw_stats;  in bnxt_init_stats()
4858 		rx_masks = stats->hw_masks;  in bnxt_init_stats()
4860 		stats = &bp->tx_port_stats_ext;  in bnxt_init_stats()
4861 		tx_stats = stats->hw_stats;  in bnxt_init_stats()
4862 		tx_masks = stats->hw_masks;  in bnxt_init_stats()
4868 			mask = (1ULL << 40) - 1;  in bnxt_init_stats()
4885 	bp->flags &= ~BNXT_FLAG_PORT_STATS;  in bnxt_free_port_stats()
4886 	bp->flags &= ~BNXT_FLAG_PORT_STATS_EXT;  in bnxt_free_port_stats()
4888 	bnxt_free_stats_mem(bp, &bp->port_stats);  in bnxt_free_port_stats()
4889 	bnxt_free_stats_mem(bp, &bp->rx_port_stats_ext);  in bnxt_free_port_stats()
4890 	bnxt_free_stats_mem(bp, &bp->tx_port_stats_ext);  in bnxt_free_port_stats()
4897 	if (!bp->bnapi)  in bnxt_free_ring_stats()
4900 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_free_ring_stats()
4901 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_free_ring_stats()
4902 		struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_free_ring_stats()
4904 		bnxt_free_stats_mem(bp, &cpr->stats);  in bnxt_free_ring_stats()
4906 		kfree(cpr->sw_stats);  in bnxt_free_ring_stats()
4907 		cpr->sw_stats = NULL;  in bnxt_free_ring_stats()
4916 	size = bp->hw_ring_stats_size;  in bnxt_alloc_stats()
4918 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_alloc_stats()
4919 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_alloc_stats()
4920 		struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_alloc_stats()
4922 		cpr->sw_stats = kzalloc(sizeof(*cpr->sw_stats), GFP_KERNEL);  in bnxt_alloc_stats()
4923 		if (!cpr->sw_stats)  in bnxt_alloc_stats()
4924 			return -ENOMEM;  in bnxt_alloc_stats()
4926 		cpr->stats.len = size;  in bnxt_alloc_stats()
4927 		rc = bnxt_alloc_stats_mem(bp, &cpr->stats, !i);  in bnxt_alloc_stats()
4931 		cpr->hw_stats_ctx_id = INVALID_STATS_CTX_ID;  in bnxt_alloc_stats()
4934 	if (BNXT_VF(bp) || bp->chip_num == CHIP_NUM_58700)  in bnxt_alloc_stats()
4937 	if (bp->port_stats.hw_stats)  in bnxt_alloc_stats()
4940 	bp->port_stats.len = BNXT_PORT_STATS_SIZE;  in bnxt_alloc_stats()
4941 	rc = bnxt_alloc_stats_mem(bp, &bp->port_stats, true);  in bnxt_alloc_stats()
4945 	bp->flags |= BNXT_FLAG_PORT_STATS;  in bnxt_alloc_stats()
4949 	if (bp->hwrm_spec_code < 0x10804 || bp->hwrm_spec_code == 0x10900)  in bnxt_alloc_stats()
4950 		if (!(bp->fw_cap & BNXT_FW_CAP_EXT_STATS_SUPPORTED))  in bnxt_alloc_stats()
4953 	if (bp->rx_port_stats_ext.hw_stats)  in bnxt_alloc_stats()
4956 	bp->rx_port_stats_ext.len = sizeof(struct rx_port_stats_ext);  in bnxt_alloc_stats()
4957 	rc = bnxt_alloc_stats_mem(bp, &bp->rx_port_stats_ext, true);  in bnxt_alloc_stats()
4963 	if (bp->tx_port_stats_ext.hw_stats)  in bnxt_alloc_stats()
4966 	if (bp->hwrm_spec_code >= 0x10902 ||  in bnxt_alloc_stats()
4967 	    (bp->fw_cap & BNXT_FW_CAP_EXT_STATS_SUPPORTED)) {  in bnxt_alloc_stats()
4968 		bp->tx_port_stats_ext.len = sizeof(struct tx_port_stats_ext);  in bnxt_alloc_stats()
4969 		rc = bnxt_alloc_stats_mem(bp, &bp->tx_port_stats_ext, true);  in bnxt_alloc_stats()
4974 	bp->flags |= BNXT_FLAG_PORT_STATS_EXT;  in bnxt_alloc_stats()
4982 	if (!bp->bnapi)  in bnxt_clear_ring_indices()
4985 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_clear_ring_indices()
4986 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_clear_ring_indices()
4994 		cpr = &bnapi->cp_ring;  in bnxt_clear_ring_indices()
4995 		cpr->cp_raw_cons = 0;  in bnxt_clear_ring_indices()
4998 			txr->tx_prod = 0;  in bnxt_clear_ring_indices()
4999 			txr->tx_cons = 0;  in bnxt_clear_ring_indices()
5000 			txr->tx_hw_cons = 0;  in bnxt_clear_ring_indices()
5003 		rxr = bnapi->rx_ring;  in bnxt_clear_ring_indices()
5005 			rxr->rx_prod = 0;  in bnxt_clear_ring_indices()
5006 			rxr->rx_agg_prod = 0;  in bnxt_clear_ring_indices()
5007 			rxr->rx_sw_agg_prod = 0;  in bnxt_clear_ring_indices()
5008 			rxr->rx_next_cons = 0;  in bnxt_clear_ring_indices()
5010 		bnapi->events = 0;  in bnxt_clear_ring_indices()
5016 	u8 type = fltr->type, flags = fltr->flags;  in bnxt_insert_usr_fltr()
5018 	INIT_LIST_HEAD(&fltr->list);  in bnxt_insert_usr_fltr()
5021 		list_add_tail(&fltr->list, &bp->usr_fltr_list);  in bnxt_insert_usr_fltr()
5026 	if (!list_empty(&fltr->list))  in bnxt_del_one_usr_fltr()
5027 		list_del_init(&fltr->list);  in bnxt_del_one_usr_fltr()
5034 	list_for_each_entry_safe(usr_fltr, tmp, &bp->usr_fltr_list, list) {  in bnxt_clear_usr_fltrs()
5035 		if (!all && usr_fltr->type == BNXT_FLTR_TYPE_L2)  in bnxt_clear_usr_fltrs()
5043 	hlist_del(&fltr->hash);  in bnxt_del_fltr()
5045 	if (fltr->flags) {  in bnxt_del_fltr()
5046 		clear_bit(fltr->sw_id, bp->ntp_fltr_bmap);  in bnxt_del_fltr()
5047 		bp->ntp_fltr_count--;  in bnxt_del_fltr()
5064 		head = &bp->ntp_fltr_hash_tbl[i];  in bnxt_free_ntp_fltrs()
5066 			bnxt_del_l2_filter(bp, fltr->l2_fltr);  in bnxt_free_ntp_fltrs()
5067 			if (!all && ((fltr->base.flags & BNXT_ACT_FUNC_DST) ||  in bnxt_free_ntp_fltrs()
5068 				     !list_empty(&fltr->base.list)))  in bnxt_free_ntp_fltrs()
5070 			bnxt_del_fltr(bp, &fltr->base);  in bnxt_free_ntp_fltrs()
5076 	bitmap_free(bp->ntp_fltr_bmap);  in bnxt_free_ntp_fltrs()
5077 	bp->ntp_fltr_bmap = NULL;  in bnxt_free_ntp_fltrs()
5078 	bp->ntp_fltr_count = 0;  in bnxt_free_ntp_fltrs()
5085 	if (!(bp->flags & BNXT_FLAG_RFS) || bp->ntp_fltr_bmap)  in bnxt_alloc_ntp_fltrs()
5089 		INIT_HLIST_HEAD(&bp->ntp_fltr_hash_tbl[i]);  in bnxt_alloc_ntp_fltrs()
5091 	bp->ntp_fltr_count = 0;  in bnxt_alloc_ntp_fltrs()
5092 	bp->ntp_fltr_bmap = bitmap_zalloc(bp->max_fltr, GFP_KERNEL);  in bnxt_alloc_ntp_fltrs()
5094 	if (!bp->ntp_fltr_bmap)  in bnxt_alloc_ntp_fltrs()
5095 		rc = -ENOMEM;  in bnxt_alloc_ntp_fltrs()
5109 		head = &bp->l2_fltr_hash_tbl[i];  in bnxt_free_l2_filters()
5111 			if (!all && ((fltr->base.flags & BNXT_ACT_FUNC_DST) ||  in bnxt_free_l2_filters()
5112 				     !list_empty(&fltr->base.list)))  in bnxt_free_l2_filters()
5114 			bnxt_del_fltr(bp, &fltr->base);  in bnxt_free_l2_filters()
5124 		INIT_HLIST_HEAD(&bp->l2_fltr_hash_tbl[i]);  in bnxt_init_l2_fltr_tbl()
5125 	get_random_bytes(&bp->hash_seed, sizeof(bp->hash_seed));  in bnxt_init_l2_fltr_tbl()
5139 		if (!(bp->phy_flags & BNXT_PHY_FL_PORT_STATS_NO_RESET) ||  in bnxt_free_mem()
5140 		    test_bit(BNXT_STATE_IN_FW_RESET, &bp->state))  in bnxt_free_mem()
5144 		kfree(bp->tx_ring_map);  in bnxt_free_mem()
5145 		bp->tx_ring_map = NULL;  in bnxt_free_mem()
5146 		kfree(bp->tx_ring);  in bnxt_free_mem()
5147 		bp->tx_ring = NULL;  in bnxt_free_mem()
5148 		kfree(bp->rx_ring);  in bnxt_free_mem()
5149 		bp->rx_ring = NULL;  in bnxt_free_mem()
5150 		kfree(bp->bnapi);  in bnxt_free_mem()
5151 		bp->bnapi = NULL;  in bnxt_free_mem()
5167 				bp->cp_nr_rings);  in bnxt_alloc_mem()
5169 		bnapi = kzalloc(arr_size + size * bp->cp_nr_rings, GFP_KERNEL);  in bnxt_alloc_mem()
5171 			return -ENOMEM;  in bnxt_alloc_mem()
5173 		bp->bnapi = bnapi;  in bnxt_alloc_mem()
5175 		for (i = 0; i < bp->cp_nr_rings; i++, bnapi += size) {  in bnxt_alloc_mem()
5176 			bp->bnapi[i] = bnapi;  in bnxt_alloc_mem()
5177 			bp->bnapi[i]->index = i;  in bnxt_alloc_mem()
5178 			bp->bnapi[i]->bp = bp;  in bnxt_alloc_mem()
5179 			if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_alloc_mem()
5181 					&bp->bnapi[i]->cp_ring;  in bnxt_alloc_mem()
5183 				cpr->cp_ring_struct.ring_mem.flags =  in bnxt_alloc_mem()
5188 		bp->rx_ring = kcalloc(bp->rx_nr_rings,  in bnxt_alloc_mem()
5191 		if (!bp->rx_ring)  in bnxt_alloc_mem()
5192 			return -ENOMEM;  in bnxt_alloc_mem()
5194 		for (i = 0; i < bp->rx_nr_rings; i++) {  in bnxt_alloc_mem()
5195 			struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];  in bnxt_alloc_mem()
5197 			if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_alloc_mem()
5198 				rxr->rx_ring_struct.ring_mem.flags =  in bnxt_alloc_mem()
5200 				rxr->rx_agg_ring_struct.ring_mem.flags =  in bnxt_alloc_mem()
5203 				rxr->rx_cpr =  &bp->bnapi[i]->cp_ring;  in bnxt_alloc_mem()
5205 			rxr->bnapi = bp->bnapi[i];  in bnxt_alloc_mem()
5206 			bp->bnapi[i]->rx_ring = &bp->rx_ring[i];  in bnxt_alloc_mem()
5209 		bp->tx_ring = kcalloc(bp->tx_nr_rings,  in bnxt_alloc_mem()
5212 		if (!bp->tx_ring)  in bnxt_alloc_mem()
5213 			return -ENOMEM;  in bnxt_alloc_mem()
5215 		bp->tx_ring_map = kcalloc(bp->tx_nr_rings, sizeof(u16),  in bnxt_alloc_mem()
5218 		if (!bp->tx_ring_map)  in bnxt_alloc_mem()
5219 			return -ENOMEM;  in bnxt_alloc_mem()
5221 		if (bp->flags & BNXT_FLAG_SHARED_RINGS)  in bnxt_alloc_mem()
5224 			j = bp->rx_nr_rings;  in bnxt_alloc_mem()
5226 		for (i = 0; i < bp->tx_nr_rings; i++) {  in bnxt_alloc_mem()
5227 			struct bnxt_tx_ring_info *txr = &bp->tx_ring[i];  in bnxt_alloc_mem()
5230 			if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_alloc_mem()
5231 				txr->tx_ring_struct.ring_mem.flags =  in bnxt_alloc_mem()
5233 			bp->tx_ring_map[i] = bp->tx_nr_rings_xdp + i;  in bnxt_alloc_mem()
5234 			if (i >= bp->tx_nr_rings_xdp) {  in bnxt_alloc_mem()
5237 				bnapi2 = bp->bnapi[k];  in bnxt_alloc_mem()
5238 				txr->txq_index = i - bp->tx_nr_rings_xdp;  in bnxt_alloc_mem()
5239 				txr->tx_napi_idx =  in bnxt_alloc_mem()
5240 					BNXT_RING_TO_TC(bp, txr->txq_index);  in bnxt_alloc_mem()
5241 				bnapi2->tx_ring[txr->tx_napi_idx] = txr;  in bnxt_alloc_mem()
5242 				bnapi2->tx_int = bnxt_tx_int;  in bnxt_alloc_mem()
5244 				bnapi2 = bp->bnapi[j];  in bnxt_alloc_mem()
5245 				bnapi2->flags |= BNXT_NAPI_FLAG_XDP;  in bnxt_alloc_mem()
5246 				bnapi2->tx_ring[0] = txr;  in bnxt_alloc_mem()
5247 				bnapi2->tx_int = bnxt_tx_int_xdp;  in bnxt_alloc_mem()
5250 			txr->bnapi = bnapi2;  in bnxt_alloc_mem()
5251 			if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_alloc_mem()
5252 				txr->tx_cpr = &bnapi2->cp_ring;  in bnxt_alloc_mem()
5287 	bp->vnic_info[BNXT_VNIC_DEFAULT].flags |= BNXT_VNIC_RSS_FLAG |  in bnxt_alloc_mem()
5290 	if (BNXT_SUPPORTS_NTUPLE_VNIC(bp) && (bp->flags & BNXT_FLAG_RFS))  in bnxt_alloc_mem()
5291 		bp->vnic_info[BNXT_VNIC_NTUPLE].flags |=  in bnxt_alloc_mem()
5308 	if (!bp->bnapi)  in bnxt_disable_int()
5311 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_disable_int()
5312 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_disable_int()
5313 		struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_disable_int()
5314 		struct bnxt_ring_struct *ring = &cpr->cp_ring_struct;  in bnxt_disable_int()
5316 		if (ring->fw_ring_id != INVALID_HW_RING_ID)  in bnxt_disable_int()
5317 			bnxt_db_nq(bp, &cpr->cp_db, cpr->cp_raw_cons);  in bnxt_disable_int()
5323 	struct bnxt_napi *bnapi = bp->bnapi[n];  in bnxt_cp_num_to_irq_num()
5326 	cpr = &bnapi->cp_ring;  in bnxt_cp_num_to_irq_num()
5327 	return cpr->cp_ring_struct.map_idx;  in bnxt_cp_num_to_irq_num()
5334 	if (!bp->irq_tbl)  in bnxt_disable_int_sync()
5337 	atomic_inc(&bp->intr_sem);  in bnxt_disable_int_sync()
5340 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_disable_int_sync()
5343 		synchronize_irq(bp->irq_tbl[map_idx].vector);  in bnxt_disable_int_sync()
5351 	atomic_set(&bp->intr_sem, 0);  in bnxt_enable_int()
5352 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_enable_int()
5353 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_enable_int()
5354 		struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_enable_int()
5356 		bnxt_db_nq_arm(bp, &cpr->cp_db, cpr->cp_raw_cons);  in bnxt_enable_int()
5374 	req->enables = cpu_to_le32(FUNC_DRV_RGTR_REQ_ENABLES_OS_TYPE |  in bnxt_hwrm_func_drv_rgtr()
5378 	req->os_type = cpu_to_le16(FUNC_DRV_RGTR_REQ_OS_TYPE_LINUX);  in bnxt_hwrm_func_drv_rgtr()
5380 	if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET)  in bnxt_hwrm_func_drv_rgtr()
5382 	if (bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY)  in bnxt_hwrm_func_drv_rgtr()
5385 	req->flags = cpu_to_le32(flags);  in bnxt_hwrm_func_drv_rgtr()
5386 	req->ver_maj_8b = DRV_VER_MAJ;  in bnxt_hwrm_func_drv_rgtr()
5387 	req->ver_min_8b = DRV_VER_MIN;  in bnxt_hwrm_func_drv_rgtr()
5388 	req->ver_upd_8b = DRV_VER_UPD;  in bnxt_hwrm_func_drv_rgtr()
5389 	req->ver_maj = cpu_to_le16(DRV_VER_MAJ);  in bnxt_hwrm_func_drv_rgtr()
5390 	req->ver_min = cpu_to_le16(DRV_VER_MIN);  in bnxt_hwrm_func_drv_rgtr()
5391 	req->ver_upd = cpu_to_le16(DRV_VER_UPD);  in bnxt_hwrm_func_drv_rgtr()
5408 			req->vf_req_fwd[i] = cpu_to_le32(data[i]);  in bnxt_hwrm_func_drv_rgtr()
5410 		req->enables |=  in bnxt_hwrm_func_drv_rgtr()
5414 	if (bp->fw_cap & BNXT_FW_CAP_OVS_64BIT_HANDLE)  in bnxt_hwrm_func_drv_rgtr()
5415 		req->flags |= cpu_to_le32(  in bnxt_hwrm_func_drv_rgtr()
5423 		    !(bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY))  in bnxt_hwrm_func_drv_rgtr()
5426 		    !bp->ptp_cfg)  in bnxt_hwrm_func_drv_rgtr()
5437 		req->async_event_fwd[i] |= cpu_to_le32(events[i]);  in bnxt_hwrm_func_drv_rgtr()
5440 		req->enables =  in bnxt_hwrm_func_drv_rgtr()
5446 		set_bit(BNXT_STATE_DRV_REGISTERED, &bp->state);  in bnxt_hwrm_func_drv_rgtr()
5447 		if (resp->flags &  in bnxt_hwrm_func_drv_rgtr()
5449 			bp->fw_cap |= BNXT_FW_CAP_IF_CHANGE;  in bnxt_hwrm_func_drv_rgtr()
5460 	if (!test_and_clear_bit(BNXT_STATE_DRV_REGISTERED, &bp->state))  in bnxt_hwrm_func_drv_unrgtr()
5477 	    bp->vxlan_fw_dst_port_id == INVALID_HW_RING_ID)  in bnxt_hwrm_tunnel_dst_port_free()
5480 	    bp->nge_fw_dst_port_id == INVALID_HW_RING_ID)  in bnxt_hwrm_tunnel_dst_port_free()
5487 	req->tunnel_type = tunnel_type;  in bnxt_hwrm_tunnel_dst_port_free()
5491 		req->tunnel_dst_port_id = cpu_to_le16(bp->vxlan_fw_dst_port_id);  in bnxt_hwrm_tunnel_dst_port_free()
5492 		bp->vxlan_port = 0;  in bnxt_hwrm_tunnel_dst_port_free()
5493 		bp->vxlan_fw_dst_port_id = INVALID_HW_RING_ID;  in bnxt_hwrm_tunnel_dst_port_free()
5496 		req->tunnel_dst_port_id = cpu_to_le16(bp->nge_fw_dst_port_id);  in bnxt_hwrm_tunnel_dst_port_free()
5497 		bp->nge_port = 0;  in bnxt_hwrm_tunnel_dst_port_free()
5498 		bp->nge_fw_dst_port_id = INVALID_HW_RING_ID;  in bnxt_hwrm_tunnel_dst_port_free()
5501 		req->tunnel_dst_port_id = cpu_to_le16(bp->vxlan_gpe_fw_dst_port_id);  in bnxt_hwrm_tunnel_dst_port_free()
5502 		bp->vxlan_gpe_port = 0;  in bnxt_hwrm_tunnel_dst_port_free()
5503 		bp->vxlan_gpe_fw_dst_port_id = INVALID_HW_RING_ID;  in bnxt_hwrm_tunnel_dst_port_free()
5511 		netdev_err(bp->dev, "hwrm_tunnel_dst_port_free failed. rc:%d\n",  in bnxt_hwrm_tunnel_dst_port_free()
5513 	if (bp->flags & BNXT_FLAG_TPA)  in bnxt_hwrm_tunnel_dst_port_free()
5529 	req->tunnel_type = tunnel_type;  in bnxt_hwrm_tunnel_dst_port_alloc()
5530 	req->tunnel_dst_port_val = port;  in bnxt_hwrm_tunnel_dst_port_alloc()
5535 		netdev_err(bp->dev, "hwrm_tunnel_dst_port_alloc failed. rc:%d\n",  in bnxt_hwrm_tunnel_dst_port_alloc()
5542 		bp->vxlan_port = port;  in bnxt_hwrm_tunnel_dst_port_alloc()
5543 		bp->vxlan_fw_dst_port_id =  in bnxt_hwrm_tunnel_dst_port_alloc()
5544 			le16_to_cpu(resp->tunnel_dst_port_id);  in bnxt_hwrm_tunnel_dst_port_alloc()
5547 		bp->nge_port = port;  in bnxt_hwrm_tunnel_dst_port_alloc()
5548 		bp->nge_fw_dst_port_id = le16_to_cpu(resp->tunnel_dst_port_id);  in bnxt_hwrm_tunnel_dst_port_alloc()
5551 		bp->vxlan_gpe_port = port;  in bnxt_hwrm_tunnel_dst_port_alloc()
5552 		bp->vxlan_gpe_fw_dst_port_id =  in bnxt_hwrm_tunnel_dst_port_alloc()
5553 			le16_to_cpu(resp->tunnel_dst_port_id);  in bnxt_hwrm_tunnel_dst_port_alloc()
5558 	if (bp->flags & BNXT_FLAG_TPA)  in bnxt_hwrm_tunnel_dst_port_alloc()
5569 	struct bnxt_vnic_info *vnic = &bp->vnic_info[vnic_id];  in bnxt_hwrm_cfa_l2_set_rx_mask()
5576 	req->vnic_id = cpu_to_le32(vnic->fw_vnic_id);  in bnxt_hwrm_cfa_l2_set_rx_mask()
5577 	if (vnic->rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_MCAST) {  in bnxt_hwrm_cfa_l2_set_rx_mask()
5578 		req->num_mc_entries = cpu_to_le32(vnic->mc_list_count);  in bnxt_hwrm_cfa_l2_set_rx_mask()
5579 		req->mc_tbl_addr = cpu_to_le64(vnic->mc_list_mapping);  in bnxt_hwrm_cfa_l2_set_rx_mask()
5581 	req->mask = cpu_to_le32(vnic->rx_mask);  in bnxt_hwrm_cfa_l2_set_rx_mask()
5587 	if (!atomic_dec_and_test(&fltr->refcnt))  in bnxt_del_l2_filter()
5589 	spin_lock_bh(&bp->ntp_fltr_lock);  in bnxt_del_l2_filter()
5590 	if (!test_and_clear_bit(BNXT_FLTR_INSERTED, &fltr->base.state)) {  in bnxt_del_l2_filter()
5591 		spin_unlock_bh(&bp->ntp_fltr_lock);  in bnxt_del_l2_filter()
5594 	hlist_del_rcu(&fltr->base.hash);  in bnxt_del_l2_filter()
5595 	bnxt_del_one_usr_fltr(bp, &fltr->base);  in bnxt_del_l2_filter()
5596 	if (fltr->base.flags) {  in bnxt_del_l2_filter()
5597 		clear_bit(fltr->base.sw_id, bp->ntp_fltr_bmap);  in bnxt_del_l2_filter()
5598 		bp->ntp_fltr_count--;  in bnxt_del_l2_filter()
5600 	spin_unlock_bh(&bp->ntp_fltr_lock);  in bnxt_del_l2_filter()
5608 	struct hlist_head *head = &bp->l2_fltr_hash_tbl[idx];  in __bnxt_lookup_l2_filter()
5612 		struct bnxt_l2_key *l2_key = &fltr->l2_key;  in __bnxt_lookup_l2_filter()
5614 		if (ether_addr_equal(l2_key->dst_mac_addr, key->dst_mac_addr) &&  in __bnxt_lookup_l2_filter()
5615 		    l2_key->vlan == key->vlan)  in __bnxt_lookup_l2_filter()
5630 		atomic_inc(&fltr->refcnt);  in bnxt_lookup_l2_filter()
5636 	(((fkeys)->basic.ip_proto == IPPROTO_TCP &&			\
5637 	  (bp)->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) ||	\
5638 	 ((fkeys)->basic.ip_proto == IPPROTO_UDP &&			\
5639 	  (bp)->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4))
5642 	(((fkeys)->basic.ip_proto == IPPROTO_TCP &&			\
5643 	  (bp)->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) ||	\
5644 	 ((fkeys)->basic.ip_proto == IPPROTO_UDP &&			\
5645 	  (bp)->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6))
5649 	if (fkeys->basic.n_proto == htons(ETH_P_IP)) {  in bnxt_get_rss_flow_tuple_len()
5651 			return sizeof(fkeys->addrs.v4addrs) +  in bnxt_get_rss_flow_tuple_len()
5652 			       sizeof(fkeys->ports);  in bnxt_get_rss_flow_tuple_len()
5654 		if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)  in bnxt_get_rss_flow_tuple_len()
5655 			return sizeof(fkeys->addrs.v4addrs);  in bnxt_get_rss_flow_tuple_len()
5658 	if (fkeys->basic.n_proto == htons(ETH_P_IPV6)) {  in bnxt_get_rss_flow_tuple_len()
5660 			return sizeof(fkeys->addrs.v6addrs) +  in bnxt_get_rss_flow_tuple_len()
5661 			       sizeof(fkeys->ports);  in bnxt_get_rss_flow_tuple_len()
5663 		if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)  in bnxt_get_rss_flow_tuple_len()
5664 			return sizeof(fkeys->addrs.v6addrs);  in bnxt_get_rss_flow_tuple_len()
5673 	u64 prefix = bp->toeplitz_prefix, hash = 0;  in bnxt_toeplitz()
5683 	if (fkeys->basic.n_proto == htons(ETH_P_IP)) {  in bnxt_toeplitz()
5684 		tuple4.v4addrs = fkeys->addrs.v4addrs;  in bnxt_toeplitz()
5685 		tuple4.ports = fkeys->ports;  in bnxt_toeplitz()
5688 		tuple6.v6addrs = fkeys->addrs.v6addrs;  in bnxt_toeplitz()
5689 		tuple6.ports = fkeys->ports;  in bnxt_toeplitz()
5715 	idx = jhash2(&key->filter_key, BNXT_L2_KEY_SIZE, bp->hash_seed) &  in bnxt_lookup_l2_filter_from_key()
5727 	ether_addr_copy(fltr->l2_key.dst_mac_addr, key->dst_mac_addr);  in bnxt_init_l2_filter()
5728 	fltr->l2_key.vlan = key->vlan;  in bnxt_init_l2_filter()
5729 	fltr->base.type = BNXT_FLTR_TYPE_L2;  in bnxt_init_l2_filter()
5730 	if (fltr->base.flags) {  in bnxt_init_l2_filter()
5733 		bit_id = bitmap_find_free_region(bp->ntp_fltr_bmap,  in bnxt_init_l2_filter()
5734 						 bp->max_fltr, 0);  in bnxt_init_l2_filter()
5736 			return -ENOMEM;  in bnxt_init_l2_filter()
5737 		fltr->base.sw_id = (u16)bit_id;  in bnxt_init_l2_filter()
5738 		bp->ntp_fltr_count++;  in bnxt_init_l2_filter()
5740 	head = &bp->l2_fltr_hash_tbl[idx];  in bnxt_init_l2_filter()
5741 	hlist_add_head_rcu(&fltr->base.hash, head);  in bnxt_init_l2_filter()
5742 	bnxt_insert_usr_fltr(bp, &fltr->base);  in bnxt_init_l2_filter()
5743 	set_bit(BNXT_FLTR_INSERTED, &fltr->base.state);  in bnxt_init_l2_filter()
5744 	atomic_set(&fltr->refcnt, 1);  in bnxt_init_l2_filter()
5756 	idx = jhash2(&key->filter_key, BNXT_L2_KEY_SIZE, bp->hash_seed) &  in bnxt_alloc_l2_filter()
5764 		return ERR_PTR(-ENOMEM);  in bnxt_alloc_l2_filter()
5765 	spin_lock_bh(&bp->ntp_fltr_lock);  in bnxt_alloc_l2_filter()
5767 	spin_unlock_bh(&bp->ntp_fltr_lock);  in bnxt_alloc_l2_filter()
5783 	idx = jhash2(&key->filter_key, BNXT_L2_KEY_SIZE, bp->hash_seed) &  in bnxt_alloc_new_l2_filter()
5785 	spin_lock_bh(&bp->ntp_fltr_lock);  in bnxt_alloc_new_l2_filter()
5788 		fltr = ERR_PTR(-EEXIST);  in bnxt_alloc_new_l2_filter()
5793 		fltr = ERR_PTR(-ENOMEM);  in bnxt_alloc_new_l2_filter()
5796 	fltr->base.flags = flags;  in bnxt_alloc_new_l2_filter()
5799 		spin_unlock_bh(&bp->ntp_fltr_lock);  in bnxt_alloc_new_l2_filter()
5805 	spin_unlock_bh(&bp->ntp_fltr_lock);  in bnxt_alloc_new_l2_filter()
5812 	struct bnxt_vf_info *vf = &pf->vf[vf_idx];  in bnxt_vf_target_id()
5814 	return vf->fw_fid;  in bnxt_vf_target_id()
5826 	if (fltr->base.flags & BNXT_ACT_FUNC_DST) {  in bnxt_hwrm_l2_filter_free()
5827 		struct bnxt_pf_info *pf = &bp->pf;  in bnxt_hwrm_l2_filter_free()
5829 		if (fltr->base.vf_idx >= pf->active_vfs)  in bnxt_hwrm_l2_filter_free()
5830 			return -EINVAL;  in bnxt_hwrm_l2_filter_free()
5832 		target_id = bnxt_vf_target_id(pf, fltr->base.vf_idx);  in bnxt_hwrm_l2_filter_free()
5834 			return -EINVAL;  in bnxt_hwrm_l2_filter_free()
5841 	req->target_id = cpu_to_le16(target_id);  in bnxt_hwrm_l2_filter_free()
5842 	req->l2_filter_id = fltr->base.filter_id;  in bnxt_hwrm_l2_filter_free()
5853 	if (fltr->base.flags & BNXT_ACT_FUNC_DST) {  in bnxt_hwrm_l2_filter_alloc()
5854 		struct bnxt_pf_info *pf = &bp->pf;  in bnxt_hwrm_l2_filter_alloc()
5856 		if (fltr->base.vf_idx >= pf->active_vfs)  in bnxt_hwrm_l2_filter_alloc()
5857 			return -EINVAL;  in bnxt_hwrm_l2_filter_alloc()
5859 		target_id = bnxt_vf_target_id(pf, fltr->base.vf_idx);  in bnxt_hwrm_l2_filter_alloc()
5865 	req->target_id = cpu_to_le16(target_id);  in bnxt_hwrm_l2_filter_alloc()
5866 	req->flags = cpu_to_le32(CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_RX);  in bnxt_hwrm_l2_filter_alloc()
5869 		req->flags |=  in bnxt_hwrm_l2_filter_alloc()
5871 	req->dst_id = cpu_to_le16(fltr->base.fw_vnic_id);  in bnxt_hwrm_l2_filter_alloc()
5872 	req->enables =  in bnxt_hwrm_l2_filter_alloc()
5876 	ether_addr_copy(req->l2_addr, fltr->l2_key.dst_mac_addr);  in bnxt_hwrm_l2_filter_alloc()
5877 	eth_broadcast_addr(req->l2_addr_mask);  in bnxt_hwrm_l2_filter_alloc()
5879 	if (fltr->l2_key.vlan) {  in bnxt_hwrm_l2_filter_alloc()
5880 		req->enables |=  in bnxt_hwrm_l2_filter_alloc()
5884 		req->num_vlans = 1;  in bnxt_hwrm_l2_filter_alloc()
5885 		req->l2_ivlan = cpu_to_le16(fltr->l2_key.vlan);  in bnxt_hwrm_l2_filter_alloc()
5886 		req->l2_ivlan_mask = cpu_to_le16(0xfff);  in bnxt_hwrm_l2_filter_alloc()
5892 		fltr->base.filter_id = resp->l2_filter_id;  in bnxt_hwrm_l2_filter_alloc()
5893 		set_bit(BNXT_FLTR_VALID, &fltr->base.state);  in bnxt_hwrm_l2_filter_alloc()
5905 	set_bit(BNXT_FLTR_FW_DELETED, &fltr->base.state);  in bnxt_hwrm_cfa_ntuple_filter_free()
5910 	req->ntuple_filter_id = fltr->base.filter_id;  in bnxt_hwrm_cfa_ntuple_filter_free()
5945 	u16 rxq = fltr->base.rxq;  in bnxt_cfg_rfs_ring_tbl_idx()
5947 	if (fltr->base.flags & BNXT_ACT_RSS_CTX) {  in bnxt_cfg_rfs_ring_tbl_idx()
5952 		ctx = xa_load(&bp->dev->ethtool->rss_ctx,  in bnxt_cfg_rfs_ring_tbl_idx()
5953 			      fltr->base.fw_vnic_id);  in bnxt_cfg_rfs_ring_tbl_idx()
5956 			vnic = &rss_ctx->vnic;  in bnxt_cfg_rfs_ring_tbl_idx()
5958 			req->dst_id = cpu_to_le16(vnic->fw_vnic_id);  in bnxt_cfg_rfs_ring_tbl_idx()
5966 		vnic = &bp->vnic_info[BNXT_VNIC_NTUPLE];  in bnxt_cfg_rfs_ring_tbl_idx()
5967 		req->dst_id = cpu_to_le16(vnic->fw_vnic_id);  in bnxt_cfg_rfs_ring_tbl_idx()
5969 		req->enables |= cpu_to_le32(enables);  in bnxt_cfg_rfs_ring_tbl_idx()
5970 		req->rfs_ring_tbl_idx = cpu_to_le16(rxq);  in bnxt_cfg_rfs_ring_tbl_idx()
5975 		req->flags |= cpu_to_le32(flags);  in bnxt_cfg_rfs_ring_tbl_idx()
5976 		req->dst_id = cpu_to_le16(rxq);  in bnxt_cfg_rfs_ring_tbl_idx()
5985 	struct bnxt_flow_masks *masks = &fltr->fmasks;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
5986 	struct flow_keys *keys = &fltr->fkeys;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
5995 	l2_fltr = fltr->l2_fltr;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
5996 	req->l2_filter_id = l2_fltr->base.filter_id;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
5998 	if (fltr->base.flags & BNXT_ACT_DROP) {  in bnxt_hwrm_cfa_ntuple_filter_alloc()
5999 		req->flags =  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6001 	} else if (bp->fw_cap & BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V2) {  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6004 		vnic = &bp->vnic_info[fltr->base.rxq + 1];  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6005 		req->dst_id = cpu_to_le16(vnic->fw_vnic_id);  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6007 	req->enables |= cpu_to_le32(BNXT_NTP_FLTR_FLAGS);  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6009 	req->ethertype = htons(ETH_P_IP);  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6010 	req->ip_addr_type = CFA_NTUPLE_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV4;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6011 	req->ip_protocol = keys->basic.ip_proto;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6013 	if (keys->basic.n_proto == htons(ETH_P_IPV6)) {  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6014 		req->ethertype = htons(ETH_P_IPV6);  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6015 		req->ip_addr_type =  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6017 		*(struct in6_addr *)&req->src_ipaddr[0] = keys->addrs.v6addrs.src;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6018 		*(struct in6_addr *)&req->src_ipaddr_mask[0] = masks->addrs.v6addrs.src;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6019 		*(struct in6_addr *)&req->dst_ipaddr[0] = keys->addrs.v6addrs.dst;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6020 		*(struct in6_addr *)&req->dst_ipaddr_mask[0] = masks->addrs.v6addrs.dst;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6022 		req->src_ipaddr[0] = keys->addrs.v4addrs.src;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6023 		req->src_ipaddr_mask[0] = masks->addrs.v4addrs.src;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6024 		req->dst_ipaddr[0] = keys->addrs.v4addrs.dst;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6025 		req->dst_ipaddr_mask[0] = masks->addrs.v4addrs.dst;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6027 	if (keys->control.flags & FLOW_DIS_ENCAPSULATION) {  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6028 		req->enables |= cpu_to_le32(BNXT_NTP_TUNNEL_FLTR_FLAG);  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6029 		req->tunnel_type =  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6033 	req->src_port = keys->ports.src;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6034 	req->src_port_mask = masks->ports.src;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6035 	req->dst_port = keys->ports.dst;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6036 	req->dst_port_mask = masks->ports.dst;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6041 		fltr->base.filter_id = resp->ntuple_filter_id;  in bnxt_hwrm_cfa_ntuple_filter_alloc()
6059 	fltr->base.fw_vnic_id = bp->vnic_info[vnic_id].fw_vnic_id;  in bnxt_hwrm_set_vnic_filter()
6064 		bp->vnic_info[vnic_id].l2_filters[idx] = fltr;  in bnxt_hwrm_set_vnic_filter()
6074 		struct bnxt_vnic_info *vnic = &bp->vnic_info[i];  in bnxt_hwrm_clear_vnic_filter()
6076 		for (j = 0; j < vnic->uc_filter_count; j++) {  in bnxt_hwrm_clear_vnic_filter()
6077 			struct bnxt_l2_filter *fltr = vnic->l2_filters[j];  in bnxt_hwrm_clear_vnic_filter()
6082 		vnic->uc_filter_count = 0;  in bnxt_hwrm_clear_vnic_filter()
6096 	if (!(bp->fw_cap & BNXT_FW_CAP_VNIC_TUNNEL_TPA))  in bnxt_hwrm_vnic_update_tunl_tpa()
6099 	if (bp->vxlan_port)  in bnxt_hwrm_vnic_update_tunl_tpa()
6101 	if (bp->vxlan_gpe_port)  in bnxt_hwrm_vnic_update_tunl_tpa()
6103 	if (bp->nge_port)  in bnxt_hwrm_vnic_update_tunl_tpa()
6106 	req->enables |= cpu_to_le32(VNIC_TPA_CFG_REQ_ENABLES_TNL_TPA_EN);  in bnxt_hwrm_vnic_update_tunl_tpa()
6107 	req->tnl_tpa_en_bitmap = cpu_to_le32(tunl_tpa_bmap);  in bnxt_hwrm_vnic_update_tunl_tpa()
6117 	if (vnic->fw_vnic_id == INVALID_HW_RING_ID)  in bnxt_hwrm_vnic_set_tpa()
6125 		u16 mss = bp->dev->mtu - 40;  in bnxt_hwrm_vnic_set_tpa()
6136 		req->flags = cpu_to_le32(flags);  in bnxt_hwrm_vnic_set_tpa()
6138 		req->enables =  in bnxt_hwrm_vnic_set_tpa()
6148 			nsegs = (MAX_SKB_FRAGS - 1) * n;  in bnxt_hwrm_vnic_set_tpa()
6151 			if (mss & (BNXT_RX_PAGE_SIZE - 1))  in bnxt_hwrm_vnic_set_tpa()
6153 			nsegs = (MAX_SKB_FRAGS - n) / n;  in bnxt_hwrm_vnic_set_tpa()
6156 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_hwrm_vnic_set_tpa()
6158 			max_aggs = bp->max_tpa;  in bnxt_hwrm_vnic_set_tpa()
6162 		req->max_agg_segs = cpu_to_le16(segs);  in bnxt_hwrm_vnic_set_tpa()
6163 		req->max_aggs = cpu_to_le16(max_aggs);  in bnxt_hwrm_vnic_set_tpa()
6165 		req->min_agg_len = cpu_to_le32(512);  in bnxt_hwrm_vnic_set_tpa()
6168 	req->vnic_id = cpu_to_le16(vnic->fw_vnic_id);  in bnxt_hwrm_vnic_set_tpa()
6177 	grp_info = &bp->grp_info[ring->grp_idx];  in bnxt_cp_ring_from_grp()
6178 	return grp_info->cp_fw_ring_id;  in bnxt_cp_ring_from_grp()
6183 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_cp_ring_for_rx()
6184 		return rxr->rx_cpr->cp_ring_struct.fw_ring_id;  in bnxt_cp_ring_for_rx()
6186 		return bnxt_cp_ring_from_grp(bp, &rxr->rx_ring_struct);  in bnxt_cp_ring_for_rx()
6191 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_cp_ring_for_tx()
6192 		return txr->tx_cpr->cp_ring_struct.fw_ring_id;  in bnxt_cp_ring_for_tx()
6194 		return bnxt_cp_ring_from_grp(bp, &txr->tx_ring_struct);  in bnxt_cp_ring_for_tx()
6201 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_alloc_rss_indir_tbl()
6206 	bp->rss_indir_tbl_entries = entries;  in bnxt_alloc_rss_indir_tbl()
6207 	bp->rss_indir_tbl =  in bnxt_alloc_rss_indir_tbl()
6208 		kmalloc_array(entries, sizeof(*bp->rss_indir_tbl), GFP_KERNEL);  in bnxt_alloc_rss_indir_tbl()
6209 	if (!bp->rss_indir_tbl)  in bnxt_alloc_rss_indir_tbl()
6210 		return -ENOMEM;  in bnxt_alloc_rss_indir_tbl()
6221 	if (!bp->rx_nr_rings)  in bnxt_set_dflt_rss_indir_tbl()
6225 		max_rings = bp->rx_nr_rings - 1;  in bnxt_set_dflt_rss_indir_tbl()
6227 		max_rings = bp->rx_nr_rings;  in bnxt_set_dflt_rss_indir_tbl()
6229 	max_entries = bnxt_get_rxfh_indir_size(bp->dev);  in bnxt_set_dflt_rss_indir_tbl()
6233 		rss_indir_tbl = &bp->rss_indir_tbl[0];  in bnxt_set_dflt_rss_indir_tbl()
6238 	pad = bp->rss_indir_tbl_entries - max_entries;  in bnxt_set_dflt_rss_indir_tbl()
6247 	if (!bp->rss_indir_tbl)  in bnxt_get_max_rss_ring()
6250 	tbl_size = bnxt_get_rxfh_indir_size(bp->dev);  in bnxt_get_max_rss_ring()
6252 		max_ring = max(max_ring, bp->rss_indir_tbl[i]);  in bnxt_get_max_rss_ring()
6258 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_get_nr_rss_ctxs()
6261 		return bnxt_calc_nr_ring_pages(rx_rings - 1,  in bnxt_get_nr_rss_ctxs()
6271 	bool no_rss = !(vnic->flags & BNXT_VNIC_RSS_FLAG);  in bnxt_fill_hw_rss_tbl()
6277 			j = bp->rss_indir_tbl[i];  in bnxt_fill_hw_rss_tbl()
6278 		vnic->rss_table[i] = cpu_to_le16(vnic->fw_grp_ids[j]);  in bnxt_fill_hw_rss_tbl()
6285 	__le16 *ring_tbl = vnic->rss_table;  in bnxt_fill_hw_rss_tbl_p5()
6289 	tbl_size = bnxt_get_rxfh_indir_size(bp->dev);  in bnxt_fill_hw_rss_tbl_p5()
6294 		if (vnic->flags & BNXT_VNIC_NTUPLE_FLAG)  in bnxt_fill_hw_rss_tbl_p5()
6295 			j = ethtool_rxfh_indir_default(i, bp->rx_nr_rings);  in bnxt_fill_hw_rss_tbl_p5()
6296 		else if (vnic->flags & BNXT_VNIC_RSSCTX_FLAG)  in bnxt_fill_hw_rss_tbl_p5()
6297 			j = ethtool_rxfh_context_indir(vnic->rss_ctx)[i];  in bnxt_fill_hw_rss_tbl_p5()
6299 			j = bp->rss_indir_tbl[i];  in bnxt_fill_hw_rss_tbl_p5()
6300 		rxr = &bp->rx_ring[j];  in bnxt_fill_hw_rss_tbl_p5()
6302 		ring_id = rxr->rx_ring_struct.fw_ring_id;  in bnxt_fill_hw_rss_tbl_p5()
6313 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in __bnxt_hwrm_vnic_set_rss()
6315 		if (bp->flags & BNXT_FLAG_CHIP_P7)  in __bnxt_hwrm_vnic_set_rss()
6316 			req->flags |= VNIC_RSS_CFG_REQ_FLAGS_IPSEC_HASH_TYPE_CFG_SUPPORT;  in __bnxt_hwrm_vnic_set_rss()
6321 	if (bp->rss_hash_delta) {  in __bnxt_hwrm_vnic_set_rss()
6322 		req->hash_type = cpu_to_le32(bp->rss_hash_delta);  in __bnxt_hwrm_vnic_set_rss()
6323 		if (bp->rss_hash_cfg & bp->rss_hash_delta)  in __bnxt_hwrm_vnic_set_rss()
6324 			req->flags |= VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_INCLUDE;  in __bnxt_hwrm_vnic_set_rss()
6326 			req->flags |= VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_EXCLUDE;  in __bnxt_hwrm_vnic_set_rss()
6328 		req->hash_type = cpu_to_le32(bp->rss_hash_cfg);  in __bnxt_hwrm_vnic_set_rss()
6330 	req->hash_mode_flags = VNIC_RSS_CFG_REQ_HASH_MODE_FLAGS_DEFAULT;  in __bnxt_hwrm_vnic_set_rss()
6331 	req->ring_grp_tbl_addr = cpu_to_le64(vnic->rss_table_dma_addr);  in __bnxt_hwrm_vnic_set_rss()
6332 	req->hash_key_tbl_addr = cpu_to_le64(vnic->rss_hash_key_dma_addr);  in __bnxt_hwrm_vnic_set_rss()
6341 	if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) ||  in bnxt_hwrm_vnic_set_rss()
6342 	    vnic->fw_rss_cos_lb_ctx[0] == INVALID_HW_RING_ID)  in bnxt_hwrm_vnic_set_rss()
6351 	req->rss_ctx_idx = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[0]);  in bnxt_hwrm_vnic_set_rss()
6367 	req->vnic_id = cpu_to_le16(vnic->fw_vnic_id);  in bnxt_hwrm_vnic_set_rss_p5()
6372 	ring_tbl_map = vnic->rss_table_dma_addr;  in bnxt_hwrm_vnic_set_rss_p5()
6373 	nr_ctxs = bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings);  in bnxt_hwrm_vnic_set_rss_p5()
6377 		req->ring_grp_tbl_addr = cpu_to_le64(ring_tbl_map);  in bnxt_hwrm_vnic_set_rss_p5()
6378 		req->ring_table_pair_index = i;  in bnxt_hwrm_vnic_set_rss_p5()
6379 		req->rss_ctx_idx = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[i]);  in bnxt_hwrm_vnic_set_rss_p5()
6392 	struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT];  in bnxt_hwrm_update_rss_hash_cfg()
6399 	req->vnic_id = cpu_to_le16(vnic->fw_vnic_id);  in bnxt_hwrm_update_rss_hash_cfg()
6401 	req->rss_ctx_idx = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[0]);  in bnxt_hwrm_update_rss_hash_cfg()
6404 		bp->rss_hash_cfg = le32_to_cpu(resp->hash_type) ?: bp->rss_hash_cfg;  in bnxt_hwrm_update_rss_hash_cfg()
6405 		bp->rss_hash_delta = 0;  in bnxt_hwrm_update_rss_hash_cfg()
6419 	req->flags = cpu_to_le32(VNIC_PLCMODES_CFG_REQ_FLAGS_JUMBO_PLACEMENT);  in bnxt_hwrm_vnic_set_hds()
6420 	req->enables = cpu_to_le32(VNIC_PLCMODES_CFG_REQ_ENABLES_JUMBO_THRESH_VALID);  in bnxt_hwrm_vnic_set_hds()
6423 		req->jumbo_thresh = cpu_to_le16(bp->rx_buf_use_size);  in bnxt_hwrm_vnic_set_hds()
6425 		req->flags |= cpu_to_le32(VNIC_PLCMODES_CFG_REQ_FLAGS_HDS_IPV4 |  in bnxt_hwrm_vnic_set_hds()
6427 		req->enables |=  in bnxt_hwrm_vnic_set_hds()
6429 		req->jumbo_thresh = cpu_to_le16(bp->rx_copy_thresh);  in bnxt_hwrm_vnic_set_hds()
6430 		req->hds_threshold = cpu_to_le16(bp->rx_copy_thresh);  in bnxt_hwrm_vnic_set_hds()
6432 	req->vnic_id = cpu_to_le32(vnic->fw_vnic_id);  in bnxt_hwrm_vnic_set_hds()
6445 	req->rss_cos_lb_ctx_id =  in bnxt_hwrm_vnic_ctx_free_one()
6446 		cpu_to_le16(vnic->fw_rss_cos_lb_ctx[ctx_idx]);  in bnxt_hwrm_vnic_ctx_free_one()
6449 	vnic->fw_rss_cos_lb_ctx[ctx_idx] = INVALID_HW_RING_ID;  in bnxt_hwrm_vnic_ctx_free_one()
6456 	for (i = 0; i < bp->nr_vnics; i++) {  in bnxt_hwrm_vnic_ctx_free()
6457 		struct bnxt_vnic_info *vnic = &bp->vnic_info[i];  in bnxt_hwrm_vnic_ctx_free()
6460 			if (vnic->fw_rss_cos_lb_ctx[j] != INVALID_HW_RING_ID)  in bnxt_hwrm_vnic_ctx_free()
6464 	bp->rsscos_nr_ctxs = 0;  in bnxt_hwrm_vnic_ctx_free()
6481 		vnic->fw_rss_cos_lb_ctx[ctx_idx] =  in bnxt_hwrm_vnic_ctx_alloc()
6482 			le16_to_cpu(resp->rss_cos_lb_ctx_id);  in bnxt_hwrm_vnic_ctx_alloc()
6490 	if (bp->flags & BNXT_FLAG_ROCE_MIRROR_CAP)  in bnxt_get_roce_vnic_mode()
6497 	struct bnxt_vnic_info *vnic0 = &bp->vnic_info[BNXT_VNIC_DEFAULT];  in bnxt_hwrm_vnic_cfg()
6507 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_hwrm_vnic_cfg()
6508 		struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0];  in bnxt_hwrm_vnic_cfg()
6510 		req->default_rx_ring_id =  in bnxt_hwrm_vnic_cfg()
6511 			cpu_to_le16(rxr->rx_ring_struct.fw_ring_id);  in bnxt_hwrm_vnic_cfg()
6512 		req->default_cmpl_ring_id =  in bnxt_hwrm_vnic_cfg()
6514 		req->enables =  in bnxt_hwrm_vnic_cfg()
6519 	req->enables = cpu_to_le32(VNIC_CFG_REQ_ENABLES_DFLT_RING_GRP);  in bnxt_hwrm_vnic_cfg()
6521 	if (vnic->fw_rss_cos_lb_ctx[0] != INVALID_HW_RING_ID) {  in bnxt_hwrm_vnic_cfg()
6522 		req->rss_rule = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[0]);  in bnxt_hwrm_vnic_cfg()
6523 		req->enables |= cpu_to_le32(VNIC_CFG_REQ_ENABLES_RSS_RULE |  in bnxt_hwrm_vnic_cfg()
6525 	} else if (vnic->flags & BNXT_VNIC_RFS_NEW_RSS_FLAG) {  in bnxt_hwrm_vnic_cfg()
6526 		req->rss_rule = cpu_to_le16(vnic0->fw_rss_cos_lb_ctx[0]);  in bnxt_hwrm_vnic_cfg()
6527 		req->enables |= cpu_to_le32(VNIC_CFG_REQ_ENABLES_RSS_RULE |  in bnxt_hwrm_vnic_cfg()
6529 		req->flags |= cpu_to_le32(VNIC_CFG_REQ_FLAGS_RSS_DFLT_CR_MODE);  in bnxt_hwrm_vnic_cfg()
6531 		req->rss_rule = cpu_to_le16(0xffff);  in bnxt_hwrm_vnic_cfg()
6535 	    (vnic->fw_rss_cos_lb_ctx[0] != INVALID_HW_RING_ID)) {  in bnxt_hwrm_vnic_cfg()
6536 		req->cos_rule = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[1]);  in bnxt_hwrm_vnic_cfg()
6537 		req->enables |= cpu_to_le32(VNIC_CFG_REQ_ENABLES_COS_RULE);  in bnxt_hwrm_vnic_cfg()
6539 		req->cos_rule = cpu_to_le16(0xffff);  in bnxt_hwrm_vnic_cfg()
6542 	if (vnic->flags & BNXT_VNIC_RSS_FLAG)  in bnxt_hwrm_vnic_cfg()
6544 	else if (vnic->flags & BNXT_VNIC_RFS_FLAG)  in bnxt_hwrm_vnic_cfg()
6545 		ring = vnic->vnic_id - 1;  in bnxt_hwrm_vnic_cfg()
6546 	else if ((vnic->vnic_id == 1) && BNXT_CHIP_TYPE_NITRO_A0(bp))  in bnxt_hwrm_vnic_cfg()
6547 		ring = bp->rx_nr_rings - 1;  in bnxt_hwrm_vnic_cfg()
6549 	grp_idx = bp->rx_ring[ring].bnapi->index;  in bnxt_hwrm_vnic_cfg()
6550 	req->dflt_ring_grp = cpu_to_le16(bp->grp_info[grp_idx].fw_grp_id);  in bnxt_hwrm_vnic_cfg()
6551 	req->lb_rule = cpu_to_le16(0xffff);  in bnxt_hwrm_vnic_cfg()
6553 	vnic->mru = bp->dev->mtu + ETH_HLEN + VLAN_HLEN;  in bnxt_hwrm_vnic_cfg()
6554 	req->mru = cpu_to_le16(vnic->mru);  in bnxt_hwrm_vnic_cfg()
6556 	req->vnic_id = cpu_to_le16(vnic->fw_vnic_id);  in bnxt_hwrm_vnic_cfg()
6559 		def_vlan = bp->vf.vlan;  in bnxt_hwrm_vnic_cfg()
6561 	if ((bp->flags & BNXT_FLAG_STRIP_VLAN) || def_vlan)  in bnxt_hwrm_vnic_cfg()
6562 		req->flags |= cpu_to_le32(VNIC_CFG_REQ_FLAGS_VLAN_STRIP_MODE);  in bnxt_hwrm_vnic_cfg()
6563 	if (vnic->vnic_id == BNXT_VNIC_DEFAULT && bnxt_ulp_registered(bp->edev))  in bnxt_hwrm_vnic_cfg()
6564 		req->flags |= cpu_to_le32(bnxt_get_roce_vnic_mode(bp));  in bnxt_hwrm_vnic_cfg()
6572 	if (vnic->fw_vnic_id != INVALID_HW_RING_ID) {  in bnxt_hwrm_vnic_free_one()
6578 		req->vnic_id = cpu_to_le32(vnic->fw_vnic_id);  in bnxt_hwrm_vnic_free_one()
6581 		vnic->fw_vnic_id = INVALID_HW_RING_ID;  in bnxt_hwrm_vnic_free_one()
6589 	for (i = 0; i < bp->nr_vnics; i++)  in bnxt_hwrm_vnic_free()
6590 		bnxt_hwrm_vnic_free_one(bp, &bp->vnic_info[i]);  in bnxt_hwrm_vnic_free()
6606 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_hwrm_vnic_alloc()
6611 		grp_idx = bp->rx_ring[i].bnapi->index;  in bnxt_hwrm_vnic_alloc()
6612 		if (bp->grp_info[grp_idx].fw_grp_id == INVALID_HW_RING_ID) {  in bnxt_hwrm_vnic_alloc()
6613 			netdev_err(bp->dev, "Not enough ring groups avail:%x req:%x\n",  in bnxt_hwrm_vnic_alloc()
6617 		vnic->fw_grp_ids[j] = bp->grp_info[grp_idx].fw_grp_id;  in bnxt_hwrm_vnic_alloc()
6622 		vnic->fw_rss_cos_lb_ctx[i] = INVALID_HW_RING_ID;  in bnxt_hwrm_vnic_alloc()
6623 	if (vnic->vnic_id == BNXT_VNIC_DEFAULT)  in bnxt_hwrm_vnic_alloc()
6624 		req->flags = cpu_to_le32(VNIC_ALLOC_REQ_FLAGS_DEFAULT);  in bnxt_hwrm_vnic_alloc()
6629 		vnic->fw_vnic_id = le32_to_cpu(resp->vnic_id);  in bnxt_hwrm_vnic_alloc()
6640 	bp->hw_ring_stats_size = sizeof(struct ctx_hw_stats);  in bnxt_hwrm_vnic_qcaps()
6641 	bp->flags &= ~BNXT_FLAG_ROCE_MIRROR_CAP;  in bnxt_hwrm_vnic_qcaps()
6642 	bp->rss_cap &= ~BNXT_RSS_CAP_NEW_RSS_CAP;  in bnxt_hwrm_vnic_qcaps()
6643 	if (bp->hwrm_spec_code < 0x10600)  in bnxt_hwrm_vnic_qcaps()
6653 		u32 flags = le32_to_cpu(resp->flags);  in bnxt_hwrm_vnic_qcaps()
6655 		if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS) &&  in bnxt_hwrm_vnic_qcaps()
6657 			bp->rss_cap |= BNXT_RSS_CAP_NEW_RSS_CAP;  in bnxt_hwrm_vnic_qcaps()
6660 			bp->flags |= BNXT_FLAG_ROCE_MIRROR_CAP;  in bnxt_hwrm_vnic_qcaps()
6667 		     !(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED)))  in bnxt_hwrm_vnic_qcaps()
6668 			bp->fw_cap |= BNXT_FW_CAP_VLAN_RX_STRIP;  in bnxt_hwrm_vnic_qcaps()
6670 			bp->rss_cap |= BNXT_RSS_CAP_RSS_HASH_TYPE_DELTA;  in bnxt_hwrm_vnic_qcaps()
6672 			bp->rss_cap |= BNXT_RSS_CAP_RSS_TCAM;  in bnxt_hwrm_vnic_qcaps()
6673 		bp->max_tpa_v2 = le16_to_cpu(resp->max_aggs_supported);  in bnxt_hwrm_vnic_qcaps()
6674 		if (bp->max_tpa_v2) {  in bnxt_hwrm_vnic_qcaps()
6676 				bp->hw_ring_stats_size = BNXT_RING_STATS_SIZE_P5;  in bnxt_hwrm_vnic_qcaps()
6678 				bp->hw_ring_stats_size = BNXT_RING_STATS_SIZE_P7;  in bnxt_hwrm_vnic_qcaps()
6681 			bp->fw_cap |= BNXT_FW_CAP_VNIC_TUNNEL_TPA;  in bnxt_hwrm_vnic_qcaps()
6683 			bp->rss_cap |= BNXT_RSS_CAP_AH_V4_RSS_CAP;  in bnxt_hwrm_vnic_qcaps()
6685 			bp->rss_cap |= BNXT_RSS_CAP_AH_V6_RSS_CAP;  in bnxt_hwrm_vnic_qcaps()
6687 			bp->rss_cap |= BNXT_RSS_CAP_ESP_V4_RSS_CAP;  in bnxt_hwrm_vnic_qcaps()
6689 			bp->rss_cap |= BNXT_RSS_CAP_ESP_V6_RSS_CAP;  in bnxt_hwrm_vnic_qcaps()
6691 			bp->fw_cap |= BNXT_FW_CAP_VNIC_RE_FLUSH;  in bnxt_hwrm_vnic_qcaps()
6704 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_hwrm_ring_grp_alloc()
6712 	for (i = 0; i < bp->rx_nr_rings; i++) {  in bnxt_hwrm_ring_grp_alloc()
6713 		unsigned int grp_idx = bp->rx_ring[i].bnapi->index;  in bnxt_hwrm_ring_grp_alloc()
6715 		req->cr = cpu_to_le16(bp->grp_info[grp_idx].cp_fw_ring_id);  in bnxt_hwrm_ring_grp_alloc()
6716 		req->rr = cpu_to_le16(bp->grp_info[grp_idx].rx_fw_ring_id);  in bnxt_hwrm_ring_grp_alloc()
6717 		req->ar = cpu_to_le16(bp->grp_info[grp_idx].agg_fw_ring_id);  in bnxt_hwrm_ring_grp_alloc()
6718 		req->sc = cpu_to_le16(bp->grp_info[grp_idx].fw_stats_ctx);  in bnxt_hwrm_ring_grp_alloc()
6725 		bp->grp_info[grp_idx].fw_grp_id =  in bnxt_hwrm_ring_grp_alloc()
6726 			le32_to_cpu(resp->ring_group_id);  in bnxt_hwrm_ring_grp_alloc()
6737 	if (!bp->grp_info || (bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_hwrm_ring_grp_free()
6744 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_hwrm_ring_grp_free()
6745 		if (bp->grp_info[i].fw_grp_id == INVALID_HW_RING_ID)  in bnxt_hwrm_ring_grp_free()
6747 		req->ring_group_id =  in bnxt_hwrm_ring_grp_free()
6748 			cpu_to_le32(bp->grp_info[i].fw_grp_id);  in bnxt_hwrm_ring_grp_free()
6751 		bp->grp_info[i].fw_grp_id = INVALID_HW_RING_ID;  in bnxt_hwrm_ring_grp_free()
6762 	struct bnxt_ring_mem_info *rmem = &ring->ring_mem;  in hwrm_ring_alloc_send_msg()
6771 	req->enables = 0;  in hwrm_ring_alloc_send_msg()
6772 	if (rmem->nr_pages > 1) {  in hwrm_ring_alloc_send_msg()
6773 		req->page_tbl_addr = cpu_to_le64(rmem->pg_tbl_map);  in hwrm_ring_alloc_send_msg()
6775 		req->page_size = BNXT_PAGE_SHIFT;  in hwrm_ring_alloc_send_msg()
6776 		req->page_tbl_depth = 1;  in hwrm_ring_alloc_send_msg()
6778 		req->page_tbl_addr =  cpu_to_le64(rmem->dma_arr[0]);  in hwrm_ring_alloc_send_msg()
6780 	req->fbo = 0;  in hwrm_ring_alloc_send_msg()
6782 	req->logical_id = cpu_to_le16(map_index);  in hwrm_ring_alloc_send_msg()
6791 		req->ring_type = RING_ALLOC_REQ_RING_TYPE_TX;  in hwrm_ring_alloc_send_msg()
6793 		grp_info = &bp->grp_info[ring->grp_idx];  in hwrm_ring_alloc_send_msg()
6794 		req->cmpl_ring_id = cpu_to_le16(bnxt_cp_ring_for_tx(bp, txr));  in hwrm_ring_alloc_send_msg()
6795 		req->length = cpu_to_le32(bp->tx_ring_mask + 1);  in hwrm_ring_alloc_send_msg()
6796 		req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx);  in hwrm_ring_alloc_send_msg()
6797 		req->queue_id = cpu_to_le16(ring->queue_id);  in hwrm_ring_alloc_send_msg()
6798 		if (bp->flags & BNXT_FLAG_TX_COAL_CMPL)  in hwrm_ring_alloc_send_msg()
6799 			req->cmpl_coal_cnt =  in hwrm_ring_alloc_send_msg()
6801 		if ((bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP) && bp->ptp_cfg)  in hwrm_ring_alloc_send_msg()
6803 		req->flags = cpu_to_le16(flags);  in hwrm_ring_alloc_send_msg()
6807 		req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX;  in hwrm_ring_alloc_send_msg()
6808 		req->length = cpu_to_le32(bp->rx_ring_mask + 1);  in hwrm_ring_alloc_send_msg()
6809 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in hwrm_ring_alloc_send_msg()
6813 			grp_info = &bp->grp_info[ring->grp_idx];  in hwrm_ring_alloc_send_msg()
6814 			req->rx_buf_size = cpu_to_le16(bp->rx_buf_use_size);  in hwrm_ring_alloc_send_msg()
6815 			req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx);  in hwrm_ring_alloc_send_msg()
6816 			req->enables |= cpu_to_le32(  in hwrm_ring_alloc_send_msg()
6820 			req->flags = cpu_to_le16(flags);  in hwrm_ring_alloc_send_msg()
6824 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in hwrm_ring_alloc_send_msg()
6825 			req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX_AGG;  in hwrm_ring_alloc_send_msg()
6827 			grp_info = &bp->grp_info[ring->grp_idx];  in hwrm_ring_alloc_send_msg()
6828 			req->rx_ring_id = cpu_to_le16(grp_info->rx_fw_ring_id);  in hwrm_ring_alloc_send_msg()
6829 			req->rx_buf_size = cpu_to_le16(BNXT_RX_PAGE_SIZE);  in hwrm_ring_alloc_send_msg()
6830 			req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx);  in hwrm_ring_alloc_send_msg()
6831 			req->enables |= cpu_to_le32(  in hwrm_ring_alloc_send_msg()
6835 			req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX;  in hwrm_ring_alloc_send_msg()
6837 		req->length = cpu_to_le32(bp->rx_agg_ring_mask + 1);  in hwrm_ring_alloc_send_msg()
6840 		req->ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;  in hwrm_ring_alloc_send_msg()
6841 		req->length = cpu_to_le32(bp->cp_ring_mask + 1);  in hwrm_ring_alloc_send_msg()
6842 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in hwrm_ring_alloc_send_msg()
6844 			grp_info = &bp->grp_info[map_index];  in hwrm_ring_alloc_send_msg()
6845 			req->nq_ring_id = cpu_to_le16(grp_info->cp_fw_ring_id);  in hwrm_ring_alloc_send_msg()
6846 			req->cq_handle = cpu_to_le64(ring->handle);  in hwrm_ring_alloc_send_msg()
6847 			req->enables |= cpu_to_le32(  in hwrm_ring_alloc_send_msg()
6850 			req->int_mode = RING_ALLOC_REQ_INT_MODE_MSIX;  in hwrm_ring_alloc_send_msg()
6854 		req->ring_type = RING_ALLOC_REQ_RING_TYPE_NQ;  in hwrm_ring_alloc_send_msg()
6855 		req->length = cpu_to_le32(bp->cp_ring_mask + 1);  in hwrm_ring_alloc_send_msg()
6856 		req->int_mode = RING_ALLOC_REQ_INT_MODE_MSIX;  in hwrm_ring_alloc_send_msg()
6859 		netdev_err(bp->dev, "hwrm alloc invalid ring type %d\n",  in hwrm_ring_alloc_send_msg()
6861 		return -1;  in hwrm_ring_alloc_send_msg()
6866 	err = le16_to_cpu(resp->error_code);  in hwrm_ring_alloc_send_msg()
6867 	ring_id = le16_to_cpu(resp->ring_id);  in hwrm_ring_alloc_send_msg()
6872 		netdev_err(bp->dev, "hwrm_ring_alloc type %d failed. rc:%x err:%x\n",  in hwrm_ring_alloc_send_msg()
6874 		return -EIO;  in hwrm_ring_alloc_send_msg()
6876 	ring->fw_ring_id = ring_id;  in hwrm_ring_alloc_send_msg()
6891 		req->fid = cpu_to_le16(0xffff);  in bnxt_hwrm_set_async_event_cr()
6892 		req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_ASYNC_EVENT_CR);  in bnxt_hwrm_set_async_event_cr()
6893 		req->async_event_cr = cpu_to_le16(idx);  in bnxt_hwrm_set_async_event_cr()
6902 		req->enables =  in bnxt_hwrm_set_async_event_cr()
6904 		req->async_event_cr = cpu_to_le16(idx);  in bnxt_hwrm_set_async_event_cr()
6914 		db->db_ring_mask = bp->tx_ring_mask;  in bnxt_set_db_mask()
6917 		db->db_ring_mask = bp->rx_ring_mask;  in bnxt_set_db_mask()
6920 		db->db_ring_mask = bp->rx_agg_ring_mask;  in bnxt_set_db_mask()
6924 		db->db_ring_mask = bp->cp_ring_mask;  in bnxt_set_db_mask()
6927 	if (bp->flags & BNXT_FLAG_CHIP_P7) {  in bnxt_set_db_mask()
6928 		db->db_epoch_mask = db->db_ring_mask + 1;  in bnxt_set_db_mask()
6929 		db->db_epoch_shift = DBR_EPOCH_SFT - ilog2(db->db_epoch_mask);  in bnxt_set_db_mask()
6936 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_set_db()
6939 			db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ;  in bnxt_set_db()
6943 			db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SRQ;  in bnxt_set_db()
6946 			db->db_key64 = DBR_PATH_L2;  in bnxt_set_db()
6949 			db->db_key64 = DBR_PATH_L2;  in bnxt_set_db()
6952 		db->db_key64 |= (u64)xid << DBR_XID_SFT;  in bnxt_set_db()
6954 		if (bp->flags & BNXT_FLAG_CHIP_P7)  in bnxt_set_db()
6955 			db->db_key64 |= DBR_VALID;  in bnxt_set_db()
6957 		db->doorbell = bp->bar1 + bp->db_offset;  in bnxt_set_db()
6959 		db->doorbell = bp->bar1 + map_idx * 0x80;  in bnxt_set_db()
6962 			db->db_key32 = DB_KEY_TX;  in bnxt_set_db()
6966 			db->db_key32 = DB_KEY_RX;  in bnxt_set_db()
6969 			db->db_key32 = DB_KEY_CP;  in bnxt_set_db()
6979 	struct bnxt_ring_struct *ring = &rxr->rx_ring_struct;  in bnxt_hwrm_rx_ring_alloc()
6980 	struct bnxt_napi *bnapi = rxr->bnapi;  in bnxt_hwrm_rx_ring_alloc()
6982 	u32 map_idx = bnapi->index;  in bnxt_hwrm_rx_ring_alloc()
6989 	bnxt_set_db(bp, &rxr->rx_db, type, map_idx, ring->fw_ring_id);  in bnxt_hwrm_rx_ring_alloc()
6990 	bp->grp_info[map_idx].rx_fw_ring_id = ring->fw_ring_id;  in bnxt_hwrm_rx_ring_alloc()
6998 	struct bnxt_ring_struct *ring = &rxr->rx_agg_ring_struct;  in bnxt_hwrm_rx_agg_ring_alloc()
7000 	u32 grp_idx = ring->grp_idx;  in bnxt_hwrm_rx_agg_ring_alloc()
7004 	map_idx = grp_idx + bp->rx_nr_rings;  in bnxt_hwrm_rx_agg_ring_alloc()
7009 	bnxt_set_db(bp, &rxr->rx_agg_db, type, map_idx,  in bnxt_hwrm_rx_agg_ring_alloc()
7010 		    ring->fw_ring_id);  in bnxt_hwrm_rx_agg_ring_alloc()
7011 	bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod);  in bnxt_hwrm_rx_agg_ring_alloc()
7012 	bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod);  in bnxt_hwrm_rx_agg_ring_alloc()
7013 	bp->grp_info[grp_idx].agg_fw_ring_id = ring->fw_ring_id;  in bnxt_hwrm_rx_agg_ring_alloc()
7020 	bool agg_rings = !!(bp->flags & BNXT_FLAG_AGG_RINGS);  in bnxt_hwrm_ring_alloc()
7024 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_hwrm_ring_alloc()
7028 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_hwrm_ring_alloc()
7029 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_hwrm_ring_alloc()
7030 		struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_hwrm_ring_alloc()
7031 		struct bnxt_ring_struct *ring = &cpr->cp_ring_struct;  in bnxt_hwrm_ring_alloc()
7032 		u32 map_idx = ring->map_idx;  in bnxt_hwrm_ring_alloc()
7035 		vector = bp->irq_tbl[map_idx].vector;  in bnxt_hwrm_ring_alloc()
7042 		bnxt_set_db(bp, &cpr->cp_db, type, map_idx, ring->fw_ring_id);  in bnxt_hwrm_ring_alloc()
7043 		bnxt_db_nq(bp, &cpr->cp_db, cpr->cp_raw_cons);  in bnxt_hwrm_ring_alloc()
7045 		bp->grp_info[i].cp_fw_ring_id = ring->fw_ring_id;  in bnxt_hwrm_ring_alloc()
7048 			rc = bnxt_hwrm_set_async_event_cr(bp, ring->fw_ring_id);  in bnxt_hwrm_ring_alloc()
7050 				netdev_warn(bp->dev, "Failed to set async event completion ring.\n");  in bnxt_hwrm_ring_alloc()
7055 	for (i = 0; i < bp->tx_nr_rings; i++) {  in bnxt_hwrm_ring_alloc()
7056 		struct bnxt_tx_ring_info *txr = &bp->tx_ring[i];  in bnxt_hwrm_ring_alloc()
7060 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_hwrm_ring_alloc()
7061 			struct bnxt_cp_ring_info *cpr2 = txr->tx_cpr;  in bnxt_hwrm_ring_alloc()
7062 			struct bnxt_napi *bnapi = txr->bnapi;  in bnxt_hwrm_ring_alloc()
7065 			ring = &cpr2->cp_ring_struct;  in bnxt_hwrm_ring_alloc()
7066 			ring->handle = BNXT_SET_NQ_HDL(cpr2);  in bnxt_hwrm_ring_alloc()
7067 			map_idx = bnapi->index;  in bnxt_hwrm_ring_alloc()
7071 			bnxt_set_db(bp, &cpr2->cp_db, type2, map_idx,  in bnxt_hwrm_ring_alloc()
7072 				    ring->fw_ring_id);  in bnxt_hwrm_ring_alloc()
7073 			bnxt_db_cq(bp, &cpr2->cp_db, cpr2->cp_raw_cons);  in bnxt_hwrm_ring_alloc()
7075 		ring = &txr->tx_ring_struct;  in bnxt_hwrm_ring_alloc()
7080 		bnxt_set_db(bp, &txr->tx_db, type, map_idx, ring->fw_ring_id);  in bnxt_hwrm_ring_alloc()
7083 	for (i = 0; i < bp->rx_nr_rings; i++) {  in bnxt_hwrm_ring_alloc()
7084 		struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];  in bnxt_hwrm_ring_alloc()
7091 			bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod);  in bnxt_hwrm_ring_alloc()
7092 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_hwrm_ring_alloc()
7093 			struct bnxt_cp_ring_info *cpr2 = rxr->rx_cpr;  in bnxt_hwrm_ring_alloc()
7094 			struct bnxt_napi *bnapi = rxr->bnapi;  in bnxt_hwrm_ring_alloc()
7097 			u32 map_idx = bnapi->index;  in bnxt_hwrm_ring_alloc()
7099 			ring = &cpr2->cp_ring_struct;  in bnxt_hwrm_ring_alloc()
7100 			ring->handle = BNXT_SET_NQ_HDL(cpr2);  in bnxt_hwrm_ring_alloc()
7104 			bnxt_set_db(bp, &cpr2->cp_db, type2, map_idx,  in bnxt_hwrm_ring_alloc()
7105 				    ring->fw_ring_id);  in bnxt_hwrm_ring_alloc()
7106 			bnxt_db_cq(bp, &cpr2->cp_db, cpr2->cp_raw_cons);  in bnxt_hwrm_ring_alloc()
7111 		for (i = 0; i < bp->rx_nr_rings; i++) {  in bnxt_hwrm_ring_alloc()
7112 			rc = bnxt_hwrm_rx_agg_ring_alloc(bp, &bp->rx_ring[i]);  in bnxt_hwrm_ring_alloc()
7137 	req->cmpl_ring = cpu_to_le16(cmpl_ring_id);  in hwrm_ring_free_send_msg()
7138 	req->ring_type = ring_type;  in hwrm_ring_free_send_msg()
7139 	req->ring_id = cpu_to_le16(ring->fw_ring_id);  in hwrm_ring_free_send_msg()
7143 	error_code = le16_to_cpu(resp->error_code);  in hwrm_ring_free_send_msg()
7147 		netdev_err(bp->dev, "hwrm_ring_free type %d failed. rc:%x err:%x\n",  in hwrm_ring_free_send_msg()
7149 		return -EIO;  in hwrm_ring_free_send_msg()
7158 	struct bnxt_ring_struct *ring = &rxr->rx_ring_struct;  in bnxt_hwrm_rx_ring_free()
7159 	u32 grp_idx = rxr->bnapi->index;  in bnxt_hwrm_rx_ring_free()
7162 	if (ring->fw_ring_id == INVALID_HW_RING_ID)  in bnxt_hwrm_rx_ring_free()
7170 	ring->fw_ring_id = INVALID_HW_RING_ID;  in bnxt_hwrm_rx_ring_free()
7171 	bp->grp_info[grp_idx].rx_fw_ring_id = INVALID_HW_RING_ID;  in bnxt_hwrm_rx_ring_free()
7178 	struct bnxt_ring_struct *ring = &rxr->rx_agg_ring_struct;  in bnxt_hwrm_rx_agg_ring_free()
7179 	u32 grp_idx = rxr->bnapi->index;  in bnxt_hwrm_rx_agg_ring_free()
7182 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_hwrm_rx_agg_ring_free()
7187 	if (ring->fw_ring_id == INVALID_HW_RING_ID)  in bnxt_hwrm_rx_agg_ring_free()
7194 	ring->fw_ring_id = INVALID_HW_RING_ID;  in bnxt_hwrm_rx_agg_ring_free()
7195 	bp->grp_info[grp_idx].agg_fw_ring_id = INVALID_HW_RING_ID;  in bnxt_hwrm_rx_agg_ring_free()
7203 	if (!bp->bnapi)  in bnxt_hwrm_ring_free()
7206 	for (i = 0; i < bp->tx_nr_rings; i++) {  in bnxt_hwrm_ring_free()
7207 		struct bnxt_tx_ring_info *txr = &bp->tx_ring[i];  in bnxt_hwrm_ring_free()
7208 		struct bnxt_ring_struct *ring = &txr->tx_ring_struct;  in bnxt_hwrm_ring_free()
7210 		if (ring->fw_ring_id != INVALID_HW_RING_ID) {  in bnxt_hwrm_ring_free()
7217 			ring->fw_ring_id = INVALID_HW_RING_ID;  in bnxt_hwrm_ring_free()
7221 	for (i = 0; i < bp->rx_nr_rings; i++) {  in bnxt_hwrm_ring_free()
7222 		bnxt_hwrm_rx_ring_free(bp, &bp->rx_ring[i], close_path);  in bnxt_hwrm_ring_free()
7223 		bnxt_hwrm_rx_agg_ring_free(bp, &bp->rx_ring[i], close_path);  in bnxt_hwrm_ring_free()
7232 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_hwrm_ring_free()
7236 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_hwrm_ring_free()
7237 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_hwrm_ring_free()
7238 		struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_hwrm_ring_free()
7242 		for (j = 0; j < cpr->cp_ring_count && cpr->cp_ring_arr; j++) {  in bnxt_hwrm_ring_free()
7243 			struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[j];  in bnxt_hwrm_ring_free()
7245 			ring = &cpr2->cp_ring_struct;  in bnxt_hwrm_ring_free()
7246 			if (ring->fw_ring_id == INVALID_HW_RING_ID)  in bnxt_hwrm_ring_free()
7251 			ring->fw_ring_id = INVALID_HW_RING_ID;  in bnxt_hwrm_ring_free()
7253 		ring = &cpr->cp_ring_struct;  in bnxt_hwrm_ring_free()
7254 		if (ring->fw_ring_id != INVALID_HW_RING_ID) {  in bnxt_hwrm_ring_free()
7257 			ring->fw_ring_id = INVALID_HW_RING_ID;  in bnxt_hwrm_ring_free()
7258 			bp->grp_info[i].cp_fw_ring_id = INVALID_HW_RING_ID;  in bnxt_hwrm_ring_free()
7270 	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;  in bnxt_hwrm_get_rings()
7275 	if (bp->hwrm_spec_code < 0x10601)  in bnxt_hwrm_get_rings()
7282 	req->fid = cpu_to_le16(0xffff);  in bnxt_hwrm_get_rings()
7290 	hw_resc->resv_tx_rings = le16_to_cpu(resp->alloc_tx_rings);  in bnxt_hwrm_get_rings()
7294 		hw_resc->resv_rx_rings = le16_to_cpu(resp->alloc_rx_rings);  in bnxt_hwrm_get_rings()
7295 		hw_resc->resv_hw_ring_grps =  in bnxt_hwrm_get_rings()
7296 			le32_to_cpu(resp->alloc_hw_ring_grps);  in bnxt_hwrm_get_rings()
7297 		hw_resc->resv_vnics = le16_to_cpu(resp->alloc_vnics);  in bnxt_hwrm_get_rings()
7298 		hw_resc->resv_rsscos_ctxs = le16_to_cpu(resp->alloc_rsscos_ctx);  in bnxt_hwrm_get_rings()
7299 		cp = le16_to_cpu(resp->alloc_cmpl_rings);  in bnxt_hwrm_get_rings()
7300 		stats = le16_to_cpu(resp->alloc_stat_ctx);  in bnxt_hwrm_get_rings()
7301 		hw_resc->resv_irqs = cp;  in bnxt_hwrm_get_rings()
7302 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_hwrm_get_rings()
7303 			int rx = hw_resc->resv_rx_rings;  in bnxt_hwrm_get_rings()
7304 			int tx = hw_resc->resv_tx_rings;  in bnxt_hwrm_get_rings()
7306 			if (bp->flags & BNXT_FLAG_AGG_RINGS)  in bnxt_hwrm_get_rings()
7312 				if (bp->flags & BNXT_FLAG_AGG_RINGS)  in bnxt_hwrm_get_rings()
7314 				hw_resc->resv_rx_rings = rx;  in bnxt_hwrm_get_rings()
7315 				hw_resc->resv_tx_rings = tx;  in bnxt_hwrm_get_rings()
7317 			hw_resc->resv_irqs = le16_to_cpu(resp->alloc_msix);  in bnxt_hwrm_get_rings()
7318 			hw_resc->resv_hw_ring_grps = rx;  in bnxt_hwrm_get_rings()
7320 		hw_resc->resv_cp_rings = cp;  in bnxt_hwrm_get_rings()
7321 		hw_resc->resv_stat_ctxs = stats;  in bnxt_hwrm_get_rings()
7334 	if (bp->hwrm_spec_code < 0x10601)  in __bnxt_hwrm_get_tx_rings()
7341 	req->fid = cpu_to_le16(fid);  in __bnxt_hwrm_get_tx_rings()
7345 		*tx_rings = le16_to_cpu(resp->alloc_tx_rings);  in __bnxt_hwrm_get_tx_rings()
7362 	req->fid = cpu_to_le16(0xffff);  in __bnxt_hwrm_reserve_pf_rings()
7363 	enables |= hwr->tx ? FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS : 0;  in __bnxt_hwrm_reserve_pf_rings()
7364 	req->num_tx_rings = cpu_to_le16(hwr->tx);  in __bnxt_hwrm_reserve_pf_rings()
7366 		enables |= hwr->rx ? FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS : 0;  in __bnxt_hwrm_reserve_pf_rings()
7367 		enables |= hwr->stat ? FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS : 0;  in __bnxt_hwrm_reserve_pf_rings()
7368 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in __bnxt_hwrm_reserve_pf_rings()
7369 			enables |= hwr->cp ? FUNC_CFG_REQ_ENABLES_NUM_MSIX : 0;  in __bnxt_hwrm_reserve_pf_rings()
7370 			enables |= hwr->cp_p5 ?  in __bnxt_hwrm_reserve_pf_rings()
7373 			enables |= hwr->cp ?  in __bnxt_hwrm_reserve_pf_rings()
7375 			enables |= hwr->grp ?  in __bnxt_hwrm_reserve_pf_rings()
7378 		enables |= hwr->vnic ? FUNC_CFG_REQ_ENABLES_NUM_VNICS : 0;  in __bnxt_hwrm_reserve_pf_rings()
7379 		enables |= hwr->rss_ctx ? FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS :  in __bnxt_hwrm_reserve_pf_rings()
7381 		req->num_rx_rings = cpu_to_le16(hwr->rx);  in __bnxt_hwrm_reserve_pf_rings()
7382 		req->num_rsscos_ctxs = cpu_to_le16(hwr->rss_ctx);  in __bnxt_hwrm_reserve_pf_rings()
7383 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in __bnxt_hwrm_reserve_pf_rings()
7384 			req->num_cmpl_rings = cpu_to_le16(hwr->cp_p5);  in __bnxt_hwrm_reserve_pf_rings()
7385 			req->num_msix = cpu_to_le16(hwr->cp);  in __bnxt_hwrm_reserve_pf_rings()
7387 			req->num_cmpl_rings = cpu_to_le16(hwr->cp);  in __bnxt_hwrm_reserve_pf_rings()
7388 			req->num_hw_ring_grps = cpu_to_le16(hwr->grp);  in __bnxt_hwrm_reserve_pf_rings()
7390 		req->num_stat_ctxs = cpu_to_le16(hwr->stat);  in __bnxt_hwrm_reserve_pf_rings()
7391 		req->num_vnics = cpu_to_le16(hwr->vnic);  in __bnxt_hwrm_reserve_pf_rings()
7393 	req->enables = cpu_to_le32(enables);  in __bnxt_hwrm_reserve_pf_rings()
7406 	enables |= hwr->tx ? FUNC_VF_CFG_REQ_ENABLES_NUM_TX_RINGS : 0;  in __bnxt_hwrm_reserve_vf_rings()
7407 	enables |= hwr->rx ? FUNC_VF_CFG_REQ_ENABLES_NUM_RX_RINGS |  in __bnxt_hwrm_reserve_vf_rings()
7409 	enables |= hwr->stat ? FUNC_VF_CFG_REQ_ENABLES_NUM_STAT_CTXS : 0;  in __bnxt_hwrm_reserve_vf_rings()
7410 	enables |= hwr->rss_ctx ? FUNC_VF_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS : 0;  in __bnxt_hwrm_reserve_vf_rings()
7411 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in __bnxt_hwrm_reserve_vf_rings()
7412 		enables |= hwr->cp_p5 ?  in __bnxt_hwrm_reserve_vf_rings()
7415 		enables |= hwr->cp ? FUNC_VF_CFG_REQ_ENABLES_NUM_CMPL_RINGS : 0;  in __bnxt_hwrm_reserve_vf_rings()
7416 		enables |= hwr->grp ?  in __bnxt_hwrm_reserve_vf_rings()
7419 	enables |= hwr->vnic ? FUNC_VF_CFG_REQ_ENABLES_NUM_VNICS : 0;  in __bnxt_hwrm_reserve_vf_rings()
7422 	req->num_l2_ctxs = cpu_to_le16(BNXT_VF_MAX_L2_CTX);  in __bnxt_hwrm_reserve_vf_rings()
7423 	req->num_tx_rings = cpu_to_le16(hwr->tx);  in __bnxt_hwrm_reserve_vf_rings()
7424 	req->num_rx_rings = cpu_to_le16(hwr->rx);  in __bnxt_hwrm_reserve_vf_rings()
7425 	req->num_rsscos_ctxs = cpu_to_le16(hwr->rss_ctx);  in __bnxt_hwrm_reserve_vf_rings()
7426 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in __bnxt_hwrm_reserve_vf_rings()
7427 		req->num_cmpl_rings = cpu_to_le16(hwr->cp_p5);  in __bnxt_hwrm_reserve_vf_rings()
7429 		req->num_cmpl_rings = cpu_to_le16(hwr->cp);  in __bnxt_hwrm_reserve_vf_rings()
7430 		req->num_hw_ring_grps = cpu_to_le16(hwr->grp);  in __bnxt_hwrm_reserve_vf_rings()
7432 	req->num_stat_ctxs = cpu_to_le16(hwr->stat);  in __bnxt_hwrm_reserve_vf_rings()
7433 	req->num_vnics = cpu_to_le16(hwr->vnic);  in __bnxt_hwrm_reserve_vf_rings()
7435 	req->enables = cpu_to_le32(enables);  in __bnxt_hwrm_reserve_vf_rings()
7447 		return -ENOMEM;  in bnxt_hwrm_reserve_pf_rings()
7449 	if (!req->enables) {  in bnxt_hwrm_reserve_pf_rings()
7458 	if (bp->hwrm_spec_code < 0x10601)  in bnxt_hwrm_reserve_pf_rings()
7459 		bp->hw_resc.resv_tx_rings = hwr->tx;  in bnxt_hwrm_reserve_pf_rings()
7471 		bp->hw_resc.resv_tx_rings = hwr->tx;  in bnxt_hwrm_reserve_vf_rings()
7477 		return -ENOMEM;  in bnxt_hwrm_reserve_vf_rings()
7496 	return bp->cp_nr_rings + bnxt_get_ulp_msix_num(bp);  in bnxt_nq_rings_in_use()
7503 	if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_cp_rings_in_use()
7506 	cp = bp->tx_nr_rings + bp->rx_nr_rings;  in bnxt_cp_rings_in_use()
7512 	return bp->cp_nr_rings + bnxt_get_ulp_stat_ctxs(bp);  in bnxt_get_func_stat_ctxs()
7517 	if (!hwr->grp)  in bnxt_get_total_rss_ctxs()
7519 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_get_total_rss_ctxs()
7520 		int rss_ctx = bnxt_get_nr_rss_ctxs(bp, hwr->grp);  in bnxt_get_total_rss_ctxs()
7523 			rss_ctx *= hwr->vnic;  in bnxt_get_total_rss_ctxs()
7528 	if (!(bp->rss_cap & BNXT_RSS_CAP_NEW_RSS_CAP) && bnxt_rfs_supported(bp))  in bnxt_get_total_rss_ctxs()
7529 		return hwr->grp + 1;  in bnxt_get_total_rss_ctxs()
7538 	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;  in bnxt_check_rss_tbl_no_rmgr()
7541 	if (hw_resc->resv_rx_rings != bp->rx_nr_rings) {  in bnxt_check_rss_tbl_no_rmgr()
7542 		hw_resc->resv_rx_rings = bp->rx_nr_rings;  in bnxt_check_rss_tbl_no_rmgr()
7543 		if (!netif_is_rxfh_configured(bp->dev))  in bnxt_check_rss_tbl_no_rmgr()
7550 	if (bp->flags & BNXT_FLAG_RFS) {  in bnxt_get_total_vnics()
7552 			return 2 + bp->num_rss_ctx;  in bnxt_get_total_vnics()
7553 		if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_get_total_vnics()
7561 	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;  in bnxt_need_reserve_rings()
7564 	int rx = bp->rx_nr_rings, stat;  in bnxt_need_reserve_rings()
7575 	if (hw_resc->resv_tx_rings != bp->tx_nr_rings &&  in bnxt_need_reserve_rings()
7576 	    bp->hwrm_spec_code >= 0x10601)  in bnxt_need_reserve_rings()
7584 	if (bp->flags & BNXT_FLAG_AGG_RINGS)  in bnxt_need_reserve_rings()
7587 	if (hw_resc->resv_rx_rings != rx || hw_resc->resv_cp_rings != cp ||  in bnxt_need_reserve_rings()
7588 	    hw_resc->resv_vnics != vnic || hw_resc->resv_stat_ctxs != stat ||  in bnxt_need_reserve_rings()
7589 	    (hw_resc->resv_hw_ring_grps != grp &&  in bnxt_need_reserve_rings()
7590 	     !(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)))  in bnxt_need_reserve_rings()
7592 	if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && BNXT_PF(bp) &&  in bnxt_need_reserve_rings()
7593 	    hw_resc->resv_irqs != nq)  in bnxt_need_reserve_rings()
7600 	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;  in bnxt_copy_reserved_rings()
7602 	hwr->tx = hw_resc->resv_tx_rings;  in bnxt_copy_reserved_rings()
7604 		hwr->rx = hw_resc->resv_rx_rings;  in bnxt_copy_reserved_rings()
7605 		hwr->cp = hw_resc->resv_irqs;  in bnxt_copy_reserved_rings()
7606 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_copy_reserved_rings()
7607 			hwr->cp_p5 = hw_resc->resv_cp_rings;  in bnxt_copy_reserved_rings()
7608 		hwr->grp = hw_resc->resv_hw_ring_grps;  in bnxt_copy_reserved_rings()
7609 		hwr->vnic = hw_resc->resv_vnics;  in bnxt_copy_reserved_rings()
7610 		hwr->stat = hw_resc->resv_stat_ctxs;  in bnxt_copy_reserved_rings()
7611 		hwr->rss_ctx = hw_resc->resv_rsscos_ctxs;  in bnxt_copy_reserved_rings()
7617 	return hwr->tx && hwr->rx && hwr->cp && hwr->grp && hwr->vnic &&  in bnxt_rings_ok()
7618 	       hwr->stat && (hwr->cp_p5 || !(bp->flags & BNXT_FLAG_CHIP_P5_PLUS));  in bnxt_rings_ok()
7627 	int cp = bp->cp_nr_rings;  in __bnxt_reserve_rings()
7635 	if (BNXT_NEW_RM(bp) && !bnxt_ulp_registered(bp->edev)) {  in __bnxt_reserve_rings()
7636 		ulp_msix = bnxt_get_avail_msix(bp, bp->ulp_num_msix_want);  in __bnxt_reserve_rings()
7640 		if (ulp_msix > bp->ulp_num_msix_want)  in __bnxt_reserve_rings()
7641 			ulp_msix = bp->ulp_num_msix_want;  in __bnxt_reserve_rings()
7647 	hwr.tx = bp->tx_nr_rings;  in __bnxt_reserve_rings()
7648 	hwr.rx = bp->rx_nr_rings;  in __bnxt_reserve_rings()
7649 	if (bp->flags & BNXT_FLAG_SHARED_RINGS)  in __bnxt_reserve_rings()
7651 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in __bnxt_reserve_rings()
7656 	if (bp->flags & BNXT_FLAG_AGG_RINGS)  in __bnxt_reserve_rings()
7658 	hwr.grp = bp->rx_nr_rings;  in __bnxt_reserve_rings()
7661 	old_rx_rings = bp->hw_resc.resv_rx_rings;  in __bnxt_reserve_rings()
7670 	if (bp->flags & BNXT_FLAG_AGG_RINGS) {  in __bnxt_reserve_rings()
7674 			if (netif_running(bp->dev))  in __bnxt_reserve_rings()
7675 				return -ENOMEM;  in __bnxt_reserve_rings()
7677 			bp->flags &= ~BNXT_FLAG_AGG_RINGS;  in __bnxt_reserve_rings()
7678 			bp->flags |= BNXT_FLAG_NO_AGG_RINGS;  in __bnxt_reserve_rings()
7679 			bp->dev->hw_features &= ~NETIF_F_LRO;  in __bnxt_reserve_rings()
7680 			bp->dev->features &= ~NETIF_F_LRO;  in __bnxt_reserve_rings()
7685 	hwr.cp = min_t(int, hwr.cp, bp->cp_nr_rings);  in __bnxt_reserve_rings()
7687 		hwr.stat -= bnxt_get_ulp_stat_ctxs(bp);  in __bnxt_reserve_rings()
7690 	if (bp->flags & BNXT_FLAG_AGG_RINGS)  in __bnxt_reserve_rings()
7694 	bp->tx_nr_rings = hwr.tx;  in __bnxt_reserve_rings()
7699 	if (rx_rings != bp->rx_nr_rings) {  in __bnxt_reserve_rings()
7700 		netdev_warn(bp->dev, "Able to reserve only %d out of %d requested RX rings\n",  in __bnxt_reserve_rings()
7701 			    rx_rings, bp->rx_nr_rings);  in __bnxt_reserve_rings()
7702 		if (netif_is_rxfh_configured(bp->dev) &&  in __bnxt_reserve_rings()
7703 		    (bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) !=  in __bnxt_reserve_rings()
7706 			netdev_warn(bp->dev, "RSS table entries reverting to default\n");  in __bnxt_reserve_rings()
7707 			bp->dev->priv_flags &= ~IFF_RXFH_CONFIGURED;  in __bnxt_reserve_rings()
7710 	bp->rx_nr_rings = rx_rings;  in __bnxt_reserve_rings()
7711 	bp->cp_nr_rings = hwr.cp;  in __bnxt_reserve_rings()
7714 		return -ENOMEM;  in __bnxt_reserve_rings()
7716 	if (old_rx_rings != bp->hw_resc.resv_rx_rings &&  in __bnxt_reserve_rings()
7717 	    !netif_is_rxfh_configured(bp->dev))  in __bnxt_reserve_rings()
7720 	if (!bnxt_ulp_registered(bp->edev) && BNXT_NEW_RM(bp)) {  in __bnxt_reserve_rings()
7724 		hw_resc = &bp->hw_resc;  in __bnxt_reserve_rings()
7725 		resv_msix = hw_resc->resv_irqs - bp->cp_nr_rings;  in __bnxt_reserve_rings()
7728 		resv_ctx = hw_resc->resv_stat_ctxs  - bp->cp_nr_rings;  in __bnxt_reserve_rings()
7751 	if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_hwrm_check_vf_rings()
7754 	req->flags = cpu_to_le32(flags);  in bnxt_hwrm_check_vf_rings()
7770 		if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_hwrm_check_pf_rings()
7777 	req->flags = cpu_to_le32(flags);  in bnxt_hwrm_check_pf_rings()
7783 	if (bp->hwrm_spec_code < 0x10801)  in bnxt_hwrm_check_rings()
7794 	struct bnxt_coal_cap *coal_cap = &bp->coal_cap;  in bnxt_hwrm_coal_params_qcaps()
7799 	coal_cap->cmpl_params = BNXT_LEGACY_COAL_CMPL_PARAMS;  in bnxt_hwrm_coal_params_qcaps()
7800 	coal_cap->num_cmpl_dma_aggr_max = 63;  in bnxt_hwrm_coal_params_qcaps()
7801 	coal_cap->num_cmpl_dma_aggr_during_int_max = 63;  in bnxt_hwrm_coal_params_qcaps()
7802 	coal_cap->cmpl_aggr_dma_tmr_max = 65535;  in bnxt_hwrm_coal_params_qcaps()
7803 	coal_cap->cmpl_aggr_dma_tmr_during_int_max = 65535;  in bnxt_hwrm_coal_params_qcaps()
7804 	coal_cap->int_lat_tmr_min_max = 65535;  in bnxt_hwrm_coal_params_qcaps()
7805 	coal_cap->int_lat_tmr_max_max = 65535;  in bnxt_hwrm_coal_params_qcaps()
7806 	coal_cap->num_cmpl_aggr_int_max = 65535;  in bnxt_hwrm_coal_params_qcaps()
7807 	coal_cap->timer_units = 80;  in bnxt_hwrm_coal_params_qcaps()
7809 	if (bp->hwrm_spec_code < 0x10902)  in bnxt_hwrm_coal_params_qcaps()
7818 		coal_cap->cmpl_params = le32_to_cpu(resp->cmpl_params);  in bnxt_hwrm_coal_params_qcaps()
7819 		coal_cap->nq_params = le32_to_cpu(resp->nq_params);  in bnxt_hwrm_coal_params_qcaps()
7820 		coal_cap->num_cmpl_dma_aggr_max =  in bnxt_hwrm_coal_params_qcaps()
7821 			le16_to_cpu(resp->num_cmpl_dma_aggr_max);  in bnxt_hwrm_coal_params_qcaps()
7822 		coal_cap->num_cmpl_dma_aggr_during_int_max =  in bnxt_hwrm_coal_params_qcaps()
7823 			le16_to_cpu(resp->num_cmpl_dma_aggr_during_int_max);  in bnxt_hwrm_coal_params_qcaps()
7824 		coal_cap->cmpl_aggr_dma_tmr_max =  in bnxt_hwrm_coal_params_qcaps()
7825 			le16_to_cpu(resp->cmpl_aggr_dma_tmr_max);  in bnxt_hwrm_coal_params_qcaps()
7826 		coal_cap->cmpl_aggr_dma_tmr_during_int_max =  in bnxt_hwrm_coal_params_qcaps()
7827 			le16_to_cpu(resp->cmpl_aggr_dma_tmr_during_int_max);  in bnxt_hwrm_coal_params_qcaps()
7828 		coal_cap->int_lat_tmr_min_max =  in bnxt_hwrm_coal_params_qcaps()
7829 			le16_to_cpu(resp->int_lat_tmr_min_max);  in bnxt_hwrm_coal_params_qcaps()
7830 		coal_cap->int_lat_tmr_max_max =  in bnxt_hwrm_coal_params_qcaps()
7831 			le16_to_cpu(resp->int_lat_tmr_max_max);  in bnxt_hwrm_coal_params_qcaps()
7832 		coal_cap->num_cmpl_aggr_int_max =  in bnxt_hwrm_coal_params_qcaps()
7833 			le16_to_cpu(resp->num_cmpl_aggr_int_max);  in bnxt_hwrm_coal_params_qcaps()
7834 		coal_cap->timer_units = le16_to_cpu(resp->timer_units);  in bnxt_hwrm_coal_params_qcaps()
7841 	struct bnxt_coal_cap *coal_cap = &bp->coal_cap;  in bnxt_usec_to_coal_tmr()
7843 	return usec * 1000 / coal_cap->timer_units;  in bnxt_usec_to_coal_tmr()
7850 	struct bnxt_coal_cap *coal_cap = &bp->coal_cap;  in bnxt_hwrm_set_coal_params()
7851 	u16 val, tmr, max, flags = hw_coal->flags;  in bnxt_hwrm_set_coal_params()
7852 	u32 cmpl_params = coal_cap->cmpl_params;  in bnxt_hwrm_set_coal_params()
7854 	max = hw_coal->bufs_per_record * 128;  in bnxt_hwrm_set_coal_params()
7855 	if (hw_coal->budget)  in bnxt_hwrm_set_coal_params()
7856 		max = hw_coal->bufs_per_record * hw_coal->budget;  in bnxt_hwrm_set_coal_params()
7857 	max = min_t(u16, max, coal_cap->num_cmpl_aggr_int_max);  in bnxt_hwrm_set_coal_params()
7859 	val = clamp_t(u16, hw_coal->coal_bufs, 1, max);  in bnxt_hwrm_set_coal_params()
7860 	req->num_cmpl_aggr_int = cpu_to_le16(val);  in bnxt_hwrm_set_coal_params()
7862 	val = min_t(u16, val, coal_cap->num_cmpl_dma_aggr_max);  in bnxt_hwrm_set_coal_params()
7863 	req->num_cmpl_dma_aggr = cpu_to_le16(val);  in bnxt_hwrm_set_coal_params()
7865 	val = clamp_t(u16, hw_coal->coal_bufs_irq, 1,  in bnxt_hwrm_set_coal_params()
7866 		      coal_cap->num_cmpl_dma_aggr_during_int_max);  in bnxt_hwrm_set_coal_params()
7867 	req->num_cmpl_dma_aggr_during_int = cpu_to_le16(val);  in bnxt_hwrm_set_coal_params()
7869 	tmr = bnxt_usec_to_coal_tmr(bp, hw_coal->coal_ticks);  in bnxt_hwrm_set_coal_params()
7870 	tmr = clamp_t(u16, tmr, 1, coal_cap->int_lat_tmr_max_max);  in bnxt_hwrm_set_coal_params()
7871 	req->int_lat_tmr_max = cpu_to_le16(tmr);  in bnxt_hwrm_set_coal_params()
7876 		val = clamp_t(u16, val, 1, coal_cap->int_lat_tmr_min_max);  in bnxt_hwrm_set_coal_params()
7877 		req->int_lat_tmr_min = cpu_to_le16(val);  in bnxt_hwrm_set_coal_params()
7878 		req->enables |= cpu_to_le16(BNXT_COAL_CMPL_MIN_TMR_ENABLE);  in bnxt_hwrm_set_coal_params()
7882 	val = clamp_t(u16, tmr / 4, 1, coal_cap->cmpl_aggr_dma_tmr_max);  in bnxt_hwrm_set_coal_params()
7883 	req->cmpl_aggr_dma_tmr = cpu_to_le16(val);  in bnxt_hwrm_set_coal_params()
7887 		tmr = bnxt_usec_to_coal_tmr(bp, hw_coal->coal_ticks_irq);  in bnxt_hwrm_set_coal_params()
7889 			      coal_cap->cmpl_aggr_dma_tmr_during_int_max);  in bnxt_hwrm_set_coal_params()
7890 		req->cmpl_aggr_dma_tmr_during_int = cpu_to_le16(val);  in bnxt_hwrm_set_coal_params()
7891 		req->enables |=  in bnxt_hwrm_set_coal_params()
7896 	    hw_coal->idle_thresh && hw_coal->coal_ticks < hw_coal->idle_thresh)  in bnxt_hwrm_set_coal_params()
7898 	req->flags = cpu_to_le16(flags);  in bnxt_hwrm_set_coal_params()
7899 	req->enables |= cpu_to_le16(BNXT_COAL_CMPL_ENABLES);  in bnxt_hwrm_set_coal_params()
7906 	struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in __bnxt_hwrm_set_coal_nq()
7907 	struct bnxt_coal_cap *coal_cap = &bp->coal_cap;  in __bnxt_hwrm_set_coal_nq()
7908 	u32 nq_params = coal_cap->nq_params;  in __bnxt_hwrm_set_coal_nq()
7919 	req->ring_id = cpu_to_le16(cpr->cp_ring_struct.fw_ring_id);  in __bnxt_hwrm_set_coal_nq()
7920 	req->flags =  in __bnxt_hwrm_set_coal_nq()
7923 	tmr = bnxt_usec_to_coal_tmr(bp, hw_coal->coal_ticks) / 2;  in __bnxt_hwrm_set_coal_nq()
7924 	tmr = clamp_t(u16, tmr, 1, coal_cap->int_lat_tmr_min_max);  in __bnxt_hwrm_set_coal_nq()
7925 	req->int_lat_tmr_min = cpu_to_le16(tmr);  in __bnxt_hwrm_set_coal_nq()
7926 	req->enables |= cpu_to_le16(BNXT_COAL_CMPL_MIN_TMR_ENABLE);  in __bnxt_hwrm_set_coal_nq()
7933 	struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_hwrm_set_ring_coal()
7940 	memcpy(&coal, &bp->rx_coal, sizeof(struct bnxt_coal));  in bnxt_hwrm_set_ring_coal()
7942 	coal.coal_ticks = cpr->rx_ring_coal.coal_ticks;  in bnxt_hwrm_set_ring_coal()
7943 	coal.coal_bufs = cpr->rx_ring_coal.coal_bufs;  in bnxt_hwrm_set_ring_coal()
7945 	if (!bnapi->rx_ring)  in bnxt_hwrm_set_ring_coal()
7946 		return -ENODEV;  in bnxt_hwrm_set_ring_coal()
7954 	req_rx->ring_id = cpu_to_le16(bnxt_cp_ring_for_rx(bp, bnapi->rx_ring));  in bnxt_hwrm_set_ring_coal()
7963 	u16 ring_id = bnxt_cp_ring_for_rx(bp, bnapi->rx_ring);  in bnxt_hwrm_set_rx_coal()
7965 	req->ring_id = cpu_to_le16(ring_id);  in bnxt_hwrm_set_rx_coal()
7980 		req->ring_id = cpu_to_le16(ring_id);  in bnxt_hwrm_set_tx_coal()
7984 		if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_hwrm_set_tx_coal()
8005 	bnxt_hwrm_set_coal_params(bp, &bp->rx_coal, req_rx);  in bnxt_hwrm_set_coal()
8006 	bnxt_hwrm_set_coal_params(bp, &bp->tx_coal, req_tx);  in bnxt_hwrm_set_coal()
8010 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_hwrm_set_coal()
8011 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_hwrm_set_coal()
8014 		if (!bnapi->rx_ring)  in bnxt_hwrm_set_coal()
8021 		if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_hwrm_set_coal()
8024 		if (bnapi->rx_ring && bnapi->tx_ring[0]) {  in bnxt_hwrm_set_coal()
8029 		if (bnapi->rx_ring)  in bnxt_hwrm_set_coal()
8030 			hw_coal = &bp->rx_coal;  in bnxt_hwrm_set_coal()
8032 			hw_coal = &bp->tx_coal;  in bnxt_hwrm_set_coal()
8046 	if (!bp->bnapi)  in bnxt_hwrm_stat_ctx_free()
8062 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_hwrm_stat_ctx_free()
8063 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_hwrm_stat_ctx_free()
8064 		struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_hwrm_stat_ctx_free()
8066 		if (cpr->hw_stats_ctx_id != INVALID_STATS_CTX_ID) {  in bnxt_hwrm_stat_ctx_free()
8067 			req->stat_ctx_id = cpu_to_le32(cpr->hw_stats_ctx_id);  in bnxt_hwrm_stat_ctx_free()
8069 				req0->stat_ctx_id = req->stat_ctx_id;  in bnxt_hwrm_stat_ctx_free()
8074 			cpr->hw_stats_ctx_id = INVALID_STATS_CTX_ID;  in bnxt_hwrm_stat_ctx_free()
8095 	req->stats_dma_length = cpu_to_le16(bp->hw_ring_stats_size);  in bnxt_hwrm_stat_ctx_alloc()
8096 	req->update_period_ms = cpu_to_le32(bp->stats_coal_ticks / 1000);  in bnxt_hwrm_stat_ctx_alloc()
8099 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_hwrm_stat_ctx_alloc()
8100 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_hwrm_stat_ctx_alloc()
8101 		struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_hwrm_stat_ctx_alloc()
8103 		req->stats_dma_addr = cpu_to_le64(cpr->stats.hw_stats_map);  in bnxt_hwrm_stat_ctx_alloc()
8109 		cpr->hw_stats_ctx_id = le32_to_cpu(resp->stat_ctx_id);  in bnxt_hwrm_stat_ctx_alloc()
8111 		bp->grp_info[i].fw_stats_ctx = cpr->hw_stats_ctx_id;  in bnxt_hwrm_stat_ctx_alloc()
8128 	req->fid = cpu_to_le16(0xffff);  in bnxt_hwrm_func_qcfg()
8136 		struct bnxt_vf_info *vf = &bp->vf;  in bnxt_hwrm_func_qcfg()
8138 		vf->vlan = le16_to_cpu(resp->vlan) & VLAN_VID_MASK;  in bnxt_hwrm_func_qcfg()
8140 		bp->pf.registered_vfs = le16_to_cpu(resp->registered_vfs);  in bnxt_hwrm_func_qcfg()
8143 	flags = le16_to_cpu(resp->flags);  in bnxt_hwrm_func_qcfg()
8146 		bp->fw_cap |= BNXT_FW_CAP_LLDP_AGENT;  in bnxt_hwrm_func_qcfg()
8148 			bp->fw_cap |= BNXT_FW_CAP_DCBX_AGENT;  in bnxt_hwrm_func_qcfg()
8151 		bp->flags |= BNXT_FLAG_MULTI_HOST;  in bnxt_hwrm_func_qcfg()
8154 		bp->fw_cap |= BNXT_FW_CAP_RING_MONITOR;  in bnxt_hwrm_func_qcfg()
8156 	switch (resp->port_partition_type) {  in bnxt_hwrm_func_qcfg()
8160 		bp->port_partition_type = resp->port_partition_type;  in bnxt_hwrm_func_qcfg()
8163 	if (bp->hwrm_spec_code < 0x10707 ||  in bnxt_hwrm_func_qcfg()
8164 	    resp->evb_mode == FUNC_QCFG_RESP_EVB_MODE_VEB)  in bnxt_hwrm_func_qcfg()
8165 		bp->br_mode = BRIDGE_MODE_VEB;  in bnxt_hwrm_func_qcfg()
8166 	else if (resp->evb_mode == FUNC_QCFG_RESP_EVB_MODE_VEPA)  in bnxt_hwrm_func_qcfg()
8167 		bp->br_mode = BRIDGE_MODE_VEPA;  in bnxt_hwrm_func_qcfg()
8169 		bp->br_mode = BRIDGE_MODE_UNDEF;  in bnxt_hwrm_func_qcfg()
8171 	bp->max_mtu = le16_to_cpu(resp->max_mtu_configured);  in bnxt_hwrm_func_qcfg()
8172 	if (!bp->max_mtu)  in bnxt_hwrm_func_qcfg()
8173 		bp->max_mtu = BNXT_MAX_MTU;  in bnxt_hwrm_func_qcfg()
8175 	if (bp->db_size)  in bnxt_hwrm_func_qcfg()
8178 	bp->db_offset = le16_to_cpu(resp->legacy_l2_db_size_kb) * 1024;  in bnxt_hwrm_func_qcfg()
8181 			bp->db_offset = DB_PF_OFFSET_P5;  in bnxt_hwrm_func_qcfg()
8183 			bp->db_offset = DB_VF_OFFSET_P5;  in bnxt_hwrm_func_qcfg()
8185 	bp->db_size = PAGE_ALIGN(le16_to_cpu(resp->l2_doorbell_bar_size_kb) *  in bnxt_hwrm_func_qcfg()
8187 	if (!bp->db_size || bp->db_size > pci_resource_len(bp->pdev, 2) ||  in bnxt_hwrm_func_qcfg()
8188 	    bp->db_size <= bp->db_offset)  in bnxt_hwrm_func_qcfg()
8189 		bp->db_size = pci_resource_len(bp->pdev, 2);  in bnxt_hwrm_func_qcfg()
8200 	ctxm->init_value = init_val;  in bnxt_init_ctx_initializer()
8201 	ctxm->init_offset = BNXT_CTX_INIT_INVALID_OFFSET;  in bnxt_init_ctx_initializer()
8203 		ctxm->init_offset = init_offset * 4;  in bnxt_init_ctx_initializer()
8205 		ctxm->init_value = 0;  in bnxt_init_ctx_initializer()
8210 	struct bnxt_ctx_mem_info *ctx = bp->ctx;  in bnxt_alloc_all_ctx_pg_info()
8214 		struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type];  in bnxt_alloc_all_ctx_pg_info()
8217 		if (!ctxm->max_entries)  in bnxt_alloc_all_ctx_pg_info()
8220 		if (ctxm->instance_bmap)  in bnxt_alloc_all_ctx_pg_info()
8221 			n = hweight32(ctxm->instance_bmap);  in bnxt_alloc_all_ctx_pg_info()
8222 		ctxm->pg_info = kcalloc(n, sizeof(*ctxm->pg_info), GFP_KERNEL);  in bnxt_alloc_all_ctx_pg_info()
8223 		if (!ctxm->pg_info)  in bnxt_alloc_all_ctx_pg_info()
8224 			return -ENOMEM;  in bnxt_alloc_all_ctx_pg_info()
8247 		return -ENOMEM;  in bnxt_hwrm_func_backing_store_qcaps_v2()
8248 	bp->ctx = ctx;  in bnxt_hwrm_func_backing_store_qcaps_v2()
8253 		struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type];  in bnxt_hwrm_func_backing_store_qcaps_v2()
8258 		req->type = cpu_to_le16(type);  in bnxt_hwrm_func_backing_store_qcaps_v2()
8262 		flags = le32_to_cpu(resp->flags);  in bnxt_hwrm_func_backing_store_qcaps_v2()
8263 		type = le16_to_cpu(resp->next_valid_type);  in bnxt_hwrm_func_backing_store_qcaps_v2()
8267 		ctxm->type = le16_to_cpu(resp->type);  in bnxt_hwrm_func_backing_store_qcaps_v2()
8268 		ctxm->entry_size = le16_to_cpu(resp->entry_size);  in bnxt_hwrm_func_backing_store_qcaps_v2()
8269 		ctxm->flags = flags;  in bnxt_hwrm_func_backing_store_qcaps_v2()
8270 		ctxm->instance_bmap = le32_to_cpu(resp->instance_bit_map);  in bnxt_hwrm_func_backing_store_qcaps_v2()
8271 		ctxm->entry_multiple = resp->entry_multiple;  in bnxt_hwrm_func_backing_store_qcaps_v2()
8272 		ctxm->max_entries = le32_to_cpu(resp->max_num_entries);  in bnxt_hwrm_func_backing_store_qcaps_v2()
8273 		ctxm->min_entries = le32_to_cpu(resp->min_num_entries);  in bnxt_hwrm_func_backing_store_qcaps_v2()
8274 		init_val = resp->ctx_init_value;  in bnxt_hwrm_func_backing_store_qcaps_v2()
8275 		init_off = resp->ctx_init_offset;  in bnxt_hwrm_func_backing_store_qcaps_v2()
8278 		ctxm->split_entry_cnt = min_t(u8, resp->subtype_valid_cnt,  in bnxt_hwrm_func_backing_store_qcaps_v2()
8280 		for (i = 0, p = &resp->split_entry_0; i < ctxm->split_entry_cnt;  in bnxt_hwrm_func_backing_store_qcaps_v2()
8282 			ctxm->split[i] = le32_to_cpu(*p);  in bnxt_hwrm_func_backing_store_qcaps_v2()
8297 	if (bp->hwrm_spec_code < 0x10902 || BNXT_VF(bp) || bp->ctx)  in bnxt_hwrm_func_backing_store_qcaps()
8300 	if (bp->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2)  in bnxt_hwrm_func_backing_store_qcaps()
8315 		ctx = bp->ctx;  in bnxt_hwrm_func_backing_store_qcaps()
8319 				rc = -ENOMEM;  in bnxt_hwrm_func_backing_store_qcaps()
8322 			bp->ctx = ctx;  in bnxt_hwrm_func_backing_store_qcaps()
8324 		init_val = resp->ctx_kind_initializer;  in bnxt_hwrm_func_backing_store_qcaps()
8325 		init_mask = le16_to_cpu(resp->ctx_init_mask);  in bnxt_hwrm_func_backing_store_qcaps()
8327 		ctxm = &ctx->ctx_arr[BNXT_CTX_QP];  in bnxt_hwrm_func_backing_store_qcaps()
8328 		ctxm->max_entries = le32_to_cpu(resp->qp_max_entries);  in bnxt_hwrm_func_backing_store_qcaps()
8329 		ctxm->qp_qp1_entries = le16_to_cpu(resp->qp_min_qp1_entries);  in bnxt_hwrm_func_backing_store_qcaps()
8330 		ctxm->qp_l2_entries = le16_to_cpu(resp->qp_max_l2_entries);  in bnxt_hwrm_func_backing_store_qcaps()
8331 		ctxm->qp_fast_qpmd_entries = le16_to_cpu(resp->fast_qpmd_qp_num_entries);  in bnxt_hwrm_func_backing_store_qcaps()
8332 		ctxm->entry_size = le16_to_cpu(resp->qp_entry_size);  in bnxt_hwrm_func_backing_store_qcaps()
8333 		bnxt_init_ctx_initializer(ctxm, init_val, resp->qp_init_offset,  in bnxt_hwrm_func_backing_store_qcaps()
8336 		ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ];  in bnxt_hwrm_func_backing_store_qcaps()
8337 		ctxm->srq_l2_entries = le16_to_cpu(resp->srq_max_l2_entries);  in bnxt_hwrm_func_backing_store_qcaps()
8338 		ctxm->max_entries = le32_to_cpu(resp->srq_max_entries);  in bnxt_hwrm_func_backing_store_qcaps()
8339 		ctxm->entry_size = le16_to_cpu(resp->srq_entry_size);  in bnxt_hwrm_func_backing_store_qcaps()
8340 		bnxt_init_ctx_initializer(ctxm, init_val, resp->srq_init_offset,  in bnxt_hwrm_func_backing_store_qcaps()
8343 		ctxm = &ctx->ctx_arr[BNXT_CTX_CQ];  in bnxt_hwrm_func_backing_store_qcaps()
8344 		ctxm->cq_l2_entries = le16_to_cpu(resp->cq_max_l2_entries);  in bnxt_hwrm_func_backing_store_qcaps()
8345 		ctxm->max_entries = le32_to_cpu(resp->cq_max_entries);  in bnxt_hwrm_func_backing_store_qcaps()
8346 		ctxm->entry_size = le16_to_cpu(resp->cq_entry_size);  in bnxt_hwrm_func_backing_store_qcaps()
8347 		bnxt_init_ctx_initializer(ctxm, init_val, resp->cq_init_offset,  in bnxt_hwrm_func_backing_store_qcaps()
8350 		ctxm = &ctx->ctx_arr[BNXT_CTX_VNIC];  in bnxt_hwrm_func_backing_store_qcaps()
8351 		ctxm->vnic_entries = le16_to_cpu(resp->vnic_max_vnic_entries);  in bnxt_hwrm_func_backing_store_qcaps()
8352 		ctxm->max_entries = ctxm->vnic_entries +  in bnxt_hwrm_func_backing_store_qcaps()
8353 			le16_to_cpu(resp->vnic_max_ring_table_entries);  in bnxt_hwrm_func_backing_store_qcaps()
8354 		ctxm->entry_size = le16_to_cpu(resp->vnic_entry_size);  in bnxt_hwrm_func_backing_store_qcaps()
8356 					  resp->vnic_init_offset,  in bnxt_hwrm_func_backing_store_qcaps()
8359 		ctxm = &ctx->ctx_arr[BNXT_CTX_STAT];  in bnxt_hwrm_func_backing_store_qcaps()
8360 		ctxm->max_entries = le32_to_cpu(resp->stat_max_entries);  in bnxt_hwrm_func_backing_store_qcaps()
8361 		ctxm->entry_size = le16_to_cpu(resp->stat_entry_size);  in bnxt_hwrm_func_backing_store_qcaps()
8363 					  resp->stat_init_offset,  in bnxt_hwrm_func_backing_store_qcaps()
8366 		ctxm = &ctx->ctx_arr[BNXT_CTX_STQM];  in bnxt_hwrm_func_backing_store_qcaps()
8367 		ctxm->entry_size = le16_to_cpu(resp->tqm_entry_size);  in bnxt_hwrm_func_backing_store_qcaps()
8368 		ctxm->min_entries = le32_to_cpu(resp->tqm_min_entries_per_ring);  in bnxt_hwrm_func_backing_store_qcaps()
8369 		ctxm->max_entries = le32_to_cpu(resp->tqm_max_entries_per_ring);  in bnxt_hwrm_func_backing_store_qcaps()
8370 		ctxm->entry_multiple = resp->tqm_entries_multiple;  in bnxt_hwrm_func_backing_store_qcaps()
8371 		if (!ctxm->entry_multiple)  in bnxt_hwrm_func_backing_store_qcaps()
8372 			ctxm->entry_multiple = 1;  in bnxt_hwrm_func_backing_store_qcaps()
8374 		memcpy(&ctx->ctx_arr[BNXT_CTX_FTQM], ctxm, sizeof(*ctxm));  in bnxt_hwrm_func_backing_store_qcaps()
8376 		ctxm = &ctx->ctx_arr[BNXT_CTX_MRAV];  in bnxt_hwrm_func_backing_store_qcaps()
8377 		ctxm->max_entries = le32_to_cpu(resp->mrav_max_entries);  in bnxt_hwrm_func_backing_store_qcaps()
8378 		ctxm->entry_size = le16_to_cpu(resp->mrav_entry_size);  in bnxt_hwrm_func_backing_store_qcaps()
8379 		ctxm->mrav_num_entries_units =  in bnxt_hwrm_func_backing_store_qcaps()
8380 			le16_to_cpu(resp->mrav_num_entries_units);  in bnxt_hwrm_func_backing_store_qcaps()
8382 					  resp->mrav_init_offset,  in bnxt_hwrm_func_backing_store_qcaps()
8385 		ctxm = &ctx->ctx_arr[BNXT_CTX_TIM];  in bnxt_hwrm_func_backing_store_qcaps()
8386 		ctxm->entry_size = le16_to_cpu(resp->tim_entry_size);  in bnxt_hwrm_func_backing_store_qcaps()
8387 		ctxm->max_entries = le32_to_cpu(resp->tim_max_entries);  in bnxt_hwrm_func_backing_store_qcaps()
8389 		ctx->tqm_fp_rings_count = resp->tqm_fp_rings_count;  in bnxt_hwrm_func_backing_store_qcaps()
8390 		if (!ctx->tqm_fp_rings_count)  in bnxt_hwrm_func_backing_store_qcaps()
8391 			ctx->tqm_fp_rings_count = bp->max_q;  in bnxt_hwrm_func_backing_store_qcaps()
8392 		else if (ctx->tqm_fp_rings_count > BNXT_MAX_TQM_FP_RINGS)  in bnxt_hwrm_func_backing_store_qcaps()
8393 			ctx->tqm_fp_rings_count = BNXT_MAX_TQM_FP_RINGS;  in bnxt_hwrm_func_backing_store_qcaps()
8395 		ctxm = &ctx->ctx_arr[BNXT_CTX_FTQM];  in bnxt_hwrm_func_backing_store_qcaps()
8396 		memcpy(ctxm, &ctx->ctx_arr[BNXT_CTX_STQM], sizeof(*ctxm));  in bnxt_hwrm_func_backing_store_qcaps()
8397 		ctxm->instance_bmap = (1 << ctx->tqm_fp_rings_count) - 1;  in bnxt_hwrm_func_backing_store_qcaps()
8411 	if (!rmem->nr_pages)  in bnxt_hwrm_set_pg_attr()
8415 	if (rmem->depth >= 1) {  in bnxt_hwrm_set_pg_attr()
8416 		if (rmem->depth == 2)  in bnxt_hwrm_set_pg_attr()
8420 		*pg_dir = cpu_to_le64(rmem->pg_tbl_map);  in bnxt_hwrm_set_pg_attr()
8422 		*pg_dir = cpu_to_le64(rmem->dma_arr[0]);  in bnxt_hwrm_set_pg_attr()
8436 	struct bnxt_ctx_mem_info *ctx = bp->ctx;  in bnxt_hwrm_func_backing_store_cfg()
8452 	if (req_len > bp->hwrm_max_ext_req_len)  in bnxt_hwrm_func_backing_store_cfg()
8458 	req->enables = cpu_to_le32(enables);  in bnxt_hwrm_func_backing_store_cfg()
8460 		ctxm = &ctx->ctx_arr[BNXT_CTX_QP];  in bnxt_hwrm_func_backing_store_cfg()
8461 		ctx_pg = ctxm->pg_info;  in bnxt_hwrm_func_backing_store_cfg()
8462 		req->qp_num_entries = cpu_to_le32(ctx_pg->entries);  in bnxt_hwrm_func_backing_store_cfg()
8463 		req->qp_num_qp1_entries = cpu_to_le16(ctxm->qp_qp1_entries);  in bnxt_hwrm_func_backing_store_cfg()
8464 		req->qp_num_l2_entries = cpu_to_le16(ctxm->qp_l2_entries);  in bnxt_hwrm_func_backing_store_cfg()
8465 		req->qp_entry_size = cpu_to_le16(ctxm->entry_size);  in bnxt_hwrm_func_backing_store_cfg()
8466 		bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,  in bnxt_hwrm_func_backing_store_cfg()
8467 				      &req->qpc_pg_size_qpc_lvl,  in bnxt_hwrm_func_backing_store_cfg()
8468 				      &req->qpc_page_dir);  in bnxt_hwrm_func_backing_store_cfg()
8471 			req->qp_num_fast_qpmd_entries = cpu_to_le16(ctxm->qp_fast_qpmd_entries);  in bnxt_hwrm_func_backing_store_cfg()
8474 		ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ];  in bnxt_hwrm_func_backing_store_cfg()
8475 		ctx_pg = ctxm->pg_info;  in bnxt_hwrm_func_backing_store_cfg()
8476 		req->srq_num_entries = cpu_to_le32(ctx_pg->entries);  in bnxt_hwrm_func_backing_store_cfg()
8477 		req->srq_num_l2_entries = cpu_to_le16(ctxm->srq_l2_entries);  in bnxt_hwrm_func_backing_store_cfg()
8478 		req->srq_entry_size = cpu_to_le16(ctxm->entry_size);  in bnxt_hwrm_func_backing_store_cfg()
8479 		bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,  in bnxt_hwrm_func_backing_store_cfg()
8480 				      &req->srq_pg_size_srq_lvl,  in bnxt_hwrm_func_backing_store_cfg()
8481 				      &req->srq_page_dir);  in bnxt_hwrm_func_backing_store_cfg()
8484 		ctxm = &ctx->ctx_arr[BNXT_CTX_CQ];  in bnxt_hwrm_func_backing_store_cfg()
8485 		ctx_pg = ctxm->pg_info;  in bnxt_hwrm_func_backing_store_cfg()
8486 		req->cq_num_entries = cpu_to_le32(ctx_pg->entries);  in bnxt_hwrm_func_backing_store_cfg()
8487 		req->cq_num_l2_entries = cpu_to_le16(ctxm->cq_l2_entries);  in bnxt_hwrm_func_backing_store_cfg()
8488 		req->cq_entry_size = cpu_to_le16(ctxm->entry_size);  in bnxt_hwrm_func_backing_store_cfg()
8489 		bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,  in bnxt_hwrm_func_backing_store_cfg()
8490 				      &req->cq_pg_size_cq_lvl,  in bnxt_hwrm_func_backing_store_cfg()
8491 				      &req->cq_page_dir);  in bnxt_hwrm_func_backing_store_cfg()
8494 		ctxm = &ctx->ctx_arr[BNXT_CTX_VNIC];  in bnxt_hwrm_func_backing_store_cfg()
8495 		ctx_pg = ctxm->pg_info;  in bnxt_hwrm_func_backing_store_cfg()
8496 		req->vnic_num_vnic_entries = cpu_to_le16(ctxm->vnic_entries);  in bnxt_hwrm_func_backing_store_cfg()
8497 		req->vnic_num_ring_table_entries =  in bnxt_hwrm_func_backing_store_cfg()
8498 			cpu_to_le16(ctxm->max_entries - ctxm->vnic_entries);  in bnxt_hwrm_func_backing_store_cfg()
8499 		req->vnic_entry_size = cpu_to_le16(ctxm->entry_size);  in bnxt_hwrm_func_backing_store_cfg()
8500 		bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,  in bnxt_hwrm_func_backing_store_cfg()
8501 				      &req->vnic_pg_size_vnic_lvl,  in bnxt_hwrm_func_backing_store_cfg()
8502 				      &req->vnic_page_dir);  in bnxt_hwrm_func_backing_store_cfg()
8505 		ctxm = &ctx->ctx_arr[BNXT_CTX_STAT];  in bnxt_hwrm_func_backing_store_cfg()
8506 		ctx_pg = ctxm->pg_info;  in bnxt_hwrm_func_backing_store_cfg()
8507 		req->stat_num_entries = cpu_to_le32(ctxm->max_entries);  in bnxt_hwrm_func_backing_store_cfg()
8508 		req->stat_entry_size = cpu_to_le16(ctxm->entry_size);  in bnxt_hwrm_func_backing_store_cfg()
8509 		bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,  in bnxt_hwrm_func_backing_store_cfg()
8510 				      &req->stat_pg_size_stat_lvl,  in bnxt_hwrm_func_backing_store_cfg()
8511 				      &req->stat_page_dir);  in bnxt_hwrm_func_backing_store_cfg()
8516 		ctxm = &ctx->ctx_arr[BNXT_CTX_MRAV];  in bnxt_hwrm_func_backing_store_cfg()
8517 		ctx_pg = ctxm->pg_info;  in bnxt_hwrm_func_backing_store_cfg()
8518 		req->mrav_num_entries = cpu_to_le32(ctx_pg->entries);  in bnxt_hwrm_func_backing_store_cfg()
8519 		units = ctxm->mrav_num_entries_units;  in bnxt_hwrm_func_backing_store_cfg()
8521 			u32 num_mr, num_ah = ctxm->mrav_av_entries;  in bnxt_hwrm_func_backing_store_cfg()
8524 			num_mr = ctx_pg->entries - num_ah;  in bnxt_hwrm_func_backing_store_cfg()
8526 			req->mrav_num_entries = cpu_to_le32(entries);  in bnxt_hwrm_func_backing_store_cfg()
8529 		req->mrav_entry_size = cpu_to_le16(ctxm->entry_size);  in bnxt_hwrm_func_backing_store_cfg()
8530 		bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,  in bnxt_hwrm_func_backing_store_cfg()
8531 				      &req->mrav_pg_size_mrav_lvl,  in bnxt_hwrm_func_backing_store_cfg()
8532 				      &req->mrav_page_dir);  in bnxt_hwrm_func_backing_store_cfg()
8535 		ctxm = &ctx->ctx_arr[BNXT_CTX_TIM];  in bnxt_hwrm_func_backing_store_cfg()
8536 		ctx_pg = ctxm->pg_info;  in bnxt_hwrm_func_backing_store_cfg()
8537 		req->tim_num_entries = cpu_to_le32(ctx_pg->entries);  in bnxt_hwrm_func_backing_store_cfg()
8538 		req->tim_entry_size = cpu_to_le16(ctxm->entry_size);  in bnxt_hwrm_func_backing_store_cfg()
8539 		bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,  in bnxt_hwrm_func_backing_store_cfg()
8540 				      &req->tim_pg_size_tim_lvl,  in bnxt_hwrm_func_backing_store_cfg()
8541 				      &req->tim_page_dir);  in bnxt_hwrm_func_backing_store_cfg()
8543 	ctxm = &ctx->ctx_arr[BNXT_CTX_STQM];  in bnxt_hwrm_func_backing_store_cfg()
8544 	for (i = 0, num_entries = &req->tqm_sp_num_entries,  in bnxt_hwrm_func_backing_store_cfg()
8545 	     pg_attr = &req->tqm_sp_pg_size_tqm_sp_lvl,  in bnxt_hwrm_func_backing_store_cfg()
8546 	     pg_dir = &req->tqm_sp_page_dir,  in bnxt_hwrm_func_backing_store_cfg()
8548 	     ctx_pg = ctxm->pg_info;  in bnxt_hwrm_func_backing_store_cfg()
8550 	     ctx_pg = &ctx->ctx_arr[BNXT_CTX_FTQM].pg_info[i],  in bnxt_hwrm_func_backing_store_cfg()
8555 		req->tqm_entry_size = cpu_to_le16(ctxm->entry_size);  in bnxt_hwrm_func_backing_store_cfg()
8556 		*num_entries = cpu_to_le32(ctx_pg->entries);  in bnxt_hwrm_func_backing_store_cfg()
8557 		bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, pg_attr, pg_dir);  in bnxt_hwrm_func_backing_store_cfg()
8559 	req->flags = cpu_to_le32(flags);  in bnxt_hwrm_func_backing_store_cfg()
8566 	struct bnxt_ring_mem_info *rmem = &ctx_pg->ring_mem;  in bnxt_alloc_ctx_mem_blk()
8568 	rmem->page_size = BNXT_PAGE_SIZE;  in bnxt_alloc_ctx_mem_blk()
8569 	rmem->pg_arr = ctx_pg->ctx_pg_arr;  in bnxt_alloc_ctx_mem_blk()
8570 	rmem->dma_arr = ctx_pg->ctx_dma_arr;  in bnxt_alloc_ctx_mem_blk()
8571 	rmem->flags = BNXT_RMEM_VALID_PTE_FLAG;  in bnxt_alloc_ctx_mem_blk()
8572 	if (rmem->depth >= 1)  in bnxt_alloc_ctx_mem_blk()
8573 		rmem->flags |= BNXT_RMEM_USE_FULL_PAGE_FLAG;  in bnxt_alloc_ctx_mem_blk()
8581 	struct bnxt_ring_mem_info *rmem = &ctx_pg->ring_mem;  in bnxt_alloc_ctx_pg_tbls()
8585 		return -EINVAL;  in bnxt_alloc_ctx_pg_tbls()
8587 	ctx_pg->nr_pages = DIV_ROUND_UP(mem_size, BNXT_PAGE_SIZE);  in bnxt_alloc_ctx_pg_tbls()
8588 	if (ctx_pg->nr_pages > MAX_CTX_TOTAL_PAGES) {  in bnxt_alloc_ctx_pg_tbls()
8589 		ctx_pg->nr_pages = 0;  in bnxt_alloc_ctx_pg_tbls()
8590 		return -EINVAL;  in bnxt_alloc_ctx_pg_tbls()
8592 	if (ctx_pg->nr_pages > MAX_CTX_PAGES || depth > 1) {  in bnxt_alloc_ctx_pg_tbls()
8595 		rmem->depth = 2;  in bnxt_alloc_ctx_pg_tbls()
8596 		ctx_pg->ctx_pg_tbl = kcalloc(MAX_CTX_PAGES, sizeof(ctx_pg),  in bnxt_alloc_ctx_pg_tbls()
8598 		if (!ctx_pg->ctx_pg_tbl)  in bnxt_alloc_ctx_pg_tbls()
8599 			return -ENOMEM;  in bnxt_alloc_ctx_pg_tbls()
8600 		nr_tbls = DIV_ROUND_UP(ctx_pg->nr_pages, MAX_CTX_PAGES);  in bnxt_alloc_ctx_pg_tbls()
8601 		rmem->nr_pages = nr_tbls;  in bnxt_alloc_ctx_pg_tbls()
8610 				return -ENOMEM;  in bnxt_alloc_ctx_pg_tbls()
8611 			ctx_pg->ctx_pg_tbl[i] = pg_tbl;  in bnxt_alloc_ctx_pg_tbls()
8612 			rmem = &pg_tbl->ring_mem;  in bnxt_alloc_ctx_pg_tbls()
8613 			rmem->pg_tbl = ctx_pg->ctx_pg_arr[i];  in bnxt_alloc_ctx_pg_tbls()
8614 			rmem->pg_tbl_map = ctx_pg->ctx_dma_arr[i];  in bnxt_alloc_ctx_pg_tbls()
8615 			rmem->depth = 1;  in bnxt_alloc_ctx_pg_tbls()
8616 			rmem->nr_pages = MAX_CTX_PAGES;  in bnxt_alloc_ctx_pg_tbls()
8617 			rmem->ctx_mem = ctxm;  in bnxt_alloc_ctx_pg_tbls()
8618 			if (i == (nr_tbls - 1)) {  in bnxt_alloc_ctx_pg_tbls()
8619 				int rem = ctx_pg->nr_pages % MAX_CTX_PAGES;  in bnxt_alloc_ctx_pg_tbls()
8622 					rmem->nr_pages = rem;  in bnxt_alloc_ctx_pg_tbls()
8629 		rmem->nr_pages = DIV_ROUND_UP(mem_size, BNXT_PAGE_SIZE);  in bnxt_alloc_ctx_pg_tbls()
8630 		if (rmem->nr_pages > 1 || depth)  in bnxt_alloc_ctx_pg_tbls()
8631 			rmem->depth = 1;  in bnxt_alloc_ctx_pg_tbls()
8632 		rmem->ctx_mem = ctxm;  in bnxt_alloc_ctx_pg_tbls()
8641 	struct bnxt_ring_mem_info *rmem = &ctx_pg->ring_mem;  in bnxt_free_ctx_pg_tbls()
8643 	if (rmem->depth > 1 || ctx_pg->nr_pages > MAX_CTX_PAGES ||  in bnxt_free_ctx_pg_tbls()
8644 	    ctx_pg->ctx_pg_tbl) {  in bnxt_free_ctx_pg_tbls()
8645 		int i, nr_tbls = rmem->nr_pages;  in bnxt_free_ctx_pg_tbls()
8651 			pg_tbl = ctx_pg->ctx_pg_tbl[i];  in bnxt_free_ctx_pg_tbls()
8654 			rmem2 = &pg_tbl->ring_mem;  in bnxt_free_ctx_pg_tbls()
8656 			ctx_pg->ctx_pg_arr[i] = NULL;  in bnxt_free_ctx_pg_tbls()
8658 			ctx_pg->ctx_pg_tbl[i] = NULL;  in bnxt_free_ctx_pg_tbls()
8660 		kfree(ctx_pg->ctx_pg_tbl);  in bnxt_free_ctx_pg_tbls()
8661 		ctx_pg->ctx_pg_tbl = NULL;  in bnxt_free_ctx_pg_tbls()
8664 	ctx_pg->nr_pages = 0;  in bnxt_free_ctx_pg_tbls()
8671 	struct bnxt_ctx_pg_info *ctx_pg = ctxm->pg_info;  in bnxt_setup_ctxm_pg_tbls()
8675 	if (!ctxm->entry_size || !ctx_pg)  in bnxt_setup_ctxm_pg_tbls()
8676 		return -EINVAL;  in bnxt_setup_ctxm_pg_tbls()
8677 	if (ctxm->instance_bmap)  in bnxt_setup_ctxm_pg_tbls()
8678 		n = hweight32(ctxm->instance_bmap);  in bnxt_setup_ctxm_pg_tbls()
8679 	if (ctxm->entry_multiple)  in bnxt_setup_ctxm_pg_tbls()
8680 		entries = roundup(entries, ctxm->entry_multiple);  in bnxt_setup_ctxm_pg_tbls()
8681 	entries = clamp_t(u32, entries, ctxm->min_entries, ctxm->max_entries);  in bnxt_setup_ctxm_pg_tbls()
8682 	mem_size = entries * ctxm->entry_size;  in bnxt_setup_ctxm_pg_tbls()
8686 					    ctxm->init_value ? ctxm : NULL);  in bnxt_setup_ctxm_pg_tbls()
8696 	u32 instance_bmap = ctxm->instance_bmap;  in bnxt_hwrm_func_backing_store_cfg_v2()
8700 	if (!(ctxm->flags & BNXT_CTX_MEM_TYPE_VALID) || !ctxm->pg_info)  in bnxt_hwrm_func_backing_store_cfg_v2()
8704 		n = hweight32(ctxm->instance_bmap);  in bnxt_hwrm_func_backing_store_cfg_v2()
8712 	req->type = cpu_to_le16(ctxm->type);  in bnxt_hwrm_func_backing_store_cfg_v2()
8713 	req->entry_size = cpu_to_le16(ctxm->entry_size);  in bnxt_hwrm_func_backing_store_cfg_v2()
8714 	req->subtype_valid_cnt = ctxm->split_entry_cnt;  in bnxt_hwrm_func_backing_store_cfg_v2()
8715 	for (i = 0, p = &req->split_entry_0; i < ctxm->split_entry_cnt; i++)  in bnxt_hwrm_func_backing_store_cfg_v2()
8716 		p[i] = cpu_to_le32(ctxm->split[i]);  in bnxt_hwrm_func_backing_store_cfg_v2()
8722 		req->instance = cpu_to_le16(i);  in bnxt_hwrm_func_backing_store_cfg_v2()
8723 		ctx_pg = &ctxm->pg_info[j++];  in bnxt_hwrm_func_backing_store_cfg_v2()
8724 		if (!ctx_pg->entries)  in bnxt_hwrm_func_backing_store_cfg_v2()
8726 		req->num_entries = cpu_to_le32(ctx_pg->entries);  in bnxt_hwrm_func_backing_store_cfg_v2()
8727 		bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,  in bnxt_hwrm_func_backing_store_cfg_v2()
8728 				      &req->page_size_pbl_level,  in bnxt_hwrm_func_backing_store_cfg_v2()
8729 				      &req->page_dir);  in bnxt_hwrm_func_backing_store_cfg_v2()
8731 			req->flags =  in bnxt_hwrm_func_backing_store_cfg_v2()
8741 	struct bnxt_ctx_mem_info *ctx = bp->ctx;  in bnxt_backing_store_cfg_v2()
8750 		last_type = BNXT_CTX_MAX - 1;  in bnxt_backing_store_cfg_v2()
8752 		last_type = BNXT_CTX_L2_MAX - 1;  in bnxt_backing_store_cfg_v2()
8753 	ctx->ctx_arr[last_type].last = 1;  in bnxt_backing_store_cfg_v2()
8756 		ctxm = &ctx->ctx_arr[type];  in bnxt_backing_store_cfg_v2()
8758 		rc = bnxt_hwrm_func_backing_store_cfg_v2(bp, ctxm, ctxm->last);  in bnxt_backing_store_cfg_v2()
8767 	struct bnxt_ctx_mem_info *ctx = bp->ctx;  in bnxt_free_ctx_mem()
8774 		struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type];  in bnxt_free_ctx_mem()
8775 		struct bnxt_ctx_pg_info *ctx_pg = ctxm->pg_info;  in bnxt_free_ctx_mem()
8780 		if (ctxm->instance_bmap)  in bnxt_free_ctx_mem()
8781 			n = hweight32(ctxm->instance_bmap);  in bnxt_free_ctx_mem()
8786 		ctxm->pg_info = NULL;  in bnxt_free_ctx_mem()
8789 	ctx->flags &= ~BNXT_CTX_FLAG_INITED;  in bnxt_free_ctx_mem()
8791 	bp->ctx = NULL;  in bnxt_free_ctx_mem()
8810 		netdev_err(bp->dev, "Failed querying context mem capability, rc = %d.\n",  in bnxt_alloc_ctx_mem()
8814 	ctx = bp->ctx;  in bnxt_alloc_ctx_mem()
8815 	if (!ctx || (ctx->flags & BNXT_CTX_FLAG_INITED))  in bnxt_alloc_ctx_mem()
8818 	ctxm = &ctx->ctx_arr[BNXT_CTX_QP];  in bnxt_alloc_ctx_mem()
8819 	l2_qps = ctxm->qp_l2_entries;  in bnxt_alloc_ctx_mem()
8820 	qp1_qps = ctxm->qp_qp1_entries;  in bnxt_alloc_ctx_mem()
8821 	fast_qpmd_qps = ctxm->qp_fast_qpmd_entries;  in bnxt_alloc_ctx_mem()
8822 	max_qps = ctxm->max_entries;  in bnxt_alloc_ctx_mem()
8823 	ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ];  in bnxt_alloc_ctx_mem()
8824 	srqs = ctxm->srq_l2_entries;  in bnxt_alloc_ctx_mem()
8825 	max_srqs = ctxm->max_entries;  in bnxt_alloc_ctx_mem()
8827 	if ((bp->flags & BNXT_FLAG_ROCE_CAP) && !is_kdump_kernel()) {  in bnxt_alloc_ctx_mem()
8829 		extra_qps = min_t(u32, 65536, max_qps - l2_qps - qp1_qps);  in bnxt_alloc_ctx_mem()
8832 		extra_srqs = min_t(u32, 8192, max_srqs - srqs);  in bnxt_alloc_ctx_mem()
8837 	ctxm = &ctx->ctx_arr[BNXT_CTX_QP];  in bnxt_alloc_ctx_mem()
8843 	ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ];  in bnxt_alloc_ctx_mem()
8848 	ctxm = &ctx->ctx_arr[BNXT_CTX_CQ];  in bnxt_alloc_ctx_mem()
8849 	rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, ctxm->cq_l2_entries +  in bnxt_alloc_ctx_mem()
8854 	ctxm = &ctx->ctx_arr[BNXT_CTX_VNIC];  in bnxt_alloc_ctx_mem()
8855 	rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, ctxm->max_entries, 1);  in bnxt_alloc_ctx_mem()
8859 	ctxm = &ctx->ctx_arr[BNXT_CTX_STAT];  in bnxt_alloc_ctx_mem()
8860 	rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, ctxm->max_entries, 1);  in bnxt_alloc_ctx_mem()
8864 	if (!(bp->flags & BNXT_FLAG_ROCE_CAP))  in bnxt_alloc_ctx_mem()
8867 	ctxm = &ctx->ctx_arr[BNXT_CTX_MRAV];  in bnxt_alloc_ctx_mem()
8871 	num_mr = min_t(u32, ctxm->max_entries / 2, 1024 * 256);  in bnxt_alloc_ctx_mem()
8873 	ctxm->split_entry_cnt = BNXT_CTX_MRAV_AV_SPLIT_ENTRY + 1;  in bnxt_alloc_ctx_mem()
8874 	if (!ctxm->mrav_av_entries || ctxm->mrav_av_entries > num_ah)  in bnxt_alloc_ctx_mem()
8875 		ctxm->mrav_av_entries = num_ah;  in bnxt_alloc_ctx_mem()
8882 	ctxm = &ctx->ctx_arr[BNXT_CTX_TIM];  in bnxt_alloc_ctx_mem()
8889 	ctxm = &ctx->ctx_arr[BNXT_CTX_STQM];  in bnxt_alloc_ctx_mem()
8890 	min = ctxm->min_entries;  in bnxt_alloc_ctx_mem()
8891 	entries_sp = ctx->ctx_arr[BNXT_CTX_VNIC].vnic_entries + l2_qps +  in bnxt_alloc_ctx_mem()
8897 	ctxm = &ctx->ctx_arr[BNXT_CTX_FTQM];  in bnxt_alloc_ctx_mem()
8902 	for (i = 0; i < ctx->tqm_fp_rings_count + 1; i++)  in bnxt_alloc_ctx_mem()
8906 	if (bp->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2)  in bnxt_alloc_ctx_mem()
8911 		netdev_err(bp->dev, "Failed configuring context mem, rc = %d.\n",  in bnxt_alloc_ctx_mem()
8915 	ctx->flags |= BNXT_CTX_FLAG_INITED;  in bnxt_alloc_ctx_mem()
8925 	if (!(bp->fw_dbg_cap & DBG_QCAPS_RESP_FLAGS_CRASHDUMP_HOST_DDR))  in bnxt_hwrm_crash_dump_mem_cfg()
8938 	req->pg_size_lvl = cpu_to_le16(page_attr |  in bnxt_hwrm_crash_dump_mem_cfg()
8939 				       bp->fw_crash_mem->ring_mem.depth);  in bnxt_hwrm_crash_dump_mem_cfg()
8940 	req->pbl = cpu_to_le64(bp->fw_crash_mem->ring_mem.pg_tbl_map);  in bnxt_hwrm_crash_dump_mem_cfg()
8941 	req->size = cpu_to_le32(bp->fw_crash_len);  in bnxt_hwrm_crash_dump_mem_cfg()
8942 	req->output_dest_flags = cpu_to_le16(BNXT_DBG_CR_DUMP_MDM_CFG_DDR);  in bnxt_hwrm_crash_dump_mem_cfg()
8948 	if (bp->fw_crash_mem) {  in bnxt_free_crash_dump_mem()
8949 		bnxt_free_ctx_pg_tbls(bp, bp->fw_crash_mem);  in bnxt_free_crash_dump_mem()
8950 		kfree(bp->fw_crash_mem);  in bnxt_free_crash_dump_mem()
8951 		bp->fw_crash_mem = NULL;  in bnxt_free_crash_dump_mem()
8960 	if (!(bp->fw_dbg_cap & DBG_QCAPS_RESP_FLAGS_CRASHDUMP_HOST_DDR))  in bnxt_alloc_crash_dump_mem()
8970 	if (bp->fw_crash_mem &&  in bnxt_alloc_crash_dump_mem()
8971 	    mem_size <= bp->fw_crash_mem->nr_pages * BNXT_PAGE_SIZE)  in bnxt_alloc_crash_dump_mem()
8974 	if (bp->fw_crash_mem)  in bnxt_alloc_crash_dump_mem()
8975 		bnxt_free_ctx_pg_tbls(bp, bp->fw_crash_mem);  in bnxt_alloc_crash_dump_mem()
8977 		bp->fw_crash_mem = kzalloc(sizeof(*bp->fw_crash_mem),  in bnxt_alloc_crash_dump_mem()
8979 	if (!bp->fw_crash_mem)  in bnxt_alloc_crash_dump_mem()
8980 		return -ENOMEM;  in bnxt_alloc_crash_dump_mem()
8982 	rc = bnxt_alloc_ctx_pg_tbls(bp, bp->fw_crash_mem, mem_size, 1, NULL);  in bnxt_alloc_crash_dump_mem()
8989 	bp->fw_crash_len = mem_size;  in bnxt_alloc_crash_dump_mem()
8997 	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;  in bnxt_hwrm_func_resc_qcaps()
9004 	req->fid = cpu_to_le16(0xffff);  in bnxt_hwrm_func_resc_qcaps()
9010 	hw_resc->max_tx_sch_inputs = le16_to_cpu(resp->max_tx_scheduler_inputs);  in bnxt_hwrm_func_resc_qcaps()
9014 	hw_resc->min_rsscos_ctxs = le16_to_cpu(resp->min_rsscos_ctx);  in bnxt_hwrm_func_resc_qcaps()
9015 	hw_resc->max_rsscos_ctxs = le16_to_cpu(resp->max_rsscos_ctx);  in bnxt_hwrm_func_resc_qcaps()
9016 	hw_resc->min_cp_rings = le16_to_cpu(resp->min_cmpl_rings);  in bnxt_hwrm_func_resc_qcaps()
9017 	hw_resc->max_cp_rings = le16_to_cpu(resp->max_cmpl_rings);  in bnxt_hwrm_func_resc_qcaps()
9018 	hw_resc->min_tx_rings = le16_to_cpu(resp->min_tx_rings);  in bnxt_hwrm_func_resc_qcaps()
9019 	hw_resc->max_tx_rings = le16_to_cpu(resp->max_tx_rings);  in bnxt_hwrm_func_resc_qcaps()
9020 	hw_resc->min_rx_rings = le16_to_cpu(resp->min_rx_rings);  in bnxt_hwrm_func_resc_qcaps()
9021 	hw_resc->max_rx_rings = le16_to_cpu(resp->max_rx_rings);  in bnxt_hwrm_func_resc_qcaps()
9022 	hw_resc->min_hw_ring_grps = le16_to_cpu(resp->min_hw_ring_grps);  in bnxt_hwrm_func_resc_qcaps()
9023 	hw_resc->max_hw_ring_grps = le16_to_cpu(resp->max_hw_ring_grps);  in bnxt_hwrm_func_resc_qcaps()
9024 	hw_resc->min_l2_ctxs = le16_to_cpu(resp->min_l2_ctxs);  in bnxt_hwrm_func_resc_qcaps()
9025 	hw_resc->max_l2_ctxs = le16_to_cpu(resp->max_l2_ctxs);  in bnxt_hwrm_func_resc_qcaps()
9026 	hw_resc->min_vnics = le16_to_cpu(resp->min_vnics);  in bnxt_hwrm_func_resc_qcaps()
9027 	hw_resc->max_vnics = le16_to_cpu(resp->max_vnics);  in bnxt_hwrm_func_resc_qcaps()
9028 	hw_resc->min_stat_ctxs = le16_to_cpu(resp->min_stat_ctx);  in bnxt_hwrm_func_resc_qcaps()
9029 	hw_resc->max_stat_ctxs = le16_to_cpu(resp->max_stat_ctx);  in bnxt_hwrm_func_resc_qcaps()
9031 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_hwrm_func_resc_qcaps()
9032 		u16 max_msix = le16_to_cpu(resp->max_msix);  in bnxt_hwrm_func_resc_qcaps()
9034 		hw_resc->max_nqs = max_msix;  in bnxt_hwrm_func_resc_qcaps()
9035 		hw_resc->max_hw_ring_grps = hw_resc->max_rx_rings;  in bnxt_hwrm_func_resc_qcaps()
9039 		struct bnxt_pf_info *pf = &bp->pf;  in bnxt_hwrm_func_resc_qcaps()
9041 		pf->vf_resv_strategy =  in bnxt_hwrm_func_resc_qcaps()
9042 			le16_to_cpu(resp->vf_reservation_strategy);  in bnxt_hwrm_func_resc_qcaps()
9043 		if (pf->vf_resv_strategy > BNXT_VF_RESV_STRATEGY_MINIMAL_STATIC)  in bnxt_hwrm_func_resc_qcaps()
9044 			pf->vf_resv_strategy = BNXT_VF_RESV_STRATEGY_MAXIMAL;  in bnxt_hwrm_func_resc_qcaps()
9055 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;  in __bnxt_hwrm_ptp_qcfg()
9060 	if (bp->hwrm_spec_code < 0x10801 || !BNXT_CHIP_P5_PLUS(bp)) {  in __bnxt_hwrm_ptp_qcfg()
9061 		rc = -ENODEV;  in __bnxt_hwrm_ptp_qcfg()
9069 	req->port_id = cpu_to_le16(bp->pf.port_id);  in __bnxt_hwrm_ptp_qcfg()
9075 	flags = resp->flags;  in __bnxt_hwrm_ptp_qcfg()
9078 		rc = -ENODEV;  in __bnxt_hwrm_ptp_qcfg()
9084 			rc = -ENOMEM;  in __bnxt_hwrm_ptp_qcfg()
9087 		ptp->bp = bp;  in __bnxt_hwrm_ptp_qcfg()
9088 		bp->ptp_cfg = ptp;  in __bnxt_hwrm_ptp_qcfg()
9094 		ptp->refclk_regs[0] = le32_to_cpu(resp->ts_ref_clock_reg_lower);  in __bnxt_hwrm_ptp_qcfg()
9095 		ptp->refclk_regs[1] = le32_to_cpu(resp->ts_ref_clock_reg_upper);  in __bnxt_hwrm_ptp_qcfg()
9097 		ptp->refclk_regs[0] = BNXT_TS_REG_TIMESYNC_TS0_LOWER;  in __bnxt_hwrm_ptp_qcfg()
9098 		ptp->refclk_regs[1] = BNXT_TS_REG_TIMESYNC_TS0_UPPER;  in __bnxt_hwrm_ptp_qcfg()
9100 		rc = -ENODEV;  in __bnxt_hwrm_ptp_qcfg()
9106 		netdev_warn(bp->dev, "PTP initialization failed.\n");  in __bnxt_hwrm_ptp_qcfg()
9115 	bp->ptp_cfg = NULL;  in __bnxt_hwrm_ptp_qcfg()
9123 	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;  in __bnxt_hwrm_func_qcaps()
9131 	req->fid = cpu_to_le16(0xffff);  in __bnxt_hwrm_func_qcaps()
9137 	flags = le32_to_cpu(resp->flags);  in __bnxt_hwrm_func_qcaps()
9139 		bp->flags |= BNXT_FLAG_ROCEV1_CAP;  in __bnxt_hwrm_func_qcaps()
9141 		bp->flags |= BNXT_FLAG_ROCEV2_CAP;  in __bnxt_hwrm_func_qcaps()
9143 		bp->fw_cap |= BNXT_FW_CAP_PCIE_STATS_SUPPORTED;  in __bnxt_hwrm_func_qcaps()
9145 		bp->fw_cap |= BNXT_FW_CAP_HOT_RESET;  in __bnxt_hwrm_func_qcaps()
9147 		bp->fw_cap |= BNXT_FW_CAP_EXT_STATS_SUPPORTED;  in __bnxt_hwrm_func_qcaps()
9149 		bp->fw_cap |= BNXT_FW_CAP_ERROR_RECOVERY;  in __bnxt_hwrm_func_qcaps()
9151 		bp->fw_cap |= BNXT_FW_CAP_ERR_RECOVER_RELOAD;  in __bnxt_hwrm_func_qcaps()
9153 		bp->fw_cap |= BNXT_FW_CAP_VLAN_TX_INSERT;  in __bnxt_hwrm_func_qcaps()
9155 		bp->fw_cap |= BNXT_FW_CAP_DBG_QCAPS;  in __bnxt_hwrm_func_qcaps()
9157 	flags_ext = le32_to_cpu(resp->flags_ext);  in __bnxt_hwrm_func_qcaps()
9159 		bp->fw_cap |= BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED;  in __bnxt_hwrm_func_qcaps()
9161 		bp->fw_cap |= BNXT_FW_CAP_PTP_PPS;  in __bnxt_hwrm_func_qcaps()
9163 		bp->fw_cap |= BNXT_FW_CAP_PTP_RTC;  in __bnxt_hwrm_func_qcaps()
9165 		bp->fw_cap |= BNXT_FW_CAP_HOT_RESET_IF;  in __bnxt_hwrm_func_qcaps()
9167 		bp->fw_cap |= BNXT_FW_CAP_LIVEPATCH;  in __bnxt_hwrm_func_qcaps()
9169 		bp->fw_cap |= BNXT_FW_CAP_DFLT_VLAN_TPID_PCP;  in __bnxt_hwrm_func_qcaps()
9171 		bp->fw_cap |= BNXT_FW_CAP_BACKING_STORE_V2;  in __bnxt_hwrm_func_qcaps()
9173 		bp->flags |= BNXT_FLAG_TX_COAL_CMPL;  in __bnxt_hwrm_func_qcaps()
9175 	flags_ext2 = le32_to_cpu(resp->flags_ext2);  in __bnxt_hwrm_func_qcaps()
9177 		bp->fw_cap |= BNXT_FW_CAP_RX_ALL_PKT_TS;  in __bnxt_hwrm_func_qcaps()
9179 		bp->flags |= BNXT_FLAG_UDP_GSO_CAP;  in __bnxt_hwrm_func_qcaps()
9181 		bp->fw_cap |= BNXT_FW_CAP_TX_TS_CMP;  in __bnxt_hwrm_func_qcaps()
9183 	bp->tx_push_thresh = 0;  in __bnxt_hwrm_func_qcaps()
9186 		bp->tx_push_thresh = BNXT_TX_PUSH_THRESH;  in __bnxt_hwrm_func_qcaps()
9188 	hw_resc->max_rsscos_ctxs = le16_to_cpu(resp->max_rsscos_ctx);  in __bnxt_hwrm_func_qcaps()
9189 	hw_resc->max_cp_rings = le16_to_cpu(resp->max_cmpl_rings);  in __bnxt_hwrm_func_qcaps()
9190 	hw_resc->max_tx_rings = le16_to_cpu(resp->max_tx_rings);  in __bnxt_hwrm_func_qcaps()
9191 	hw_resc->max_rx_rings = le16_to_cpu(resp->max_rx_rings);  in __bnxt_hwrm_func_qcaps()
9192 	hw_resc->max_hw_ring_grps = le32_to_cpu(resp->max_hw_ring_grps);  in __bnxt_hwrm_func_qcaps()
9193 	if (!hw_resc->max_hw_ring_grps)  in __bnxt_hwrm_func_qcaps()
9194 		hw_resc->max_hw_ring_grps = hw_resc->max_tx_rings;  in __bnxt_hwrm_func_qcaps()
9195 	hw_resc->max_l2_ctxs = le16_to_cpu(resp->max_l2_ctxs);  in __bnxt_hwrm_func_qcaps()
9196 	hw_resc->max_vnics = le16_to_cpu(resp->max_vnics);  in __bnxt_hwrm_func_qcaps()
9197 	hw_resc->max_stat_ctxs = le16_to_cpu(resp->max_stat_ctx);  in __bnxt_hwrm_func_qcaps()
9199 	hw_resc->max_encap_records = le32_to_cpu(resp->max_encap_records);  in __bnxt_hwrm_func_qcaps()
9200 	hw_resc->max_decap_records = le32_to_cpu(resp->max_decap_records);  in __bnxt_hwrm_func_qcaps()
9201 	hw_resc->max_tx_em_flows = le32_to_cpu(resp->max_tx_em_flows);  in __bnxt_hwrm_func_qcaps()
9202 	hw_resc->max_tx_wm_flows = le32_to_cpu(resp->max_tx_wm_flows);  in __bnxt_hwrm_func_qcaps()
9203 	hw_resc->max_rx_em_flows = le32_to_cpu(resp->max_rx_em_flows);  in __bnxt_hwrm_func_qcaps()
9204 	hw_resc->max_rx_wm_flows = le32_to_cpu(resp->max_rx_wm_flows);  in __bnxt_hwrm_func_qcaps()
9207 		struct bnxt_pf_info *pf = &bp->pf;  in __bnxt_hwrm_func_qcaps()
9209 		pf->fw_fid = le16_to_cpu(resp->fid);  in __bnxt_hwrm_func_qcaps()
9210 		pf->port_id = le16_to_cpu(resp->port_id);  in __bnxt_hwrm_func_qcaps()
9211 		memcpy(pf->mac_addr, resp->mac_address, ETH_ALEN);  in __bnxt_hwrm_func_qcaps()
9212 		pf->first_vf_id = le16_to_cpu(resp->first_vf_id);  in __bnxt_hwrm_func_qcaps()
9213 		pf->max_vfs = le16_to_cpu(resp->max_vfs);  in __bnxt_hwrm_func_qcaps()
9214 		bp->flags &= ~BNXT_FLAG_WOL_CAP;  in __bnxt_hwrm_func_qcaps()
9216 			bp->flags |= BNXT_FLAG_WOL_CAP;  in __bnxt_hwrm_func_qcaps()
9218 			bp->fw_cap |= BNXT_FW_CAP_PTP;  in __bnxt_hwrm_func_qcaps()
9221 			kfree(bp->ptp_cfg);  in __bnxt_hwrm_func_qcaps()
9222 			bp->ptp_cfg = NULL;  in __bnxt_hwrm_func_qcaps()
9226 		struct bnxt_vf_info *vf = &bp->vf;  in __bnxt_hwrm_func_qcaps()
9228 		vf->fw_fid = le16_to_cpu(resp->fid);  in __bnxt_hwrm_func_qcaps()
9229 		memcpy(vf->mac_addr, resp->mac_address, ETH_ALEN);  in __bnxt_hwrm_func_qcaps()
9232 	bp->tso_max_segs = le16_to_cpu(resp->max_tso_segs);  in __bnxt_hwrm_func_qcaps()
9245 	bp->fw_dbg_cap = 0;  in bnxt_hwrm_dbg_qcaps()
9246 	if (!(bp->fw_cap & BNXT_FW_CAP_DBG_QCAPS))  in bnxt_hwrm_dbg_qcaps()
9253 	req->fid = cpu_to_le16(0xffff);  in bnxt_hwrm_dbg_qcaps()
9259 	bp->fw_dbg_cap = le32_to_cpu(resp->flags);  in bnxt_hwrm_dbg_qcaps()
9279 		netdev_err(bp->dev, "hwrm query qportcfg failure rc: %d\n", rc);  in bnxt_hwrm_func_qcaps()
9282 	if (bp->hwrm_spec_code >= 0x10803) {  in bnxt_hwrm_func_qcaps()
9288 			bp->fw_cap |= BNXT_FW_CAP_NEW_RM;  in bnxt_hwrm_func_qcaps()
9300 	if (!(bp->fw_cap & BNXT_FW_CAP_CFA_ADV_FLOW))  in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9312 	flags = le32_to_cpu(resp->flags);  in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9315 		bp->fw_cap |= BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V2;  in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9319 		bp->fw_cap |= BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V3;  in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9323 		bp->fw_cap |= BNXT_FW_CAP_CFA_NTUPLE_RX_EXT_IP_PROTO;  in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9332 	if (bp->fw_health)  in __bnxt_alloc_fw_health()
9335 	bp->fw_health = kzalloc(sizeof(*bp->fw_health), GFP_KERNEL);  in __bnxt_alloc_fw_health()
9336 	if (!bp->fw_health)  in __bnxt_alloc_fw_health()
9337 		return -ENOMEM;  in __bnxt_alloc_fw_health()
9339 	mutex_init(&bp->fw_health->lock);  in __bnxt_alloc_fw_health()
9347 	if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET) &&  in bnxt_alloc_fw_health()
9348 	    !(bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY))  in bnxt_alloc_fw_health()
9353 		bp->fw_cap &= ~BNXT_FW_CAP_HOT_RESET;  in bnxt_alloc_fw_health()
9354 		bp->fw_cap &= ~BNXT_FW_CAP_ERROR_RECOVERY;  in bnxt_alloc_fw_health()
9363 	writel(reg & BNXT_GRC_BASE_MASK, bp->bar0 +  in __bnxt_map_fw_health_reg()
9370 	struct bnxt_fw_health *fw_health = bp->fw_health;  in bnxt_inv_fw_health_reg()
9376 	reg_type = BNXT_FW_HEALTH_REG_TYPE(fw_health->regs[BNXT_FW_HEALTH_REG]);  in bnxt_inv_fw_health_reg()
9378 		fw_health->status_reliable = false;  in bnxt_inv_fw_health_reg()
9380 	reg_type = BNXT_FW_HEALTH_REG_TYPE(fw_health->regs[BNXT_FW_RESET_CNT_REG]);  in bnxt_inv_fw_health_reg()
9382 		fw_health->resets_reliable = false;  in bnxt_inv_fw_health_reg()
9387 	void __iomem *hs;  in bnxt_try_map_fw_health_reg()  local
9392 	if (bp->fw_health)  in bnxt_try_map_fw_health_reg()
9393 		bp->fw_health->status_reliable = false;  in bnxt_try_map_fw_health_reg()
9396 	hs = bp->bar0 + BNXT_FW_HEALTH_WIN_OFF(HCOMM_STATUS_STRUCT_LOC);  in bnxt_try_map_fw_health_reg()
9398 	sig = readl(hs + offsetof(struct hcomm_status, sig_ver));  in bnxt_try_map_fw_health_reg()
9400 		if (!bp->chip_num) {  in bnxt_try_map_fw_health_reg()
9402 			bp->chip_num = readl(bp->bar0 +  in bnxt_try_map_fw_health_reg()
9412 		status_loc = readl(hs + offsetof(struct hcomm_status,  in bnxt_try_map_fw_health_reg()
9417 		netdev_warn(bp->dev, "no memory for firmware status checks\n");  in bnxt_try_map_fw_health_reg()
9421 	bp->fw_health->regs[BNXT_FW_HEALTH_REG] = status_loc;  in bnxt_try_map_fw_health_reg()
9425 		bp->fw_health->mapped_regs[BNXT_FW_HEALTH_REG] =  in bnxt_try_map_fw_health_reg()
9429 	bp->fw_health->status_reliable = true;  in bnxt_try_map_fw_health_reg()
9434 	struct bnxt_fw_health *fw_health = bp->fw_health;  in bnxt_map_fw_health_regs()
9438 	bp->fw_health->status_reliable = false;  in bnxt_map_fw_health_regs()
9439 	bp->fw_health->resets_reliable = false;  in bnxt_map_fw_health_regs()
9440 	/* Only pre-map the monitoring GRC registers using window 3 */  in bnxt_map_fw_health_regs()
9442 		u32 reg = fw_health->regs[i];  in bnxt_map_fw_health_regs()
9449 			return -ERANGE;  in bnxt_map_fw_health_regs()
9450 		fw_health->mapped_regs[i] = BNXT_FW_HEALTH_WIN_OFF(reg);  in bnxt_map_fw_health_regs()
9452 	bp->fw_health->status_reliable = true;  in bnxt_map_fw_health_regs()
9453 	bp->fw_health->resets_reliable = true;  in bnxt_map_fw_health_regs()
9463 	if (!bp->fw_health)  in bnxt_remap_fw_health_regs()
9466 	if (bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY) {  in bnxt_remap_fw_health_regs()
9467 		bp->fw_health->status_reliable = true;  in bnxt_remap_fw_health_regs()
9468 		bp->fw_health->resets_reliable = true;  in bnxt_remap_fw_health_regs()
9476 	struct bnxt_fw_health *fw_health = bp->fw_health;  in bnxt_hwrm_error_recovery_qcfg()
9481 	if (!(bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY))  in bnxt_hwrm_error_recovery_qcfg()
9492 	fw_health->flags = le32_to_cpu(resp->flags);  in bnxt_hwrm_error_recovery_qcfg()
9493 	if ((fw_health->flags & ERROR_RECOVERY_QCFG_RESP_FLAGS_CO_CPU) &&  in bnxt_hwrm_error_recovery_qcfg()
9494 	    !(bp->fw_cap & BNXT_FW_CAP_KONG_MB_CHNL)) {  in bnxt_hwrm_error_recovery_qcfg()
9495 		rc = -EINVAL;  in bnxt_hwrm_error_recovery_qcfg()
9498 	fw_health->polling_dsecs = le32_to_cpu(resp->driver_polling_freq);  in bnxt_hwrm_error_recovery_qcfg()
9499 	fw_health->master_func_wait_dsecs =  in bnxt_hwrm_error_recovery_qcfg()
9500 		le32_to_cpu(resp->master_func_wait_period);  in bnxt_hwrm_error_recovery_qcfg()
9501 	fw_health->normal_func_wait_dsecs =  in bnxt_hwrm_error_recovery_qcfg()
9502 		le32_to_cpu(resp->normal_func_wait_period);  in bnxt_hwrm_error_recovery_qcfg()
9503 	fw_health->post_reset_wait_dsecs =  in bnxt_hwrm_error_recovery_qcfg()
9504 		le32_to_cpu(resp->master_func_wait_period_after_reset);  in bnxt_hwrm_error_recovery_qcfg()
9505 	fw_health->post_reset_max_wait_dsecs =  in bnxt_hwrm_error_recovery_qcfg()
9506 		le32_to_cpu(resp->max_bailout_time_after_reset);  in bnxt_hwrm_error_recovery_qcfg()
9507 	fw_health->regs[BNXT_FW_HEALTH_REG] =  in bnxt_hwrm_error_recovery_qcfg()
9508 		le32_to_cpu(resp->fw_health_status_reg);  in bnxt_hwrm_error_recovery_qcfg()
9509 	fw_health->regs[BNXT_FW_HEARTBEAT_REG] =  in bnxt_hwrm_error_recovery_qcfg()
9510 		le32_to_cpu(resp->fw_heartbeat_reg);  in bnxt_hwrm_error_recovery_qcfg()
9511 	fw_health->regs[BNXT_FW_RESET_CNT_REG] =  in bnxt_hwrm_error_recovery_qcfg()
9512 		le32_to_cpu(resp->fw_reset_cnt_reg);  in bnxt_hwrm_error_recovery_qcfg()
9513 	fw_health->regs[BNXT_FW_RESET_INPROG_REG] =  in bnxt_hwrm_error_recovery_qcfg()
9514 		le32_to_cpu(resp->reset_inprogress_reg);  in bnxt_hwrm_error_recovery_qcfg()
9515 	fw_health->fw_reset_inprog_reg_mask =  in bnxt_hwrm_error_recovery_qcfg()
9516 		le32_to_cpu(resp->reset_inprogress_reg_mask);  in bnxt_hwrm_error_recovery_qcfg()
9517 	fw_health->fw_reset_seq_cnt = resp->reg_array_cnt;  in bnxt_hwrm_error_recovery_qcfg()
9518 	if (fw_health->fw_reset_seq_cnt >= 16) {  in bnxt_hwrm_error_recovery_qcfg()
9519 		rc = -EINVAL;  in bnxt_hwrm_error_recovery_qcfg()
9522 	for (i = 0; i < fw_health->fw_reset_seq_cnt; i++) {  in bnxt_hwrm_error_recovery_qcfg()
9523 		fw_health->fw_reset_seq_regs[i] =  in bnxt_hwrm_error_recovery_qcfg()
9524 			le32_to_cpu(resp->reset_reg[i]);  in bnxt_hwrm_error_recovery_qcfg()
9525 		fw_health->fw_reset_seq_vals[i] =  in bnxt_hwrm_error_recovery_qcfg()
9526 			le32_to_cpu(resp->reset_reg_val[i]);  in bnxt_hwrm_error_recovery_qcfg()
9527 		fw_health->fw_reset_seq_delay_msec[i] =  in bnxt_hwrm_error_recovery_qcfg()
9528 			resp->delay_after_reset[i];  in bnxt_hwrm_error_recovery_qcfg()
9535 		bp->fw_cap &= ~BNXT_FW_CAP_ERROR_RECOVERY;  in bnxt_hwrm_error_recovery_qcfg()
9548 	req->enables = 0;  in bnxt_hwrm_func_reset()
9558 		snprintf(bp->nvm_cfg_ver, FW_VER_STR_LEN, "%d.%d.%d",  in bnxt_nvm_cfg_ver_get()
9580 	if (!resp->max_configurable_queues) {  in bnxt_hwrm_queue_qportcfg()
9581 		rc = -EINVAL;  in bnxt_hwrm_queue_qportcfg()
9584 	bp->max_tc = resp->max_configurable_queues;  in bnxt_hwrm_queue_qportcfg()
9585 	bp->max_lltc = resp->max_configurable_lossless_queues;  in bnxt_hwrm_queue_qportcfg()
9586 	if (bp->max_tc > BNXT_MAX_QUEUE)  in bnxt_hwrm_queue_qportcfg()
9587 		bp->max_tc = BNXT_MAX_QUEUE;  in bnxt_hwrm_queue_qportcfg()
9589 	no_rdma = !(bp->flags & BNXT_FLAG_ROCE_CAP);  in bnxt_hwrm_queue_qportcfg()
9590 	qptr = &resp->queue_id0;  in bnxt_hwrm_queue_qportcfg()
9591 	for (i = 0, j = 0; i < bp->max_tc; i++) {  in bnxt_hwrm_queue_qportcfg()
9592 		bp->q_info[j].queue_id = *qptr;  in bnxt_hwrm_queue_qportcfg()
9593 		bp->q_ids[i] = *qptr++;  in bnxt_hwrm_queue_qportcfg()
9594 		bp->q_info[j].queue_profile = *qptr++;  in bnxt_hwrm_queue_qportcfg()
9595 		bp->tc_to_qidx[j] = j;  in bnxt_hwrm_queue_qportcfg()
9596 		if (!BNXT_CNPQ(bp->q_info[j].queue_profile) ||  in bnxt_hwrm_queue_qportcfg()
9600 	bp->max_q = bp->max_tc;  in bnxt_hwrm_queue_qportcfg()
9601 	bp->max_tc = max_t(u8, j, 1);  in bnxt_hwrm_queue_qportcfg()
9603 	if (resp->queue_cfg_info & QUEUE_QPORTCFG_RESP_QUEUE_CFG_INFO_ASYM_CFG)  in bnxt_hwrm_queue_qportcfg()
9604 		bp->max_tc = 1;  in bnxt_hwrm_queue_qportcfg()
9606 	if (bp->max_lltc > bp->max_tc)  in bnxt_hwrm_queue_qportcfg()
9607 		bp->max_lltc = bp->max_tc;  in bnxt_hwrm_queue_qportcfg()
9623 	req->hwrm_intf_maj = HWRM_VERSION_MAJOR;  in bnxt_hwrm_poll()
9624 	req->hwrm_intf_min = HWRM_VERSION_MINOR;  in bnxt_hwrm_poll()
9625 	req->hwrm_intf_upd = HWRM_VERSION_UPDATE;  in bnxt_hwrm_poll()
9645 	bp->hwrm_max_req_len = HWRM_MAX_REQ_LEN;  in bnxt_hwrm_ver_get()
9646 	req->hwrm_intf_maj = HWRM_VERSION_MAJOR;  in bnxt_hwrm_ver_get()
9647 	req->hwrm_intf_min = HWRM_VERSION_MINOR;  in bnxt_hwrm_ver_get()
9648 	req->hwrm_intf_upd = HWRM_VERSION_UPDATE;  in bnxt_hwrm_ver_get()
9655 	memcpy(&bp->ver_resp, resp, sizeof(struct hwrm_ver_get_output));  in bnxt_hwrm_ver_get()
9657 	bp->hwrm_spec_code = resp->hwrm_intf_maj_8b << 16 |  in bnxt_hwrm_ver_get()
9658 			     resp->hwrm_intf_min_8b << 8 |  in bnxt_hwrm_ver_get()
9659 			     resp->hwrm_intf_upd_8b;  in bnxt_hwrm_ver_get()
9660 	if (resp->hwrm_intf_maj_8b < 1) {  in bnxt_hwrm_ver_get()
9661 		netdev_warn(bp->dev, "HWRM interface %d.%d.%d is older than 1.0.0.\n",  in bnxt_hwrm_ver_get()
9662 			    resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b,  in bnxt_hwrm_ver_get()
9663 			    resp->hwrm_intf_upd_8b);  in bnxt_hwrm_ver_get()
9664 		netdev_warn(bp->dev, "Please update firmware with HWRM interface 1.0.0 or newer.\n");  in bnxt_hwrm_ver_get()
9670 	if (bp->hwrm_spec_code > hwrm_ver)  in bnxt_hwrm_ver_get()
9671 		snprintf(bp->hwrm_ver_supp, FW_VER_STR_LEN, "%d.%d.%d",  in bnxt_hwrm_ver_get()
9675 		snprintf(bp->hwrm_ver_supp, FW_VER_STR_LEN, "%d.%d.%d",  in bnxt_hwrm_ver_get()
9676 			 resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b,  in bnxt_hwrm_ver_get()
9677 			 resp->hwrm_intf_upd_8b);  in bnxt_hwrm_ver_get()
9679 	fw_maj = le16_to_cpu(resp->hwrm_fw_major);  in bnxt_hwrm_ver_get()
9680 	if (bp->hwrm_spec_code > 0x10803 && fw_maj) {  in bnxt_hwrm_ver_get()
9681 		fw_min = le16_to_cpu(resp->hwrm_fw_minor);  in bnxt_hwrm_ver_get()
9682 		fw_bld = le16_to_cpu(resp->hwrm_fw_build);  in bnxt_hwrm_ver_get()
9683 		fw_rsv = le16_to_cpu(resp->hwrm_fw_patch);  in bnxt_hwrm_ver_get()
9686 		fw_maj = resp->hwrm_fw_maj_8b;  in bnxt_hwrm_ver_get()
9687 		fw_min = resp->hwrm_fw_min_8b;  in bnxt_hwrm_ver_get()
9688 		fw_bld = resp->hwrm_fw_bld_8b;  in bnxt_hwrm_ver_get()
9689 		fw_rsv = resp->hwrm_fw_rsvd_8b;  in bnxt_hwrm_ver_get()
9692 	bp->fw_ver_code = BNXT_FW_VER_CODE(fw_maj, fw_min, fw_bld, fw_rsv);  in bnxt_hwrm_ver_get()
9693 	snprintf(bp->fw_ver_str, len, "%d.%d.%d.%d", fw_maj, fw_min, fw_bld,  in bnxt_hwrm_ver_get()
9696 	if (strlen(resp->active_pkg_name)) {  in bnxt_hwrm_ver_get()
9697 		int fw_ver_len = strlen(bp->fw_ver_str);  in bnxt_hwrm_ver_get()
9699 		snprintf(bp->fw_ver_str + fw_ver_len,  in bnxt_hwrm_ver_get()
9700 			 FW_VER_STR_LEN - fw_ver_len - 1, "/pkg %s",  in bnxt_hwrm_ver_get()
9701 			 resp->active_pkg_name);  in bnxt_hwrm_ver_get()
9702 		bp->fw_cap |= BNXT_FW_CAP_PKG_VER;  in bnxt_hwrm_ver_get()
9705 	bp->hwrm_cmd_timeout = le16_to_cpu(resp->def_req_timeout);  in bnxt_hwrm_ver_get()
9706 	if (!bp->hwrm_cmd_timeout)  in bnxt_hwrm_ver_get()
9707 		bp->hwrm_cmd_timeout = DFLT_HWRM_CMD_TIMEOUT;  in bnxt_hwrm_ver_get()
9708 	bp->hwrm_cmd_max_timeout = le16_to_cpu(resp->max_req_timeout) * 1000;  in bnxt_hwrm_ver_get()
9709 	if (!bp->hwrm_cmd_max_timeout)  in bnxt_hwrm_ver_get()
9710 		bp->hwrm_cmd_max_timeout = HWRM_CMD_MAX_TIMEOUT;  in bnxt_hwrm_ver_get()
9711 	else if (bp->hwrm_cmd_max_timeout > HWRM_CMD_MAX_TIMEOUT)  in bnxt_hwrm_ver_get()
9712 …netdev_warn(bp->dev, "Device requests max timeout of %d seconds, may trigger hung task watchdog\n",  in bnxt_hwrm_ver_get()
9713 			    bp->hwrm_cmd_max_timeout / 1000);  in bnxt_hwrm_ver_get()
9715 	if (resp->hwrm_intf_maj_8b >= 1) {  in bnxt_hwrm_ver_get()
9716 		bp->hwrm_max_req_len = le16_to_cpu(resp->max_req_win_len);  in bnxt_hwrm_ver_get()
9717 		bp->hwrm_max_ext_req_len = le16_to_cpu(resp->max_ext_req_len);  in bnxt_hwrm_ver_get()
9719 	if (bp->hwrm_max_ext_req_len < HWRM_MAX_REQ_LEN)  in bnxt_hwrm_ver_get()
9720 		bp->hwrm_max_ext_req_len = HWRM_MAX_REQ_LEN;  in bnxt_hwrm_ver_get()
9722 	bp->chip_num = le16_to_cpu(resp->chip_num);  in bnxt_hwrm_ver_get()
9723 	bp->chip_rev = resp->chip_rev;  in bnxt_hwrm_ver_get()
9724 	if (bp->chip_num == CHIP_NUM_58700 && !resp->chip_rev &&  in bnxt_hwrm_ver_get()
9725 	    !resp->chip_metal)  in bnxt_hwrm_ver_get()
9726 		bp->flags |= BNXT_FLAG_CHIP_NITRO_A0;  in bnxt_hwrm_ver_get()
9728 	dev_caps_cfg = le32_to_cpu(resp->dev_caps_cfg);  in bnxt_hwrm_ver_get()
9731 		bp->fw_cap |= BNXT_FW_CAP_SHORT_CMD;  in bnxt_hwrm_ver_get()
9734 		bp->fw_cap |= BNXT_FW_CAP_KONG_MB_CHNL;  in bnxt_hwrm_ver_get()
9738 		bp->fw_cap |= BNXT_FW_CAP_OVS_64BIT_HANDLE;  in bnxt_hwrm_ver_get()
9742 		bp->fw_cap |= BNXT_FW_CAP_TRUSTED_VF;  in bnxt_hwrm_ver_get()
9746 		bp->fw_cap |= BNXT_FW_CAP_CFA_ADV_FLOW;  in bnxt_hwrm_ver_get()
9760 	if ((BNXT_VF(bp) && bp->hwrm_spec_code < 0x10901) ||  in bnxt_hwrm_fw_set_time()
9761 	    bp->hwrm_spec_code < 0x10400)  in bnxt_hwrm_fw_set_time()
9762 		return -EOPNOTSUPP;  in bnxt_hwrm_fw_set_time()
9769 	req->year = cpu_to_le16(1900 + tm.tm_year);  in bnxt_hwrm_fw_set_time()
9770 	req->month = 1 + tm.tm_mon;  in bnxt_hwrm_fw_set_time()
9771 	req->day = tm.tm_mday;  in bnxt_hwrm_fw_set_time()
9772 	req->hour = tm.tm_hour;  in bnxt_hwrm_fw_set_time()
9773 	req->minute = tm.tm_min;  in bnxt_hwrm_fw_set_time()
9774 	req->second = tm.tm_sec;  in bnxt_hwrm_fw_set_time()
9800 		if (masks[i] == -1ULL)  in __bnxt_accumulate_stats()
9809 	if (!stats->hw_stats)  in bnxt_accumulate_stats()
9812 	__bnxt_accumulate_stats(stats->hw_stats, stats->sw_stats,  in bnxt_accumulate_stats()
9813 				stats->hw_masks, stats->len / 8, false);  in bnxt_accumulate_stats()
9823 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_accumulate_all_stats()
9826 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_accumulate_all_stats()
9827 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_accumulate_all_stats()
9831 		cpr = &bnapi->cp_ring;  in bnxt_accumulate_all_stats()
9832 		stats = &cpr->stats;  in bnxt_accumulate_all_stats()
9835 		__bnxt_accumulate_stats(stats->hw_stats, stats->sw_stats,  in bnxt_accumulate_all_stats()
9836 					ring0_stats->hw_masks,  in bnxt_accumulate_all_stats()
9837 					ring0_stats->len / 8, ignore_zero);  in bnxt_accumulate_all_stats()
9839 	if (bp->flags & BNXT_FLAG_PORT_STATS) {  in bnxt_accumulate_all_stats()
9840 		struct bnxt_stats_mem *stats = &bp->port_stats;  in bnxt_accumulate_all_stats()
9841 		__le64 *hw_stats = stats->hw_stats;  in bnxt_accumulate_all_stats()
9842 		u64 *sw_stats = stats->sw_stats;  in bnxt_accumulate_all_stats()
9843 		u64 *masks = stats->hw_masks;  in bnxt_accumulate_all_stats()
9855 	if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {  in bnxt_accumulate_all_stats()
9856 		bnxt_accumulate_stats(&bp->rx_port_stats_ext);  in bnxt_accumulate_all_stats()
9857 		bnxt_accumulate_stats(&bp->tx_port_stats_ext);  in bnxt_accumulate_all_stats()
9864 	struct bnxt_pf_info *pf = &bp->pf;  in bnxt_hwrm_port_qstats()
9867 	if (!(bp->flags & BNXT_FLAG_PORT_STATS))  in bnxt_hwrm_port_qstats()
9870 	if (flags && !(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED))  in bnxt_hwrm_port_qstats()
9871 		return -EOPNOTSUPP;  in bnxt_hwrm_port_qstats()
9877 	req->flags = flags;  in bnxt_hwrm_port_qstats()
9878 	req->port_id = cpu_to_le16(pf->port_id);  in bnxt_hwrm_port_qstats()
9879 	req->tx_stat_host_addr = cpu_to_le64(bp->port_stats.hw_stats_map +  in bnxt_hwrm_port_qstats()
9881 	req->rx_stat_host_addr = cpu_to_le64(bp->port_stats.hw_stats_map);  in bnxt_hwrm_port_qstats()
9891 	struct bnxt_pf_info *pf = &bp->pf;  in bnxt_hwrm_port_qstats_ext()
9895 	if (!(bp->flags & BNXT_FLAG_PORT_STATS_EXT))  in bnxt_hwrm_port_qstats_ext()
9898 	if (flags && !(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED))  in bnxt_hwrm_port_qstats_ext()
9899 		return -EOPNOTSUPP;  in bnxt_hwrm_port_qstats_ext()
9905 	req_qs->flags = flags;  in bnxt_hwrm_port_qstats_ext()
9906 	req_qs->port_id = cpu_to_le16(pf->port_id);  in bnxt_hwrm_port_qstats_ext()
9907 	req_qs->rx_stat_size = cpu_to_le16(sizeof(struct rx_port_stats_ext));  in bnxt_hwrm_port_qstats_ext()
9908 	req_qs->rx_stat_host_addr = cpu_to_le64(bp->rx_port_stats_ext.hw_stats_map);  in bnxt_hwrm_port_qstats_ext()
9909 	tx_stat_size = bp->tx_port_stats_ext.hw_stats ?  in bnxt_hwrm_port_qstats_ext()
9911 	req_qs->tx_stat_size = cpu_to_le16(tx_stat_size);  in bnxt_hwrm_port_qstats_ext()
9912 	req_qs->tx_stat_host_addr = cpu_to_le64(bp->tx_port_stats_ext.hw_stats_map);  in bnxt_hwrm_port_qstats_ext()
9916 		bp->fw_rx_stats_ext_size =  in bnxt_hwrm_port_qstats_ext()
9917 			le16_to_cpu(resp_qs->rx_stat_size) / 8;  in bnxt_hwrm_port_qstats_ext()
9919 		    bp->fw_rx_stats_ext_size > BNXT_RX_STATS_EXT_NUM_LEGACY)  in bnxt_hwrm_port_qstats_ext()
9920 			bp->fw_rx_stats_ext_size = BNXT_RX_STATS_EXT_NUM_LEGACY;  in bnxt_hwrm_port_qstats_ext()
9922 		bp->fw_tx_stats_ext_size = tx_stat_size ?  in bnxt_hwrm_port_qstats_ext()
9923 			le16_to_cpu(resp_qs->tx_stat_size) / 8 : 0;  in bnxt_hwrm_port_qstats_ext()
9925 		bp->fw_rx_stats_ext_size = 0;  in bnxt_hwrm_port_qstats_ext()
9926 		bp->fw_tx_stats_ext_size = 0;  in bnxt_hwrm_port_qstats_ext()
9933 	if (bp->fw_tx_stats_ext_size <=  in bnxt_hwrm_port_qstats_ext()
9935 		bp->pri2cos_valid = 0;  in bnxt_hwrm_port_qstats_ext()
9943 	req_qc->flags = cpu_to_le32(QUEUE_PRI2COS_QCFG_REQ_FLAGS_IVLAN);  in bnxt_hwrm_port_qstats_ext()
9951 		pri2cos = &resp_qc->pri0_cos_queue_id;  in bnxt_hwrm_port_qstats_ext()
9959 				bp->pri2cos_valid = false;  in bnxt_hwrm_port_qstats_ext()
9963 			for (j = 0; j < bp->max_q; j++) {  in bnxt_hwrm_port_qstats_ext()
9964 				if (bp->q_ids[j] == queue_id)  in bnxt_hwrm_port_qstats_ext()
9965 					bp->pri2cos_idx[i] = queue_idx;  in bnxt_hwrm_port_qstats_ext()
9968 		bp->pri2cos_valid = true;  in bnxt_hwrm_port_qstats_ext()
9989 		tpa_flags = bp->flags & BNXT_FLAG_TPA;  in bnxt_set_tpa()
9992 	for (i = 0; i < bp->nr_vnics; i++) {  in bnxt_set_tpa()
9993 		rc = bnxt_hwrm_vnic_set_tpa(bp, &bp->vnic_info[i], tpa_flags);  in bnxt_set_tpa()
9995 			netdev_err(bp->dev, "hwrm vnic set tpa failure rc for vnic %d: %x\n",  in bnxt_set_tpa()
10007 	for (i = 0; i < bp->nr_vnics; i++)  in bnxt_hwrm_clear_vnic_rss()
10008 		bnxt_hwrm_vnic_set_rss(bp, &bp->vnic_info[i], false);  in bnxt_hwrm_clear_vnic_rss()
10013 	if (!bp->vnic_info)  in bnxt_clear_vnic()
10017 	if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) {  in bnxt_clear_vnic()
10023 	if (bp->flags & BNXT_FLAG_TPA)  in bnxt_clear_vnic()
10026 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_clear_vnic()
10053 		return -EINVAL;  in bnxt_hwrm_set_br_mode()
10059 	req->fid = cpu_to_le16(0xffff);  in bnxt_hwrm_set_br_mode()
10060 	req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_EVB_MODE);  in bnxt_hwrm_set_br_mode()
10061 	req->evb_mode = evb_mode;  in bnxt_hwrm_set_br_mode()
10070 	if (BNXT_VF(bp) || bp->hwrm_spec_code < 0x10803)  in bnxt_hwrm_set_cache_line_size()
10077 	req->fid = cpu_to_le16(0xffff);  in bnxt_hwrm_set_cache_line_size()
10078 	req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_CACHE_LINESIZE);  in bnxt_hwrm_set_cache_line_size()
10079 	req->options = FUNC_CFG_REQ_OPTIONS_CACHE_LINESIZE_SIZE_64;  in bnxt_hwrm_set_cache_line_size()
10081 		req->options = FUNC_CFG_REQ_OPTIONS_CACHE_LINESIZE_SIZE_128;  in bnxt_hwrm_set_cache_line_size()
10090 	if (vnic->flags & BNXT_VNIC_RFS_NEW_RSS_FLAG)  in __bnxt_setup_vnic()
10096 		netdev_err(bp->dev, "hwrm vnic %d alloc failure rc: %x\n",  in __bnxt_setup_vnic()
10097 			   vnic->vnic_id, rc);  in __bnxt_setup_vnic()
10100 	bp->rsscos_nr_ctxs++;  in __bnxt_setup_vnic()
10105 			netdev_err(bp->dev, "hwrm vnic %d cos ctx alloc failure rc: %x\n",  in __bnxt_setup_vnic()
10106 				   vnic->vnic_id, rc);  in __bnxt_setup_vnic()
10109 		bp->rsscos_nr_ctxs++;  in __bnxt_setup_vnic()
10116 		netdev_err(bp->dev, "hwrm vnic %d cfg failure rc: %x\n",  in __bnxt_setup_vnic()
10117 			   vnic->vnic_id, rc);  in __bnxt_setup_vnic()
10124 		netdev_err(bp->dev, "hwrm vnic %d set rss failure rc: %x\n",  in __bnxt_setup_vnic()
10125 			   vnic->vnic_id, rc);  in __bnxt_setup_vnic()
10129 	if (bp->flags & BNXT_FLAG_AGG_RINGS) {  in __bnxt_setup_vnic()
10132 			netdev_err(bp->dev, "hwrm vnic %d set hds failure rc: %x\n",  in __bnxt_setup_vnic()
10133 				   vnic->vnic_id, rc);  in __bnxt_setup_vnic()
10151 	req->vnic_id = cpu_to_le32(vnic->fw_vnic_id);  in bnxt_hwrm_vnic_update()
10154 		req->mru = cpu_to_le16(vnic->mru);  in bnxt_hwrm_vnic_update()
10156 	req->enables = cpu_to_le32(valid);  in bnxt_hwrm_vnic_update()
10167 		netdev_err(bp->dev, "hwrm vnic %d set rss failure rc: %d\n",  in bnxt_hwrm_vnic_rss_cfg_p5()
10168 			   vnic->vnic_id, rc);  in bnxt_hwrm_vnic_rss_cfg_p5()
10173 		netdev_err(bp->dev, "hwrm vnic %d cfg failure rc: %x\n",  in bnxt_hwrm_vnic_rss_cfg_p5()
10174 			   vnic->vnic_id, rc);  in bnxt_hwrm_vnic_rss_cfg_p5()
10182 	nr_ctxs = bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings);  in __bnxt_setup_vnic_p5()
10186 			netdev_err(bp->dev, "hwrm vnic %d ctx %d alloc failure rc: %x\n",  in __bnxt_setup_vnic_p5()
10187 				   vnic->vnic_id, i, rc);  in __bnxt_setup_vnic_p5()
10190 		bp->rsscos_nr_ctxs++;  in __bnxt_setup_vnic_p5()
10193 		return -ENOMEM;  in __bnxt_setup_vnic_p5()
10199 	if (bp->flags & BNXT_FLAG_AGG_RINGS) {  in __bnxt_setup_vnic_p5()
10202 			netdev_err(bp->dev, "hwrm vnic %d set hds failure rc: %x\n",  in __bnxt_setup_vnic_p5()
10203 				   vnic->vnic_id, rc);  in __bnxt_setup_vnic_p5()
10211 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_setup_vnic()
10225 		netdev_err(bp->dev, "hwrm vnic %d alloc failure rc: %x\n",  in bnxt_alloc_and_setup_vnic()
10226 			   vnic->vnic_id, rc);  in bnxt_alloc_and_setup_vnic()
10238 		vnic = &bp->vnic_info[BNXT_VNIC_NTUPLE];  in bnxt_alloc_rfs_vnics()
10239 		return bnxt_alloc_and_setup_vnic(bp, vnic, 0, bp->rx_nr_rings);  in bnxt_alloc_rfs_vnics()
10242 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_alloc_rfs_vnics()
10245 	for (i = 0; i < bp->rx_nr_rings; i++) {  in bnxt_alloc_rfs_vnics()
10249 		if (vnic_id >= bp->nr_vnics)  in bnxt_alloc_rfs_vnics()
10252 		vnic = &bp->vnic_info[vnic_id];  in bnxt_alloc_rfs_vnics()
10253 		vnic->flags |= BNXT_VNIC_RFS_FLAG;  in bnxt_alloc_rfs_vnics()
10254 		if (bp->rss_cap & BNXT_RSS_CAP_NEW_RSS_CAP)  in bnxt_alloc_rfs_vnics()
10255 			vnic->flags |= BNXT_VNIC_RFS_NEW_RSS_FLAG;  in bnxt_alloc_rfs_vnics()
10256 		if (bnxt_alloc_and_setup_vnic(bp, &bp->vnic_info[vnic_id], ring_id, 1))  in bnxt_alloc_rfs_vnics()
10265 	struct bnxt_vnic_info *vnic = &rss_ctx->vnic;  in bnxt_del_one_rss_ctx()
10270 	if (netif_running(bp->dev)) {  in bnxt_del_one_rss_ctx()
10271 		bnxt_hwrm_vnic_free_one(bp, &rss_ctx->vnic);  in bnxt_del_one_rss_ctx()
10273 			if (vnic->fw_rss_cos_lb_ctx[i] != INVALID_HW_RING_ID)  in bnxt_del_one_rss_ctx()
10280 	list_for_each_entry_safe(usr_fltr, tmp, &bp->usr_fltr_list, list) {  in bnxt_del_one_rss_ctx()
10281 		if ((usr_fltr->flags & BNXT_ACT_RSS_CTX) &&  in bnxt_del_one_rss_ctx()
10282 		    usr_fltr->fw_vnic_id == rss_ctx->index) {  in bnxt_del_one_rss_ctx()
10292 	if (vnic->rss_table)  in bnxt_del_one_rss_ctx()
10293 		dma_free_coherent(&bp->pdev->dev, vnic->rss_table_size,  in bnxt_del_one_rss_ctx()
10294 				  vnic->rss_table,  in bnxt_del_one_rss_ctx()
10295 				  vnic->rss_table_dma_addr);  in bnxt_del_one_rss_ctx()
10296 	bp->num_rss_ctx--;  in bnxt_del_one_rss_ctx()
10301 	bool set_tpa = !!(bp->flags & BNXT_FLAG_TPA);  in bnxt_hwrm_realloc_rss_ctx_vnic()
10305 	xa_for_each(&bp->dev->ethtool->rss_ctx, context, ctx) {  in bnxt_hwrm_realloc_rss_ctx_vnic()
10307 		struct bnxt_vnic_info *vnic = &rss_ctx->vnic;  in bnxt_hwrm_realloc_rss_ctx_vnic()
10309 		if (bnxt_hwrm_vnic_alloc(bp, vnic, 0, bp->rx_nr_rings) ||  in bnxt_hwrm_realloc_rss_ctx_vnic()
10312 			netdev_err(bp->dev, "Failed to restore RSS ctx %d\n",  in bnxt_hwrm_realloc_rss_ctx_vnic()
10313 				   rss_ctx->index);  in bnxt_hwrm_realloc_rss_ctx_vnic()
10315 			ethtool_rxfh_context_lost(bp->dev, rss_ctx->index);  in bnxt_hwrm_realloc_rss_ctx_vnic()
10325 	xa_for_each(&bp->dev->ethtool->rss_ctx, context, ctx) {  in bnxt_clear_rss_ctxs()
10336 	if (BNXT_VF(bp) && !bp->vf.vlan && !bnxt_is_trusted_vf(bp, &bp->vf))  in bnxt_promisc_ok()
10344 	struct bnxt_vnic_info *vnic = &bp->vnic_info[1];  in bnxt_setup_nitroa0_vnic()
10347 	rc = bnxt_hwrm_vnic_alloc(bp, vnic, bp->rx_nr_rings - 1, 1);  in bnxt_setup_nitroa0_vnic()
10349 		netdev_err(bp->dev, "Cannot allocate special vnic for NS2 A0: %x\n",  in bnxt_setup_nitroa0_vnic()
10356 		netdev_err(bp->dev, "Cannot allocate special vnic for NS2 A0: %x\n",  in bnxt_setup_nitroa0_vnic()
10368 	struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT];  in bnxt_init_chip()
10370 	unsigned int rx_nr_rings = bp->rx_nr_rings;  in bnxt_init_chip()
10375 			netdev_err(bp->dev, "hwrm stat ctx alloc failure rc: %x\n",  in bnxt_init_chip()
10383 		netdev_err(bp->dev, "hwrm ring alloc failure rc: %x\n", rc);  in bnxt_init_chip()
10389 		netdev_err(bp->dev, "hwrm_ring_grp alloc failure: %x\n", rc);  in bnxt_init_chip()
10394 		rx_nr_rings--;  in bnxt_init_chip()
10399 		netdev_err(bp->dev, "hwrm vnic alloc failure rc: %x\n", rc);  in bnxt_init_chip()
10409 	if (bp->rss_cap & BNXT_RSS_CAP_RSS_HASH_TYPE_DELTA)  in bnxt_init_chip()
10412 	if (bp->flags & BNXT_FLAG_RFS) {  in bnxt_init_chip()
10418 	if (bp->flags & BNXT_FLAG_TPA) {  in bnxt_init_chip()
10428 	rc = bnxt_hwrm_set_vnic_filter(bp, 0, 0, bp->dev->dev_addr);  in bnxt_init_chip()
10430 		if (BNXT_VF(bp) && rc == -ENODEV)  in bnxt_init_chip()
10431 			netdev_err(bp->dev, "Cannot configure L2 filter while PF is unavailable\n");  in bnxt_init_chip()
10433 			netdev_err(bp->dev, "HWRM vnic filter failure rc: %x\n", rc);  in bnxt_init_chip()
10436 	vnic->uc_filter_count = 1;  in bnxt_init_chip()
10438 	vnic->rx_mask = 0;  in bnxt_init_chip()
10439 	if (test_bit(BNXT_STATE_HALF_OPEN, &bp->state))  in bnxt_init_chip()
10442 	if (bp->dev->flags & IFF_BROADCAST)  in bnxt_init_chip()
10443 		vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_BCAST;  in bnxt_init_chip()
10445 	if (bp->dev->flags & IFF_PROMISC)  in bnxt_init_chip()
10446 		vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS;  in bnxt_init_chip()
10448 	if (bp->dev->flags & IFF_ALLMULTI) {  in bnxt_init_chip()
10449 		vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST;  in bnxt_init_chip()
10450 		vnic->mc_list_count = 0;  in bnxt_init_chip()
10451 	} else if (bp->dev->flags & IFF_MULTICAST) {  in bnxt_init_chip()
10455 		vnic->rx_mask |= mask;  in bnxt_init_chip()
10465 		netdev_warn(bp->dev, "HWRM set coalescing failure rc: %x\n",  in bnxt_init_chip()
10471 			netdev_err(bp->dev, "Special vnic setup failure for NS2 A0 rc: %x\n",  in bnxt_init_chip()
10477 		netdev_update_features(bp->dev);  in bnxt_init_chip()
10508 	struct net_device *dev = bp->dev;  in bnxt_set_real_num_queues()
10510 	rc = netif_set_real_num_tx_queues(dev, bp->tx_nr_rings -  in bnxt_set_real_num_queues()
10511 					  bp->tx_nr_rings_xdp);  in bnxt_set_real_num_queues()
10515 	rc = netif_set_real_num_rx_queues(dev, bp->rx_nr_rings);  in bnxt_set_real_num_queues()
10520 	if (bp->flags & BNXT_FLAG_RFS)  in bnxt_set_real_num_queues()
10521 		dev->rx_cpu_rmap = alloc_irq_cpu_rmap(bp->rx_nr_rings);  in bnxt_set_real_num_queues()
10537 			return -ENOMEM;  in __bnxt_trim_rings()
10541 				_rx--;  in __bnxt_trim_rings()
10543 				_tx--;  in __bnxt_trim_rings()
10553 	return (tx - tx_xdp) / tx_sets + tx_xdp;  in __bnxt_num_tx_to_cp()
10558 	int tcs = bp->num_tc;  in bnxt_num_tx_to_cp()
10562 	return __bnxt_num_tx_to_cp(bp, tx, tcs, bp->tx_nr_rings_xdp);  in bnxt_num_tx_to_cp()
10567 	int tcs = bp->num_tc;  in bnxt_num_cp_to_tx()
10569 	return (tx_cp - bp->tx_nr_rings_xdp) * tcs +  in bnxt_num_cp_to_tx()
10570 	       bp->tx_nr_rings_xdp;  in bnxt_num_cp_to_tx()
10593 	const int len = sizeof(bp->irq_tbl[0].name);  in bnxt_setup_msix()
10594 	struct net_device *dev = bp->dev;  in bnxt_setup_msix()
10597 	tcs = bp->num_tc;  in bnxt_setup_msix()
10602 			count = bp->tx_nr_rings_per_tc;  in bnxt_setup_msix()
10608 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_setup_msix()
10612 		if (bp->flags & BNXT_FLAG_SHARED_RINGS)  in bnxt_setup_msix()
10614 		else if (i < bp->rx_nr_rings)  in bnxt_setup_msix()
10619 		snprintf(bp->irq_tbl[map_idx].name, len, "%s-%s-%d", dev->name,  in bnxt_setup_msix()
10621 		bp->irq_tbl[map_idx].handler = bnxt_msix;  in bnxt_setup_msix()
10633 	for (i = bp->total_irqs; i < total; i++) {  in bnxt_change_msix()
10634 		map = pci_msix_alloc_irq_at(bp->pdev, i, NULL);  in bnxt_change_msix()
10636 			return bp->total_irqs;  in bnxt_change_msix()
10637 		bp->irq_tbl[i].vector = map.virq;  in bnxt_change_msix()
10638 		bp->total_irqs++;  in bnxt_change_msix()
10641 	/* trim MSIX from the end if needed */  in bnxt_change_msix()
10642 	for (i = bp->total_irqs; i > total; i--) {  in bnxt_change_msix()
10643 		map.index = i - 1;  in bnxt_change_msix()
10644 		map.virq = bp->irq_tbl[i - 1].vector;  in bnxt_change_msix()
10645 		pci_msix_free_irq(bp->pdev, map);  in bnxt_change_msix()
10646 		bp->total_irqs--;  in bnxt_change_msix()
10648 	return bp->total_irqs;  in bnxt_change_msix()
10655 	if (!bp->irq_tbl) {  in bnxt_setup_int_mode()
10657 		if (rc || !bp->irq_tbl)  in bnxt_setup_int_mode()
10658 			return rc ?: -ENODEV;  in bnxt_setup_int_mode()
10669 	return bp->hw_resc.max_rsscos_ctxs;  in bnxt_get_max_func_rss_ctxs()
10674 	return bp->hw_resc.max_vnics;  in bnxt_get_max_func_vnics()
10679 	return bp->hw_resc.max_stat_ctxs;  in bnxt_get_max_func_stat_ctxs()
10684 	return bp->hw_resc.max_cp_rings;  in bnxt_get_max_func_cp_rings()
10689 	unsigned int cp = bp->hw_resc.max_cp_rings;  in bnxt_get_max_func_cp_rings_for_en()
10691 	if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_get_max_func_cp_rings_for_en()
10692 		cp -= bnxt_get_ulp_msix_num(bp);  in bnxt_get_max_func_cp_rings_for_en()
10699 	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;  in bnxt_get_max_func_irqs()
10701 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_get_max_func_irqs()
10702 		return min_t(unsigned int, hw_resc->max_irqs, hw_resc->max_nqs);  in bnxt_get_max_func_irqs()
10704 	return min_t(unsigned int, hw_resc->max_irqs, hw_resc->max_cp_rings);  in bnxt_get_max_func_irqs()
10709 	bp->hw_resc.max_irqs = max_irqs;  in bnxt_set_max_func_irqs()
10717 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_get_avail_cp_rings_for_en()
10718 		return cp - bp->rx_nr_rings - bp->tx_nr_rings;  in bnxt_get_avail_cp_rings_for_en()
10720 		return cp - bp->cp_nr_rings;  in bnxt_get_avail_cp_rings_for_en()
10725 	return bnxt_get_max_func_stat_ctxs(bp) - bnxt_get_func_stat_ctxs(bp);  in bnxt_get_avail_stat_ctxs_for_en()
10731 	int total_req = bp->cp_nr_rings + num;  in bnxt_get_avail_msix()
10734 		num = max_irq - bp->cp_nr_rings;  in bnxt_get_avail_msix()
10761 	if (!(bp->flags & BNXT_FLAG_SHARED_RINGS))  in bnxt_init_int_mode()
10764 	total_vecs = pci_alloc_irq_vectors(bp->pdev, min, total_vecs,  in bnxt_init_int_mode()
10768 		rc = -ENODEV;  in bnxt_init_int_mode()
10773 	if (pci_msix_can_alloc_dyn(bp->pdev))  in bnxt_init_int_mode()
10775 	bp->irq_tbl = kcalloc(tbl_size, sizeof(*bp->irq_tbl), GFP_KERNEL);  in bnxt_init_int_mode()
10776 	if (bp->irq_tbl) {  in bnxt_init_int_mode()
10778 			bp->irq_tbl[i].vector = pci_irq_vector(bp->pdev, i);  in bnxt_init_int_mode()
10780 		bp->total_irqs = total_vecs;  in bnxt_init_int_mode()
10781 		/* Trim rings based upon num of vectors allocated */  in bnxt_init_int_mode()
10782 		rc = bnxt_trim_rings(bp, &bp->rx_nr_rings, &bp->tx_nr_rings,  in bnxt_init_int_mode()
10783 				     total_vecs - ulp_msix, min == 1);  in bnxt_init_int_mode()
10787 		tx_cp = bnxt_num_tx_to_cp(bp, bp->tx_nr_rings);  in bnxt_init_int_mode()
10788 		bp->cp_nr_rings = (min == 1) ?  in bnxt_init_int_mode()
10789 				  max_t(int, tx_cp, bp->rx_nr_rings) :  in bnxt_init_int_mode()
10790 				  tx_cp + bp->rx_nr_rings;  in bnxt_init_int_mode()
10793 		rc = -ENOMEM;  in bnxt_init_int_mode()
10799 	netdev_err(bp->dev, "bnxt_init_int_mode err: %x\n", rc);  in bnxt_init_int_mode()
10800 	kfree(bp->irq_tbl);  in bnxt_init_int_mode()
10801 	bp->irq_tbl = NULL;  in bnxt_init_int_mode()
10802 	pci_free_irq_vectors(bp->pdev);  in bnxt_init_int_mode()
10808 	pci_free_irq_vectors(bp->pdev);  in bnxt_clear_int_mode()
10810 	kfree(bp->irq_tbl);  in bnxt_clear_int_mode()
10811 	bp->irq_tbl = NULL;  in bnxt_clear_int_mode()
10818 	int tcs = bp->num_tc;  in bnxt_reserve_rings()
10825 	if (BNXT_NEW_RM(bp) && !bnxt_ulp_registered(bp->edev)) {  in bnxt_reserve_rings()
10826 		int ulp_msix = bnxt_get_avail_msix(bp, bp->ulp_num_msix_want);  in bnxt_reserve_rings()
10828 		if (ulp_msix > bp->ulp_num_msix_want)  in bnxt_reserve_rings()
10829 			ulp_msix = bp->ulp_num_msix_want;  in bnxt_reserve_rings()
10830 		irqs_required = ulp_msix + bp->cp_nr_rings;  in bnxt_reserve_rings()
10835 	if (irq_re_init && BNXT_NEW_RM(bp) && irqs_required != bp->total_irqs) {  in bnxt_reserve_rings()
10837 		if (!pci_msix_can_alloc_dyn(bp->pdev)) {  in bnxt_reserve_rings()
10850 			rc = -ENOSPC;  in bnxt_reserve_rings()
10853 		netdev_err(bp->dev, "ring reservation/IRQ init failure rc: %d\n", rc);  in bnxt_reserve_rings()
10856 	if (tcs && (bp->tx_nr_rings_per_tc * tcs !=  in bnxt_reserve_rings()
10857 		    bp->tx_nr_rings - bp->tx_nr_rings_xdp)) {  in bnxt_reserve_rings()
10858 		netdev_err(bp->dev, "tx ring reservation failure\n");  in bnxt_reserve_rings()
10859 		netdev_reset_tc(bp->dev);  in bnxt_reserve_rings()
10860 		bp->num_tc = 0;  in bnxt_reserve_rings()
10861 		if (bp->tx_nr_rings_xdp)  in bnxt_reserve_rings()
10862 			bp->tx_nr_rings_per_tc = bp->tx_nr_rings_xdp;  in bnxt_reserve_rings()
10864 			bp->tx_nr_rings_per_tc = bp->tx_nr_rings;  in bnxt_reserve_rings()
10865 		return -ENOMEM;  in bnxt_reserve_rings()
10876 	free_irq_cpu_rmap(bp->dev->rx_cpu_rmap);  in bnxt_free_irq()
10877 	bp->dev->rx_cpu_rmap = NULL;  in bnxt_free_irq()
10879 	if (!bp->irq_tbl || !bp->bnapi)  in bnxt_free_irq()
10882 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_free_irq()
10885 		irq = &bp->irq_tbl[map_idx];  in bnxt_free_irq()
10886 		if (irq->requested) {  in bnxt_free_irq()
10887 			if (irq->have_cpumask) {  in bnxt_free_irq()
10888 				irq_set_affinity_hint(irq->vector, NULL);  in bnxt_free_irq()
10889 				free_cpumask_var(irq->cpu_mask);  in bnxt_free_irq()
10890 				irq->have_cpumask = 0;  in bnxt_free_irq()
10892 			free_irq(irq->vector, bp->bnapi[i]);  in bnxt_free_irq()
10895 		irq->requested = 0;  in bnxt_free_irq()
10909 		netdev_err(bp->dev, "bnxt_setup_int_mode err: %x\n",  in bnxt_request_irq()
10914 	rmap = bp->dev->rx_cpu_rmap;  in bnxt_request_irq()
10916 	for (i = 0, j = 0; i < bp->cp_nr_rings; i++) {  in bnxt_request_irq()
10918 		struct bnxt_irq *irq = &bp->irq_tbl[map_idx];  in bnxt_request_irq()
10921 		if (rmap && bp->bnapi[i]->rx_ring) {  in bnxt_request_irq()
10922 			rc = irq_cpu_rmap_add(rmap, irq->vector);  in bnxt_request_irq()
10924 				netdev_warn(bp->dev, "failed adding irq rmap for ring %d\n",  in bnxt_request_irq()
10929 		rc = request_irq(irq->vector, irq->handler, flags, irq->name,  in bnxt_request_irq()
10930 				 bp->bnapi[i]);  in bnxt_request_irq()
10934 		netif_napi_set_irq(&bp->bnapi[i]->napi, irq->vector);  in bnxt_request_irq()
10935 		irq->requested = 1;  in bnxt_request_irq()
10937 		if (zalloc_cpumask_var(&irq->cpu_mask, GFP_KERNEL)) {  in bnxt_request_irq()
10938 			int numa_node = dev_to_node(&bp->pdev->dev);  in bnxt_request_irq()
10940 			irq->have_cpumask = 1;  in bnxt_request_irq()
10942 					irq->cpu_mask);  in bnxt_request_irq()
10943 			rc = irq_set_affinity_hint(irq->vector, irq->cpu_mask);  in bnxt_request_irq()
10945 				netdev_warn(bp->dev,  in bnxt_request_irq()
10947 					    irq->vector);  in bnxt_request_irq()
10959 	if (!bp->bnapi)  in bnxt_del_napi()
10962 	for (i = 0; i < bp->rx_nr_rings; i++)  in bnxt_del_napi()
10963 		netif_queue_set_napi(bp->dev, i, NETDEV_QUEUE_TYPE_RX, NULL);  in bnxt_del_napi()
10964 	for (i = 0; i < bp->tx_nr_rings - bp->tx_nr_rings_xdp; i++)  in bnxt_del_napi()
10965 		netif_queue_set_napi(bp->dev, i, NETDEV_QUEUE_TYPE_TX, NULL);  in bnxt_del_napi()
10967 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_del_napi()
10968 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_del_napi()
10970 		__netif_napi_del(&bnapi->napi);  in bnxt_del_napi()
10981 	unsigned int cp_nr_rings = bp->cp_nr_rings;  in bnxt_init_napi()
10985 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_init_napi()
10988 		cp_nr_rings--;  in bnxt_init_napi()
10990 		bnapi = bp->bnapi[i];  in bnxt_init_napi()
10991 		netif_napi_add(bp->dev, &bnapi->napi, poll_fn);  in bnxt_init_napi()
10994 		bnapi = bp->bnapi[cp_nr_rings];  in bnxt_init_napi()
10995 		netif_napi_add(bp->dev, &bnapi->napi, bnxt_poll_nitroa0);  in bnxt_init_napi()
11003 	if (!bp->bnapi ||  in bnxt_disable_napi()
11004 	    test_and_set_bit(BNXT_STATE_NAPI_DISABLED, &bp->state))  in bnxt_disable_napi()
11007 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_disable_napi()
11008 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_disable_napi()
11011 		cpr = &bnapi->cp_ring;  in bnxt_disable_napi()
11012 		if (bnapi->tx_fault)  in bnxt_disable_napi()
11013 			cpr->sw_stats->tx.tx_resets++;  in bnxt_disable_napi()
11014 		if (bnapi->in_reset)  in bnxt_disable_napi()
11015 			cpr->sw_stats->rx.rx_resets++;  in bnxt_disable_napi()
11016 		napi_disable(&bnapi->napi);  in bnxt_disable_napi()
11017 		if (bnapi->rx_ring)  in bnxt_disable_napi()
11018 			cancel_work_sync(&cpr->dim.work);  in bnxt_disable_napi()
11026 	clear_bit(BNXT_STATE_NAPI_DISABLED, &bp->state);  in bnxt_enable_napi()
11027 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_enable_napi()
11028 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_enable_napi()
11031 		bnapi->tx_fault = 0;  in bnxt_enable_napi()
11033 		cpr = &bnapi->cp_ring;  in bnxt_enable_napi()
11034 		bnapi->in_reset = false;  in bnxt_enable_napi()
11036 		if (bnapi->rx_ring) {  in bnxt_enable_napi()
11037 			INIT_WORK(&cpr->dim.work, bnxt_dim_work);  in bnxt_enable_napi()
11038 			cpr->dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;  in bnxt_enable_napi()
11040 		napi_enable(&bnapi->napi);  in bnxt_enable_napi()
11049 	if (bp->tx_ring) {  in bnxt_tx_disable()
11050 		for (i = 0; i < bp->tx_nr_rings; i++) {  in bnxt_tx_disable()
11051 			txr = &bp->tx_ring[i];  in bnxt_tx_disable()
11052 			WRITE_ONCE(txr->dev_state, BNXT_DEV_STATE_CLOSING);  in bnxt_tx_disable()
11058 	netif_carrier_off(bp->dev);  in bnxt_tx_disable()
11060 	netif_tx_disable(bp->dev);  in bnxt_tx_disable()
11068 	for (i = 0; i < bp->tx_nr_rings; i++) {  in bnxt_tx_enable()
11069 		txr = &bp->tx_ring[i];  in bnxt_tx_enable()
11070 		WRITE_ONCE(txr->dev_state, 0);  in bnxt_tx_enable()
11074 	netif_tx_wake_all_queues(bp->dev);  in bnxt_tx_enable()
11076 		netif_carrier_on(bp->dev);  in bnxt_tx_enable()
11081 	u8 active_fec = link_info->active_fec_sig_mode &  in bnxt_report_fec()
11112 		netif_carrier_on(bp->dev);  in bnxt_report_link()
11113 		speed = bnxt_fw_to_ethtool_speed(bp->link_info.link_speed);  in bnxt_report_link()
11115 			netdev_info(bp->dev, "NIC Link is Up, speed unknown\n");  in bnxt_report_link()
11118 		if (bp->link_info.duplex == BNXT_LINK_DUPLEX_FULL)  in bnxt_report_link()
11122 		if (bp->link_info.pause == BNXT_LINK_PAUSE_BOTH)  in bnxt_report_link()
11123 			flow_ctrl = "ON - receive & transmit";  in bnxt_report_link()
11124 		else if (bp->link_info.pause == BNXT_LINK_PAUSE_TX)  in bnxt_report_link()
11125 			flow_ctrl = "ON - transmit";  in bnxt_report_link()
11126 		else if (bp->link_info.pause == BNXT_LINK_PAUSE_RX)  in bnxt_report_link()
11127 			flow_ctrl = "ON - receive";  in bnxt_report_link()
11130 		if (bp->link_info.phy_qcfg_resp.option_flags &  in bnxt_report_link()
11132 			u8 sig_mode = bp->link_info.active_fec_sig_mode &  in bnxt_report_link()
11148 		netdev_info(bp->dev, "NIC Link is Up, %u Mbps %s%s duplex, Flow control: %s\n",  in bnxt_report_link()
11150 		if (bp->phy_flags & BNXT_PHY_FL_EEE_CAP)  in bnxt_report_link()
11151 			netdev_info(bp->dev, "EEE is %s\n",  in bnxt_report_link()
11152 				    bp->eee.eee_active ? "active" :  in bnxt_report_link()
11154 		fec = bp->link_info.fec_cfg;  in bnxt_report_link()
11156 			netdev_info(bp->dev, "FEC autoneg %s encoding: %s\n",  in bnxt_report_link()
11158 				    bnxt_report_fec(&bp->link_info));  in bnxt_report_link()
11160 		netif_carrier_off(bp->dev);  in bnxt_report_link()
11161 		netdev_err(bp->dev, "NIC Link is Down\n");  in bnxt_report_link()
11167 	if (!resp->supported_speeds_auto_mode &&  in bnxt_phy_qcaps_no_speed()
11168 	    !resp->supported_speeds_force_mode &&  in bnxt_phy_qcaps_no_speed()
11169 	    !resp->supported_pam4_speeds_auto_mode &&  in bnxt_phy_qcaps_no_speed()
11170 	    !resp->supported_pam4_speeds_force_mode &&  in bnxt_phy_qcaps_no_speed()
11171 	    !resp->supported_speeds2_auto_mode &&  in bnxt_phy_qcaps_no_speed()
11172 	    !resp->supported_speeds2_force_mode)  in bnxt_phy_qcaps_no_speed()
11179 	struct bnxt_link_info *link_info = &bp->link_info;  in bnxt_hwrm_phy_qcaps()
11184 	if (bp->hwrm_spec_code < 0x10201)  in bnxt_hwrm_phy_qcaps()
11196 	bp->phy_flags = resp->flags | (le16_to_cpu(resp->flags2) << 8);  in bnxt_hwrm_phy_qcaps()
11197 	if (resp->flags & PORT_PHY_QCAPS_RESP_FLAGS_EEE_SUPPORTED) {  in bnxt_hwrm_phy_qcaps()
11198 		struct ethtool_keee *eee = &bp->eee;  in bnxt_hwrm_phy_qcaps()
11199 		u16 fw_speeds = le16_to_cpu(resp->supported_speeds_eee_mode);  in bnxt_hwrm_phy_qcaps()
11201 		_bnxt_fw_to_linkmode(eee->supported, fw_speeds);  in bnxt_hwrm_phy_qcaps()
11202 		bp->lpi_tmr_lo = le32_to_cpu(resp->tx_lpi_timer_low) &  in bnxt_hwrm_phy_qcaps()
11204 		bp->lpi_tmr_hi = le32_to_cpu(resp->valid_tx_lpi_timer_high) &  in bnxt_hwrm_phy_qcaps()
11208 	if (bp->hwrm_spec_code >= 0x10a01) {  in bnxt_hwrm_phy_qcaps()
11210 			link_info->phy_state = BNXT_PHY_STATE_DISABLED;  in bnxt_hwrm_phy_qcaps()
11211 			netdev_warn(bp->dev, "Ethernet link disabled\n");  in bnxt_hwrm_phy_qcaps()
11212 		} else if (link_info->phy_state == BNXT_PHY_STATE_DISABLED) {  in bnxt_hwrm_phy_qcaps()
11213 			link_info->phy_state = BNXT_PHY_STATE_ENABLED;  in bnxt_hwrm_phy_qcaps()
11214 			netdev_info(bp->dev, "Ethernet link enabled\n");  in bnxt_hwrm_phy_qcaps()
11215 			/* Phy re-enabled, reprobe the speeds */  in bnxt_hwrm_phy_qcaps()
11216 			link_info->support_auto_speeds = 0;  in bnxt_hwrm_phy_qcaps()
11217 			link_info->support_pam4_auto_speeds = 0;  in bnxt_hwrm_phy_qcaps()
11218 			link_info->support_auto_speeds2 = 0;  in bnxt_hwrm_phy_qcaps()
11221 	if (resp->supported_speeds_auto_mode)  in bnxt_hwrm_phy_qcaps()
11222 		link_info->support_auto_speeds =  in bnxt_hwrm_phy_qcaps()
11223 			le16_to_cpu(resp->supported_speeds_auto_mode);  in bnxt_hwrm_phy_qcaps()
11224 	if (resp->supported_pam4_speeds_auto_mode)  in bnxt_hwrm_phy_qcaps()
11225 		link_info->support_pam4_auto_speeds =  in bnxt_hwrm_phy_qcaps()
11226 			le16_to_cpu(resp->supported_pam4_speeds_auto_mode);  in bnxt_hwrm_phy_qcaps()
11227 	if (resp->supported_speeds2_auto_mode)  in bnxt_hwrm_phy_qcaps()
11228 		link_info->support_auto_speeds2 =  in bnxt_hwrm_phy_qcaps()
11229 			le16_to_cpu(resp->supported_speeds2_auto_mode);  in bnxt_hwrm_phy_qcaps()
11231 	bp->port_count = resp->port_cnt;  in bnxt_hwrm_phy_qcaps()
11252 	if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) {  in bnxt_support_speed_dropped()
11253 		if (bnxt_support_dropped(link_info->advertising,  in bnxt_support_speed_dropped()
11254 					 link_info->support_auto_speeds2)) {  in bnxt_support_speed_dropped()
11255 			link_info->advertising = link_info->support_auto_speeds2;  in bnxt_support_speed_dropped()
11260 	if (bnxt_support_dropped(link_info->advertising,  in bnxt_support_speed_dropped()
11261 				 link_info->support_auto_speeds)) {  in bnxt_support_speed_dropped()
11262 		link_info->advertising = link_info->support_auto_speeds;  in bnxt_support_speed_dropped()
11265 	if (bnxt_support_dropped(link_info->advertising_pam4,  in bnxt_support_speed_dropped()
11266 				 link_info->support_pam4_auto_speeds)) {  in bnxt_support_speed_dropped()
11267 		link_info->advertising_pam4 = link_info->support_pam4_auto_speeds;  in bnxt_support_speed_dropped()
11275 	struct bnxt_link_info *link_info = &bp->link_info;  in bnxt_update_link()
11278 	u8 link_state = link_info->link_state;  in bnxt_update_link()
11290 		if (BNXT_VF(bp) && rc == -ENODEV) {  in bnxt_update_link()
11291 			netdev_warn(bp->dev, "Cannot obtain link state while PF unavailable.\n");  in bnxt_update_link()
11297 	memcpy(&link_info->phy_qcfg_resp, resp, sizeof(*resp));  in bnxt_update_link()
11298 	link_info->phy_link_status = resp->link;  in bnxt_update_link()
11299 	link_info->duplex = resp->duplex_cfg;  in bnxt_update_link()
11300 	if (bp->hwrm_spec_code >= 0x10800)  in bnxt_update_link()
11301 		link_info->duplex = resp->duplex_state;  in bnxt_update_link()
11302 	link_info->pause = resp->pause;  in bnxt_update_link()
11303 	link_info->auto_mode = resp->auto_mode;  in bnxt_update_link()
11304 	link_info->auto_pause_setting = resp->auto_pause;  in bnxt_update_link()
11305 	link_info->lp_pause = resp->link_partner_adv_pause;  in bnxt_update_link()
11306 	link_info->force_pause_setting = resp->force_pause;  in bnxt_update_link()
11307 	link_info->duplex_setting = resp->duplex_cfg;  in bnxt_update_link()
11308 	if (link_info->phy_link_status == BNXT_LINK_LINK) {  in bnxt_update_link()
11309 		link_info->link_speed = le16_to_cpu(resp->link_speed);  in bnxt_update_link()
11310 		if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2)  in bnxt_update_link()
11311 			link_info->active_lanes = resp->active_lanes;  in bnxt_update_link()
11313 		link_info->link_speed = 0;  in bnxt_update_link()
11314 		link_info->active_lanes = 0;  in bnxt_update_link()
11316 	link_info->force_link_speed = le16_to_cpu(resp->force_link_speed);  in bnxt_update_link()
11317 	link_info->force_pam4_link_speed =  in bnxt_update_link()
11318 		le16_to_cpu(resp->force_pam4_link_speed);  in bnxt_update_link()
11319 	link_info->force_link_speed2 = le16_to_cpu(resp->force_link_speeds2);  in bnxt_update_link()
11320 	link_info->support_speeds = le16_to_cpu(resp->support_speeds);  in bnxt_update_link()
11321 	link_info->support_pam4_speeds = le16_to_cpu(resp->support_pam4_speeds);  in bnxt_update_link()
11322 	link_info->support_speeds2 = le16_to_cpu(resp->support_speeds2);  in bnxt_update_link()
11323 	link_info->auto_link_speeds = le16_to_cpu(resp->auto_link_speed_mask);  in bnxt_update_link()
11324 	link_info->auto_pam4_link_speeds =  in bnxt_update_link()
11325 		le16_to_cpu(resp->auto_pam4_link_speed_mask);  in bnxt_update_link()
11326 	link_info->auto_link_speeds2 = le16_to_cpu(resp->auto_link_speeds2);  in bnxt_update_link()
11327 	link_info->lp_auto_link_speeds =  in bnxt_update_link()
11328 		le16_to_cpu(resp->link_partner_adv_speeds);  in bnxt_update_link()
11329 	link_info->lp_auto_pam4_link_speeds =  in bnxt_update_link()
11330 		resp->link_partner_pam4_adv_speeds;  in bnxt_update_link()
11331 	link_info->preemphasis = le32_to_cpu(resp->preemphasis);  in bnxt_update_link()
11332 	link_info->phy_ver[0] = resp->phy_maj;  in bnxt_update_link()
11333 	link_info->phy_ver[1] = resp->phy_min;  in bnxt_update_link()
11334 	link_info->phy_ver[2] = resp->phy_bld;  in bnxt_update_link()
11335 	link_info->media_type = resp->media_type;  in bnxt_update_link()
11336 	link_info->phy_type = resp->phy_type;  in bnxt_update_link()
11337 	link_info->transceiver = resp->xcvr_pkg_type;  in bnxt_update_link()
11338 	link_info->phy_addr = resp->eee_config_phy_addr &  in bnxt_update_link()
11340 	link_info->module_status = resp->module_status;  in bnxt_update_link()
11342 	if (bp->phy_flags & BNXT_PHY_FL_EEE_CAP) {  in bnxt_update_link()
11343 		struct ethtool_keee *eee = &bp->eee;  in bnxt_update_link()
11346 		eee->eee_active = 0;  in bnxt_update_link()
11347 		if (resp->eee_config_phy_addr &  in bnxt_update_link()
11349 			eee->eee_active = 1;  in bnxt_update_link()
11351 				resp->link_partner_adv_eee_link_speed_mask);  in bnxt_update_link()
11352 			_bnxt_fw_to_linkmode(eee->lp_advertised, fw_speeds);  in bnxt_update_link()
11357 			if (resp->eee_config_phy_addr &  in bnxt_update_link()
11359 				eee->eee_enabled = 1;  in bnxt_update_link()
11361 			fw_speeds = le16_to_cpu(resp->adv_eee_link_speed_mask);  in bnxt_update_link()
11362 			_bnxt_fw_to_linkmode(eee->advertised, fw_speeds);  in bnxt_update_link()
11364 			if (resp->eee_config_phy_addr &  in bnxt_update_link()
11368 				eee->tx_lpi_enabled = 1;  in bnxt_update_link()
11369 				tmr = resp->xcvr_identifier_type_tx_lpi_timer;  in bnxt_update_link()
11370 				eee->tx_lpi_timer = le32_to_cpu(tmr) &  in bnxt_update_link()
11376 	link_info->fec_cfg = PORT_PHY_QCFG_RESP_FEC_CFG_FEC_NONE_SUPPORTED;  in bnxt_update_link()
11377 	if (bp->hwrm_spec_code >= 0x10504) {  in bnxt_update_link()
11378 		link_info->fec_cfg = le16_to_cpu(resp->fec_cfg);  in bnxt_update_link()
11379 		link_info->active_fec_sig_mode = resp->active_fec_signal_mode;  in bnxt_update_link()
11383 		if (link_info->phy_link_status == BNXT_LINK_LINK)  in bnxt_update_link()
11384 			link_info->link_state = BNXT_LINK_STATE_UP;  in bnxt_update_link()
11386 			link_info->link_state = BNXT_LINK_STATE_DOWN;  in bnxt_update_link()
11387 		if (link_state != link_info->link_state)  in bnxt_update_link()
11391 		link_info->link_state = BNXT_LINK_STATE_DOWN;  in bnxt_update_link()
11399 	if (support_changed && (link_info->autoneg & BNXT_AUTONEG_SPEED))  in bnxt_update_link()
11406 	struct bnxt_link_info *link_info = &bp->link_info;  in bnxt_get_port_module_status()
11407 	struct hwrm_port_phy_qcfg_output *resp = &link_info->phy_qcfg_resp;  in bnxt_get_port_module_status()
11413 	module_status = link_info->module_status;  in bnxt_get_port_module_status()
11418 		netdev_warn(bp->dev, "Unqualified SFP+ module detected on port %d\n",  in bnxt_get_port_module_status()
11419 			    bp->pf.port_id);  in bnxt_get_port_module_status()
11420 		if (bp->hwrm_spec_code >= 0x10201) {  in bnxt_get_port_module_status()
11421 			netdev_warn(bp->dev, "Module part number %s\n",  in bnxt_get_port_module_status()
11422 				    resp->phy_vendor_partnumber);  in bnxt_get_port_module_status()
11425 			netdev_warn(bp->dev, "TX is disabled\n");  in bnxt_get_port_module_status()
11427 			netdev_warn(bp->dev, "SFP+ module is shutdown\n");  in bnxt_get_port_module_status()
11434 	if (bp->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL) {  in bnxt_hwrm_set_pause_common()
11435 		if (bp->hwrm_spec_code >= 0x10201)  in bnxt_hwrm_set_pause_common()
11436 			req->auto_pause =  in bnxt_hwrm_set_pause_common()
11438 		if (bp->link_info.req_flow_ctrl & BNXT_LINK_PAUSE_RX)  in bnxt_hwrm_set_pause_common()
11439 			req->auto_pause |= PORT_PHY_CFG_REQ_AUTO_PAUSE_RX;  in bnxt_hwrm_set_pause_common()
11440 		if (bp->link_info.req_flow_ctrl & BNXT_LINK_PAUSE_TX)  in bnxt_hwrm_set_pause_common()
11441 			req->auto_pause |= PORT_PHY_CFG_REQ_AUTO_PAUSE_TX;  in bnxt_hwrm_set_pause_common()
11442 		req->enables |=  in bnxt_hwrm_set_pause_common()
11445 		if (bp->link_info.req_flow_ctrl & BNXT_LINK_PAUSE_RX)  in bnxt_hwrm_set_pause_common()
11446 			req->force_pause |= PORT_PHY_CFG_REQ_FORCE_PAUSE_RX;  in bnxt_hwrm_set_pause_common()
11447 		if (bp->link_info.req_flow_ctrl & BNXT_LINK_PAUSE_TX)  in bnxt_hwrm_set_pause_common()
11448 			req->force_pause |= PORT_PHY_CFG_REQ_FORCE_PAUSE_TX;  in bnxt_hwrm_set_pause_common()
11449 		req->enables |=  in bnxt_hwrm_set_pause_common()
11451 		if (bp->hwrm_spec_code >= 0x10201) {  in bnxt_hwrm_set_pause_common()
11452 			req->auto_pause = req->force_pause;  in bnxt_hwrm_set_pause_common()
11453 			req->enables |= cpu_to_le32(  in bnxt_hwrm_set_pause_common()
11461 	if (bp->link_info.autoneg & BNXT_AUTONEG_SPEED) {  in bnxt_hwrm_set_link_common()
11462 		req->auto_mode |= PORT_PHY_CFG_REQ_AUTO_MODE_SPEED_MASK;  in bnxt_hwrm_set_link_common()
11463 		if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) {  in bnxt_hwrm_set_link_common()
11464 			req->enables |=  in bnxt_hwrm_set_link_common()
11466 			req->auto_link_speeds2_mask = cpu_to_le16(bp->link_info.advertising);  in bnxt_hwrm_set_link_common()
11467 		} else if (bp->link_info.advertising) {  in bnxt_hwrm_set_link_common()
11468 			req->enables |= cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_AUTO_LINK_SPEED_MASK);  in bnxt_hwrm_set_link_common()
11469 			req->auto_link_speed_mask = cpu_to_le16(bp->link_info.advertising);  in bnxt_hwrm_set_link_common()
11471 		if (bp->link_info.advertising_pam4) {  in bnxt_hwrm_set_link_common()
11472 			req->enables |=  in bnxt_hwrm_set_link_common()
11474 			req->auto_link_pam4_speed_mask =  in bnxt_hwrm_set_link_common()
11475 				cpu_to_le16(bp->link_info.advertising_pam4);  in bnxt_hwrm_set_link_common()
11477 		req->enables |= cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_AUTO_MODE);  in bnxt_hwrm_set_link_common()
11478 		req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_RESTART_AUTONEG);  in bnxt_hwrm_set_link_common()
11480 		req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE);  in bnxt_hwrm_set_link_common()
11481 		if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) {  in bnxt_hwrm_set_link_common()
11482 			req->force_link_speeds2 = cpu_to_le16(bp->link_info.req_link_speed);  in bnxt_hwrm_set_link_common()
11483 			req->enables |= cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_FORCE_LINK_SPEEDS2);  in bnxt_hwrm_set_link_common()
11484 			netif_info(bp, link, bp->dev, "Forcing FW speed2: %d\n",  in bnxt_hwrm_set_link_common()
11485 				   (u32)bp->link_info.req_link_speed);  in bnxt_hwrm_set_link_common()
11486 		} else if (bp->link_info.req_signal_mode == BNXT_SIG_MODE_PAM4) {  in bnxt_hwrm_set_link_common()
11487 			req->force_pam4_link_speed = cpu_to_le16(bp->link_info.req_link_speed);  in bnxt_hwrm_set_link_common()
11488 			req->enables |= cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_FORCE_PAM4_LINK_SPEED);  in bnxt_hwrm_set_link_common()
11490 			req->force_link_speed = cpu_to_le16(bp->link_info.req_link_speed);  in bnxt_hwrm_set_link_common()
11495 	req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);  in bnxt_hwrm_set_link_common()
11509 	if ((bp->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL) ||  in bnxt_hwrm_set_pause()
11510 	    bp->link_info.force_link_chng)  in bnxt_hwrm_set_pause()
11514 	if (!rc && !(bp->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL)) {  in bnxt_hwrm_set_pause()
11516 		 * change event, the driver needs to update the current pause  in bnxt_hwrm_set_pause()
11519 		bp->link_info.pause =  in bnxt_hwrm_set_pause()
11520 		bp->link_info.force_pause_setting = bp->link_info.req_flow_ctrl;  in bnxt_hwrm_set_pause()
11521 		bp->link_info.auto_pause_setting = 0;  in bnxt_hwrm_set_pause()
11522 		if (!bp->link_info.force_link_chng)  in bnxt_hwrm_set_pause()
11525 	bp->link_info.force_link_chng = false;  in bnxt_hwrm_set_pause()
11532 	struct ethtool_keee *eee = &bp->eee;  in bnxt_hwrm_set_eee()
11534 	if (eee->eee_enabled) {  in bnxt_hwrm_set_eee()
11538 		if (eee->tx_lpi_enabled)  in bnxt_hwrm_set_eee()
11543 		req->flags |= cpu_to_le32(flags);  in bnxt_hwrm_set_eee()
11544 		eee_speeds = bnxt_get_fw_auto_link_speeds(eee->advertised);  in bnxt_hwrm_set_eee()
11545 		req->eee_link_speed_mask = cpu_to_le16(eee_speeds);  in bnxt_hwrm_set_eee()
11546 		req->tx_lpi_timer = cpu_to_le32(eee->tx_lpi_timer);  in bnxt_hwrm_set_eee()
11548 		req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_EEE_DISABLE);  in bnxt_hwrm_set_eee()
11579 	if (pci_num_vf(bp->pdev) &&  in bnxt_hwrm_shutdown_link()
11580 	    !(bp->phy_flags & BNXT_PHY_FL_FW_MANAGED_LKDN))  in bnxt_hwrm_shutdown_link()
11587 	req->flags = cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE_LINK_DWN);  in bnxt_hwrm_shutdown_link()
11590 		mutex_lock(&bp->link_lock);  in bnxt_hwrm_shutdown_link()
11596 		bp->link_info.link_state = BNXT_LINK_STATE_UNKNOWN;  in bnxt_hwrm_shutdown_link()
11597 		mutex_unlock(&bp->link_lock);  in bnxt_hwrm_shutdown_link()
11608 		netdev_err(bp->dev, "Failed FW reset via OP-TEE, rc=%d\n", rc);  in bnxt_fw_reset_via_optee()
11612 	netdev_err(bp->dev, "OP-TEE not supported\n");  in bnxt_fw_reset_via_optee()
11613 	return -ENODEV;  in bnxt_fw_reset_via_optee()
11619 	if (bp->fw_health && bp->fw_health->status_reliable) {  in bnxt_try_recover_fw()
11630 		} while (rc == -EBUSY && retry < BNXT_FW_RETRY);  in bnxt_try_recover_fw()
11633 			netdev_err(bp->dev,  in bnxt_try_recover_fw()
11636 			rc = -ENODEV;  in bnxt_try_recover_fw()
11639 			netdev_warn(bp->dev, "Firmware recover via OP-TEE requested\n");  in bnxt_try_recover_fw()
11645 	return -ENODEV;  in bnxt_try_recover_fw()
11650 	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;  in bnxt_clear_reservations()
11655 	hw_resc->resv_cp_rings = 0;  in bnxt_clear_reservations()
11656 	hw_resc->resv_stat_ctxs = 0;  in bnxt_clear_reservations()
11657 	hw_resc->resv_irqs = 0;  in bnxt_clear_reservations()
11658 	hw_resc->resv_tx_rings = 0;  in bnxt_clear_reservations()
11659 	hw_resc->resv_rx_rings = 0;  in bnxt_clear_reservations()
11660 	hw_resc->resv_hw_ring_grps = 0;  in bnxt_clear_reservations()
11661 	hw_resc->resv_vnics = 0;  in bnxt_clear_reservations()
11662 	hw_resc->resv_rsscos_ctxs = 0;  in bnxt_clear_reservations()
11664 		bp->tx_nr_rings = 0;  in bnxt_clear_reservations()
11665 		bp->rx_nr_rings = 0;  in bnxt_clear_reservations()
11678 		netdev_err(bp->dev, "resc_qcaps failed\n");  in bnxt_cancel_reservations()
11689 	bool fw_reset = !bp->irq_tbl;  in bnxt_hwrm_if_change()
11694 	if (!(bp->fw_cap & BNXT_FW_CAP_IF_CHANGE))  in bnxt_hwrm_if_change()
11702 		req->flags = cpu_to_le32(FUNC_DRV_IF_CHANGE_REQ_FLAGS_UP);  in bnxt_hwrm_if_change()
11708 		if (rc != -EAGAIN)  in bnxt_hwrm_if_change()
11715 	if (rc == -EAGAIN) {  in bnxt_hwrm_if_change()
11719 		flags = le32_to_cpu(resp->flags);  in bnxt_hwrm_if_change()
11736 	    test_bit(BNXT_STATE_FW_RESET_DET, &bp->state))  in bnxt_hwrm_if_change()
11741 	if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state) && !fw_reset) {  in bnxt_hwrm_if_change()
11742 		netdev_err(bp->dev, "RESET_DONE not set during FW reset.\n");  in bnxt_hwrm_if_change()
11743 		set_bit(BNXT_STATE_ABORT_ERR, &bp->state);  in bnxt_hwrm_if_change()
11744 		return -ENODEV;  in bnxt_hwrm_if_change()
11748 			set_bit(BNXT_STATE_FW_RESET_DET, &bp->state);  in bnxt_hwrm_if_change()
11749 			if (!test_bit(BNXT_STATE_IN_FW_RESET, &bp->state))  in bnxt_hwrm_if_change()
11755 				clear_bit(BNXT_STATE_FW_RESET_DET, &bp->state);  in bnxt_hwrm_if_change()
11756 				set_bit(BNXT_STATE_ABORT_ERR, &bp->state);  in bnxt_hwrm_if_change()
11762 				clear_bit(BNXT_STATE_FW_RESET_DET, &bp->state);  in bnxt_hwrm_if_change()
11763 				netdev_err(bp->dev, "init int mode failed\n");  in bnxt_hwrm_if_change()
11776 	struct bnxt_pf_info *pf = &bp->pf;  in bnxt_hwrm_port_led_qcaps()
11779 	bp->num_leds = 0;  in bnxt_hwrm_port_led_qcaps()
11780 	if (BNXT_VF(bp) || bp->hwrm_spec_code < 0x10601)  in bnxt_hwrm_port_led_qcaps()
11787 	req->port_id = cpu_to_le16(pf->port_id);  in bnxt_hwrm_port_led_qcaps()
11794 	if (resp->num_leds > 0 && resp->num_leds < BNXT_MAX_LED) {  in bnxt_hwrm_port_led_qcaps()
11797 		bp->num_leds = resp->num_leds;  in bnxt_hwrm_port_led_qcaps()
11798 		memcpy(bp->leds, &resp->led0_id, sizeof(bp->leds[0]) *  in bnxt_hwrm_port_led_qcaps()
11799 						 bp->num_leds);  in bnxt_hwrm_port_led_qcaps()
11800 		for (i = 0; i < bp->num_leds; i++) {  in bnxt_hwrm_port_led_qcaps()
11801 			struct bnxt_led_info *led = &bp->leds[i];  in bnxt_hwrm_port_led_qcaps()
11802 			__le16 caps = led->led_state_caps;  in bnxt_hwrm_port_led_qcaps()
11804 			if (!led->led_group_id ||  in bnxt_hwrm_port_led_qcaps()
11806 				bp->num_leds = 0;  in bnxt_hwrm_port_led_qcaps()
11825 	req->port_id = cpu_to_le16(bp->pf.port_id);  in bnxt_hwrm_alloc_wol_fltr()
11826 	req->wol_type = WOL_FILTER_ALLOC_REQ_WOL_TYPE_MAGICPKT;  in bnxt_hwrm_alloc_wol_fltr()
11827 	req->enables = cpu_to_le32(WOL_FILTER_ALLOC_REQ_ENABLES_MAC_ADDRESS);  in bnxt_hwrm_alloc_wol_fltr()
11828 	memcpy(req->mac_address, bp->dev->dev_addr, ETH_ALEN);  in bnxt_hwrm_alloc_wol_fltr()
11833 		bp->wol_filter_id = resp->wol_filter_id;  in bnxt_hwrm_alloc_wol_fltr()
11847 	req->port_id = cpu_to_le16(bp->pf.port_id);  in bnxt_hwrm_free_wol_fltr()
11848 	req->enables = cpu_to_le32(WOL_FILTER_FREE_REQ_ENABLES_WOL_FILTER_ID);  in bnxt_hwrm_free_wol_fltr()
11849 	req->wol_filter_id = bp->wol_filter_id;  in bnxt_hwrm_free_wol_fltr()
11865 	req->port_id = cpu_to_le16(bp->pf.port_id);  in bnxt_hwrm_get_wol_fltrs()
11866 	req->handle = cpu_to_le16(handle);  in bnxt_hwrm_get_wol_fltrs()
11870 		next_handle = le16_to_cpu(resp->next_handle);  in bnxt_hwrm_get_wol_fltrs()
11872 			if (resp->wol_type ==  in bnxt_hwrm_get_wol_fltrs()
11874 				bp->wol = 1;  in bnxt_hwrm_get_wol_fltrs()
11875 				bp->wol_filter_id = resp->wol_filter_id;  in bnxt_hwrm_get_wol_fltrs()
11887 	bp->wol = 0;  in bnxt_get_wol_settings()
11888 	if (!BNXT_PF(bp) || !(bp->flags & BNXT_FLAG_WOL_CAP))  in bnxt_get_wol_settings()
11898 	struct ethtool_keee *eee = &bp->eee;  in bnxt_eee_config_ok()
11899 	struct bnxt_link_info *link_info = &bp->link_info;  in bnxt_eee_config_ok()
11901 	if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP))  in bnxt_eee_config_ok()
11904 	if (eee->eee_enabled) {  in bnxt_eee_config_ok()
11908 		_bnxt_fw_to_linkmode(advertising, link_info->advertising);  in bnxt_eee_config_ok()
11910 		if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {  in bnxt_eee_config_ok()
11911 			eee->eee_enabled = 0;  in bnxt_eee_config_ok()
11914 		if (linkmode_andnot(tmp, eee->advertised, advertising)) {  in bnxt_eee_config_ok()
11915 			linkmode_and(eee->advertised, advertising,  in bnxt_eee_config_ok()
11916 				     eee->supported);  in bnxt_eee_config_ok()
11929 	struct bnxt_link_info *link_info = &bp->link_info;  in bnxt_update_phy_setting()
11933 		netdev_err(bp->dev, "failed to update link (rc: %x)\n",  in bnxt_update_phy_setting()
11940 	if ((link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) &&  in bnxt_update_phy_setting()
11941 	    (link_info->auto_pause_setting & BNXT_LINK_PAUSE_BOTH) !=  in bnxt_update_phy_setting()
11942 	    link_info->req_flow_ctrl)  in bnxt_update_phy_setting()
11944 	if (!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) &&  in bnxt_update_phy_setting()
11945 	    link_info->force_pause_setting != link_info->req_flow_ctrl)  in bnxt_update_phy_setting()
11947 	if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {  in bnxt_update_phy_setting()
11948 		if (BNXT_AUTO_MODE(link_info->auto_mode))  in bnxt_update_phy_setting()
11952 		if (link_info->req_duplex != link_info->duplex_setting)  in bnxt_update_phy_setting()
11955 		if (link_info->auto_mode == BNXT_LINK_AUTO_NONE)  in bnxt_update_phy_setting()
11975 		netdev_err(bp->dev, "failed to update phy setting (rc: %x)\n",  in bnxt_update_phy_setting()
11989 	if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state))  in bnxt_reinit_after_abort()
11990 		return -EBUSY;  in bnxt_reinit_after_abort()
11992 	if (bp->dev->reg_state == NETREG_UNREGISTERED)  in bnxt_reinit_after_abort()
11993 		return -ENODEV;  in bnxt_reinit_after_abort()
12000 			clear_bit(BNXT_STATE_ABORT_ERR, &bp->state);  in bnxt_reinit_after_abort()
12001 			set_bit(BNXT_STATE_FW_RESET_DET, &bp->state);  in bnxt_reinit_after_abort()
12012 	if (list_empty(&fltr->list))  in bnxt_cfg_one_usr_fltr()
12015 	if (fltr->type == BNXT_FLTR_TYPE_NTUPLE) {  in bnxt_cfg_one_usr_fltr()
12017 		l2_fltr = bp->vnic_info[BNXT_VNIC_DEFAULT].l2_filters[0];  in bnxt_cfg_one_usr_fltr()
12018 		atomic_inc(&l2_fltr->refcnt);  in bnxt_cfg_one_usr_fltr()
12019 		ntp_fltr->l2_fltr = l2_fltr;  in bnxt_cfg_one_usr_fltr()
12022 			netdev_err(bp->dev, "restoring previously configured ntuple filter id %d failed\n",  in bnxt_cfg_one_usr_fltr()
12023 				   fltr->sw_id);  in bnxt_cfg_one_usr_fltr()
12025 	} else if (fltr->type == BNXT_FLTR_TYPE_L2) {  in bnxt_cfg_one_usr_fltr()
12029 			netdev_err(bp->dev, "restoring previously configured l2 filter id %d failed\n",  in bnxt_cfg_one_usr_fltr()
12030 				   fltr->sw_id);  in bnxt_cfg_one_usr_fltr()
12039 	list_for_each_entry_safe(usr_fltr, tmp, &bp->usr_fltr_list, list)  in bnxt_cfg_usr_fltrs()
12045 	int numa_node = dev_to_node(&bp->pdev->dev);  in bnxt_set_xps_mapping()
12052 	q_map = kcalloc(bp->tx_nr_rings_per_tc, sizeof(*q_map), GFP_KERNEL);  in bnxt_set_xps_mapping()
12054 		return -ENOMEM;  in bnxt_set_xps_mapping()
12061 		map_idx = i % bp->tx_nr_rings_per_tc;  in bnxt_set_xps_mapping()
12068 	for (q_idx = 0; q_idx < bp->dev->real_num_tx_queues; q_idx++) {  in bnxt_set_xps_mapping()
12069 		map_idx = q_idx % bp->tx_nr_rings_per_tc;  in bnxt_set_xps_mapping()
12070 		rc = netif_set_xps_queue(bp->dev, &q_map[map_idx], q_idx);  in bnxt_set_xps_mapping()
12072 			netdev_warn(bp->dev, "Error setting XPS for q:%d\n",  in bnxt_set_xps_mapping()
12087 	netif_carrier_off(bp->dev);  in __bnxt_open_nic()
12092 			netdev_err(bp->dev, "Failed to reserve default rings at open\n");  in __bnxt_open_nic()
12102 		netdev_err(bp->dev, "bnxt_alloc_mem err: %x\n", rc);  in __bnxt_open_nic()
12110 			netdev_err(bp->dev, "bnxt_request_irq err: %x\n", rc);  in __bnxt_open_nic()
12117 		netdev_err(bp->dev, "bnxt_init_nic err: %x\n", rc);  in __bnxt_open_nic()
12125 		mutex_lock(&bp->link_lock);  in __bnxt_open_nic()
12127 		mutex_unlock(&bp->link_lock);  in __bnxt_open_nic()
12129 			netdev_warn(bp->dev, "failed to update phy settings\n");  in __bnxt_open_nic()
12131 				bp->link_info.phy_retry = true;  in __bnxt_open_nic()
12132 				bp->link_info.phy_retry_expires =  in __bnxt_open_nic()
12139 		udp_tunnel_nic_reset_ntf(bp->dev);  in __bnxt_open_nic()
12142 			netdev_warn(bp->dev, "failed to set xps mapping\n");  in __bnxt_open_nic()
12145 	if (bp->tx_nr_rings_xdp < num_possible_cpus()) {  in __bnxt_open_nic()
12151 	set_bit(BNXT_STATE_OPEN, &bp->state);  in __bnxt_open_nic()
12155 	mod_timer(&bp->timer, jiffies + bp->current_interval);  in __bnxt_open_nic()
12157 	mutex_lock(&bp->link_lock);  in __bnxt_open_nic()
12159 	mutex_unlock(&bp->link_lock);  in __bnxt_open_nic()
12161 	/* VF-reps may need to be re-opened after the PF is re-opened */  in __bnxt_open_nic()
12164 	if (bp->ptp_cfg && !(bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP))  in __bnxt_open_nic()
12165 		WRITE_ONCE(bp->ptp_cfg->tx_avail, BNXT_MAX_TX_TS);  in __bnxt_open_nic()
12188 	if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state))  in bnxt_open_nic()
12189 		rc = -EIO;  in bnxt_open_nic()
12193 		netdev_err(bp->dev, "nic open fail (rc: %x)\n", rc);  in bnxt_open_nic()
12194 		dev_close(bp->dev);  in bnxt_open_nic()
12207 	if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state)) {  in bnxt_half_open_nic()
12208 		netdev_err(bp->dev, "A previous firmware reset has not completed, aborting half open\n");  in bnxt_half_open_nic()
12209 		rc = -ENODEV;  in bnxt_half_open_nic()
12215 		netdev_err(bp->dev, "bnxt_alloc_mem err: %x\n", rc);  in bnxt_half_open_nic()
12219 	set_bit(BNXT_STATE_HALF_OPEN, &bp->state);  in bnxt_half_open_nic()
12222 		clear_bit(BNXT_STATE_HALF_OPEN, &bp->state);  in bnxt_half_open_nic()
12224 		netdev_err(bp->dev, "bnxt_init_nic err: %x\n", rc);  in bnxt_half_open_nic()
12232 	dev_close(bp->dev);  in bnxt_half_open_nic()
12245 	clear_bit(BNXT_STATE_HALF_OPEN, &bp->state);  in bnxt_half_close_nic()
12251 		struct bnxt_pf_info *pf = &bp->pf;  in bnxt_reenable_sriov()
12252 		int n = pf->active_vfs;  in bnxt_reenable_sriov()
12264 	if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state)) {  in bnxt_open()
12267 			if (rc == -EBUSY)  in bnxt_open()
12268 				netdev_err(bp->dev, "A previous firmware reset has not completed, aborting\n");  in bnxt_open()
12270 				netdev_err(bp->dev, "Failed to reinitialize after aborted firmware reset\n");  in bnxt_open()
12271 			return -ENODEV;  in bnxt_open()
12283 		if (test_and_clear_bit(BNXT_STATE_FW_RESET_DET, &bp->state)) {  in bnxt_open()
12284 			if (!test_bit(BNXT_STATE_IN_FW_RESET, &bp->state))  in bnxt_open()
12295 	return (test_bit(BNXT_STATE_IN_SP_TASK, &bp->state) ||  in bnxt_drv_busy()
12296 		test_bit(BNXT_STATE_READ_STATS, &bp->state));  in bnxt_drv_busy()
12305 	/* Close the VF-reps before closing PF */  in __bnxt_close_nic()
12312 	clear_bit(BNXT_STATE_OPEN, &bp->state);  in __bnxt_close_nic()
12326 	del_timer_sync(&bp->timer);  in __bnxt_close_nic()
12330 	if (bp->bnapi && irq_re_init) {  in __bnxt_close_nic()
12331 		bnxt_get_ring_stats(bp, &bp->net_stats_prev);  in __bnxt_close_nic()
12332 		bnxt_get_ring_err_stats(bp, &bp->ring_err_stats_prev);  in __bnxt_close_nic()
12343 	if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) {  in bnxt_close_nic()
12351 		netdev_warn(bp->dev, "FW reset in progress during close, FW reset will be aborted\n");  in bnxt_close_nic()
12352 		set_bit(BNXT_STATE_ABORT_ERR, &bp->state);  in bnxt_close_nic()
12356 	if (bp->sriov_cfg) {  in bnxt_close_nic()
12359 		rc = wait_event_interruptible_timeout(bp->sriov_cfg_wait,  in bnxt_close_nic()
12360 						      !bp->sriov_cfg,  in bnxt_close_nic()
12363 …netdev_warn(bp->dev, "timeout waiting for SRIOV config operation to complete, proceeding to close!…  in bnxt_close_nic()
12365 			netdev_warn(bp->dev, "SRIOV config operation interrupted, proceeding to close!\n");  in bnxt_close_nic()
12388 	if (bp->hwrm_spec_code < 0x10a00)  in bnxt_hwrm_port_phy_read()
12389 		return -EOPNOTSUPP;  in bnxt_hwrm_port_phy_read()
12395 	req->port_id = cpu_to_le16(bp->pf.port_id);  in bnxt_hwrm_port_phy_read()
12396 	req->phy_addr = phy_addr;  in bnxt_hwrm_port_phy_read()
12397 	req->reg_addr = cpu_to_le16(reg & 0x1f);  in bnxt_hwrm_port_phy_read()
12399 		req->cl45_mdio = 1;  in bnxt_hwrm_port_phy_read()
12400 		req->phy_addr = mdio_phy_id_prtad(phy_addr);  in bnxt_hwrm_port_phy_read()
12401 		req->dev_addr = mdio_phy_id_devad(phy_addr);  in bnxt_hwrm_port_phy_read()
12402 		req->reg_addr = cpu_to_le16(reg);  in bnxt_hwrm_port_phy_read()
12408 		*val = le16_to_cpu(resp->reg_data);  in bnxt_hwrm_port_phy_read()
12419 	if (bp->hwrm_spec_code < 0x10a00)  in bnxt_hwrm_port_phy_write()
12420 		return -EOPNOTSUPP;  in bnxt_hwrm_port_phy_write()
12426 	req->port_id = cpu_to_le16(bp->pf.port_id);  in bnxt_hwrm_port_phy_write()
12427 	req->phy_addr = phy_addr;  in bnxt_hwrm_port_phy_write()
12428 	req->reg_addr = cpu_to_le16(reg & 0x1f);  in bnxt_hwrm_port_phy_write()
12430 		req->cl45_mdio = 1;  in bnxt_hwrm_port_phy_write()
12431 		req->phy_addr = mdio_phy_id_prtad(phy_addr);  in bnxt_hwrm_port_phy_write()
12432 		req->dev_addr = mdio_phy_id_devad(phy_addr);  in bnxt_hwrm_port_phy_write()
12433 		req->reg_addr = cpu_to_le16(reg);  in bnxt_hwrm_port_phy_write()
12435 	req->reg_data = cpu_to_le16(val);  in bnxt_hwrm_port_phy_write()
12449 		mdio->phy_id = bp->link_info.phy_addr;  in bnxt_ioctl()
12456 			return -EAGAIN;  in bnxt_ioctl()
12458 		rc = bnxt_hwrm_port_phy_read(bp, mdio->phy_id, mdio->reg_num,  in bnxt_ioctl()
12460 		mdio->val_out = mii_regval;  in bnxt_ioctl()
12466 			return -EAGAIN;  in bnxt_ioctl()
12468 		return bnxt_hwrm_port_phy_write(bp, mdio->phy_id, mdio->reg_num,  in bnxt_ioctl()
12469 						mdio->val_in);  in bnxt_ioctl()
12481 	return -EOPNOTSUPP;  in bnxt_ioctl()
12489 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_get_ring_stats()
12490 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_get_ring_stats()
12491 		struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_get_ring_stats()
12492 		u64 *sw = cpr->stats.sw_stats;  in bnxt_get_ring_stats()
12494 		stats->rx_packets += BNXT_GET_RING_STATS64(sw, rx_ucast_pkts);  in bnxt_get_ring_stats()
12495 		stats->rx_packets += BNXT_GET_RING_STATS64(sw, rx_mcast_pkts);  in bnxt_get_ring_stats()
12496 		stats->rx_packets += BNXT_GET_RING_STATS64(sw, rx_bcast_pkts);  in bnxt_get_ring_stats()
12498 		stats->tx_packets += BNXT_GET_RING_STATS64(sw, tx_ucast_pkts);  in bnxt_get_ring_stats()
12499 		stats->tx_packets += BNXT_GET_RING_STATS64(sw, tx_mcast_pkts);  in bnxt_get_ring_stats()
12500 		stats->tx_packets += BNXT_GET_RING_STATS64(sw, tx_bcast_pkts);  in bnxt_get_ring_stats()
12502 		stats->rx_bytes += BNXT_GET_RING_STATS64(sw, rx_ucast_bytes);  in bnxt_get_ring_stats()
12503 		stats->rx_bytes += BNXT_GET_RING_STATS64(sw, rx_mcast_bytes);  in bnxt_get_ring_stats()
12504 		stats->rx_bytes += BNXT_GET_RING_STATS64(sw, rx_bcast_bytes);  in bnxt_get_ring_stats()
12506 		stats->tx_bytes += BNXT_GET_RING_STATS64(sw, tx_ucast_bytes);  in bnxt_get_ring_stats()
12507 		stats->tx_bytes += BNXT_GET_RING_STATS64(sw, tx_mcast_bytes);  in bnxt_get_ring_stats()
12508 		stats->tx_bytes += BNXT_GET_RING_STATS64(sw, tx_bcast_bytes);  in bnxt_get_ring_stats()
12510 		stats->rx_missed_errors +=  in bnxt_get_ring_stats()
12513 		stats->multicast += BNXT_GET_RING_STATS64(sw, rx_mcast_pkts);  in bnxt_get_ring_stats()
12515 		stats->tx_dropped += BNXT_GET_RING_STATS64(sw, tx_error_pkts);  in bnxt_get_ring_stats()
12517 		stats->rx_dropped +=  in bnxt_get_ring_stats()
12518 			cpr->sw_stats->rx.rx_netpoll_discards +  in bnxt_get_ring_stats()
12519 			cpr->sw_stats->rx.rx_oom_discards;  in bnxt_get_ring_stats()
12526 	struct rtnl_link_stats64 *prev_stats = &bp->net_stats_prev;  in bnxt_add_prev_stats()
12528 	stats->rx_packets += prev_stats->rx_packets;  in bnxt_add_prev_stats()
12529 	stats->tx_packets += prev_stats->tx_packets;  in bnxt_add_prev_stats()
12530 	stats->rx_bytes += prev_stats->rx_bytes;  in bnxt_add_prev_stats()
12531 	stats->tx_bytes += prev_stats->tx_bytes;  in bnxt_add_prev_stats()
12532 	stats->rx_missed_errors += prev_stats->rx_missed_errors;  in bnxt_add_prev_stats()
12533 	stats->multicast += prev_stats->multicast;  in bnxt_add_prev_stats()
12534 	stats->rx_dropped += prev_stats->rx_dropped;  in bnxt_add_prev_stats()
12535 	stats->tx_dropped += prev_stats->tx_dropped;  in bnxt_add_prev_stats()
12543 	set_bit(BNXT_STATE_READ_STATS, &bp->state);  in bnxt_get_stats64()
12548 	if (!test_bit(BNXT_STATE_OPEN, &bp->state)) {  in bnxt_get_stats64()
12549 		clear_bit(BNXT_STATE_READ_STATS, &bp->state);  in bnxt_get_stats64()
12550 		*stats = bp->net_stats_prev;  in bnxt_get_stats64()
12557 	if (bp->flags & BNXT_FLAG_PORT_STATS) {  in bnxt_get_stats64()
12558 		u64 *rx = bp->port_stats.sw_stats;  in bnxt_get_stats64()
12559 		u64 *tx = bp->port_stats.sw_stats +  in bnxt_get_stats64()
12562 		stats->rx_crc_errors =  in bnxt_get_stats64()
12564 		stats->rx_frame_errors =  in bnxt_get_stats64()
12566 		stats->rx_length_errors =  in bnxt_get_stats64()
12570 		stats->rx_errors =  in bnxt_get_stats64()
12573 		stats->collisions =  in bnxt_get_stats64()
12575 		stats->tx_fifo_errors =  in bnxt_get_stats64()
12577 		stats->tx_errors = BNXT_GET_TX_PORT_STATS64(tx, tx_err);  in bnxt_get_stats64()
12579 	clear_bit(BNXT_STATE_READ_STATS, &bp->state);  in bnxt_get_stats64()
12586 	struct bnxt_sw_stats *sw_stats = cpr->sw_stats;  in bnxt_get_one_ring_err_stats()
12587 	u64 *hw_stats = cpr->stats.sw_stats;  in bnxt_get_one_ring_err_stats()
12589 	stats->rx_total_l4_csum_errors += sw_stats->rx.rx_l4_csum_errors;  in bnxt_get_one_ring_err_stats()
12590 	stats->rx_total_resets += sw_stats->rx.rx_resets;  in bnxt_get_one_ring_err_stats()
12591 	stats->rx_total_buf_errors += sw_stats->rx.rx_buf_errors;  in bnxt_get_one_ring_err_stats()
12592 	stats->rx_total_oom_discards += sw_stats->rx.rx_oom_discards;  in bnxt_get_one_ring_err_stats()
12593 	stats->rx_total_netpoll_discards += sw_stats->rx.rx_netpoll_discards;  in bnxt_get_one_ring_err_stats()
12594 	stats->rx_total_ring_discards +=  in bnxt_get_one_ring_err_stats()
12596 	stats->tx_total_resets += sw_stats->tx.tx_resets;  in bnxt_get_one_ring_err_stats()
12597 	stats->tx_total_ring_discards +=  in bnxt_get_one_ring_err_stats()
12599 	stats->total_missed_irqs += sw_stats->cmn.missed_irqs;  in bnxt_get_one_ring_err_stats()
12607 	for (i = 0; i < bp->cp_nr_rings; i++)  in bnxt_get_ring_err_stats()
12608 		bnxt_get_one_ring_err_stats(bp, stats, &bp->bnapi[i]->cp_ring);  in bnxt_get_ring_err_stats()
12613 	struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT];  in bnxt_mc_list_updated()
12614 	struct net_device *dev = bp->dev;  in bnxt_mc_list_updated()
12624 			vnic->mc_list_count = 0;  in bnxt_mc_list_updated()
12627 		haddr = ha->addr;  in bnxt_mc_list_updated()
12628 		if (!ether_addr_equal(haddr, vnic->mc_list + off)) {  in bnxt_mc_list_updated()
12629 			memcpy(vnic->mc_list + off, haddr, ETH_ALEN);  in bnxt_mc_list_updated()
12638 	if (mc_count != vnic->mc_list_count) {  in bnxt_mc_list_updated()
12639 		vnic->mc_list_count = mc_count;  in bnxt_mc_list_updated()
12647 	struct net_device *dev = bp->dev;  in bnxt_uc_list_updated()
12648 	struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT];  in bnxt_uc_list_updated()
12652 	if (netdev_uc_count(dev) != (vnic->uc_filter_count - 1))  in bnxt_uc_list_updated()
12656 		if (!ether_addr_equal(ha->addr, vnic->uc_list + off))  in bnxt_uc_list_updated()
12672 	if (!test_bit(BNXT_STATE_OPEN, &bp->state))  in bnxt_set_rx_mode()
12675 	vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT];  in bnxt_set_rx_mode()
12676 	mask = vnic->rx_mask;  in bnxt_set_rx_mode()
12682 	if (dev->flags & IFF_PROMISC)  in bnxt_set_rx_mode()
12687 	if (dev->flags & IFF_BROADCAST)  in bnxt_set_rx_mode()
12689 	if (dev->flags & IFF_ALLMULTI) {  in bnxt_set_rx_mode()
12691 		vnic->mc_list_count = 0;  in bnxt_set_rx_mode()
12692 	} else if (dev->flags & IFF_MULTICAST) {  in bnxt_set_rx_mode()
12696 	if (mask != vnic->rx_mask || uc_update || mc_update) {  in bnxt_set_rx_mode()
12697 		vnic->rx_mask = mask;  in bnxt_set_rx_mode()
12705 	struct net_device *dev = bp->dev;  in bnxt_cfg_rx_mode()
12706 	struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT];  in bnxt_cfg_rx_mode()
12718 	for (i = 1; i < vnic->uc_filter_count; i++) {  in bnxt_cfg_rx_mode()
12719 		struct bnxt_l2_filter *fltr = vnic->l2_filters[i];  in bnxt_cfg_rx_mode()
12725 	vnic->uc_filter_count = 1;  in bnxt_cfg_rx_mode()
12728 	if (netdev_uc_count(dev) > (BNXT_MAX_UC_ADDRS - 1)) {  in bnxt_cfg_rx_mode()
12729 		vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS;  in bnxt_cfg_rx_mode()
12732 			memcpy(vnic->uc_list + off, ha->addr, ETH_ALEN);  in bnxt_cfg_rx_mode()
12734 			vnic->uc_filter_count++;  in bnxt_cfg_rx_mode()
12739 	for (i = 1, off = 0; i < vnic->uc_filter_count; i++, off += ETH_ALEN) {  in bnxt_cfg_rx_mode()
12740 		rc = bnxt_hwrm_set_vnic_filter(bp, 0, i, vnic->uc_list + off);  in bnxt_cfg_rx_mode()
12742 			if (BNXT_VF(bp) && rc == -ENODEV) {  in bnxt_cfg_rx_mode()
12743 				if (!test_and_set_bit(BNXT_STATE_L2_FILTER_RETRY, &bp->state))  in bnxt_cfg_rx_mode()
12744 					netdev_warn(bp->dev, "Cannot configure L2 filters while PF is unavailable, will retry\n");  in bnxt_cfg_rx_mode()
12746 					netdev_dbg(bp->dev, "PF still unavailable while configuring L2 filters.\n");  in bnxt_cfg_rx_mode()
12749 				netdev_err(bp->dev, "HWRM vnic filter failure rc: %x\n", rc);  in bnxt_cfg_rx_mode()
12751 			vnic->uc_filter_count = i;  in bnxt_cfg_rx_mode()
12755 	if (test_and_clear_bit(BNXT_STATE_L2_FILTER_RETRY, &bp->state))  in bnxt_cfg_rx_mode()
12756 		netdev_notice(bp->dev, "Retry of L2 filter configuration successful.\n");  in bnxt_cfg_rx_mode()
12759 	if ((vnic->rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS) &&  in bnxt_cfg_rx_mode()
12761 		vnic->rx_mask &= ~CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS;  in bnxt_cfg_rx_mode()
12763 	if (rc && (vnic->rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_MCAST)) {  in bnxt_cfg_rx_mode()
12764 		netdev_info(bp->dev, "Failed setting MC filters rc: %d, turning on ALL_MCAST mode\n",  in bnxt_cfg_rx_mode()
12766 		vnic->rx_mask &= ~CFA_L2_SET_RX_MASK_REQ_MASK_MCAST;  in bnxt_cfg_rx_mode()
12767 		vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST;  in bnxt_cfg_rx_mode()
12768 		vnic->mc_list_count = 0;  in bnxt_cfg_rx_mode()
12772 		netdev_err(bp->dev, "HWRM cfa l2 rx mask failure rc: %d\n",  in bnxt_cfg_rx_mode()
12782 		struct bnxt_hw_resc *hw_resc = &bp->hw_resc;  in bnxt_can_reserve_rings()
12787 		if (hw_resc->min_tx_rings || hw_resc->resv_tx_rings)  in bnxt_can_reserve_rings()
12790 		if (!netif_running(bp->dev))  in bnxt_can_reserve_rings()
12800 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in bnxt_rfs_supported()
12801 		if (bp->fw_cap & BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V2)  in bnxt_rfs_supported()
12810 	if (bp->rss_cap & BNXT_RSS_CAP_NEW_RSS_CAP)  in bnxt_rfs_supported()
12821 	if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) &&  in bnxt_rfs_capable()
12825 	if (!bnxt_can_reserve_rings(bp) || !bp->rx_nr_rings)  in bnxt_rfs_capable()
12828 	hwr.grp = bp->rx_nr_rings;  in bnxt_rfs_capable()
12829 	hwr.vnic = bnxt_get_total_vnics(bp, bp->rx_nr_rings);  in bnxt_rfs_capable()
12837 		if (bp->rx_nr_rings > 1)  in bnxt_rfs_capable()
12838 			netdev_warn(bp->dev,  in bnxt_rfs_capable()
12840 				    min(max_rss_ctxs - 1, max_vnics - 1));  in bnxt_rfs_capable()
12851 	if (hwr.vnic <= bp->hw_resc.resv_vnics &&  in bnxt_rfs_capable()
12852 	    hwr.rss_ctx <= bp->hw_resc.resv_rsscos_ctxs)  in bnxt_rfs_capable()
12856 	if (hwr.vnic <= bp->hw_resc.resv_vnics &&  in bnxt_rfs_capable()
12857 	    hwr.rss_ctx <= bp->hw_resc.resv_rsscos_ctxs)  in bnxt_rfs_capable()
12860 	netdev_warn(bp->dev, "Unable to reserve resources to support NTUPLE filters.\n");  in bnxt_rfs_capable()
12876 	if ((bp->flags & BNXT_FLAG_NO_AGG_RINGS) || bp->xdp_prog)  in bnxt_fix_features()
12890 		if (dev->features & BNXT_HW_FEATURE_VLAN_ALL_RX)  in bnxt_fix_features()
12896 	if (BNXT_VF(bp) && bp->vf.vlan)  in bnxt_fix_features()
12906 	bp->flags = flags;  in bnxt_reinit_features()
12916 	u32 flags = bp->flags;  in bnxt_set_features()
12927 	if (bp->flags & BNXT_FLAG_NO_AGG_RINGS)  in bnxt_set_features()
12938 	changes = flags ^ bp->flags;  in bnxt_set_features()
12941 		if ((bp->flags & BNXT_FLAG_TPA) == 0 ||  in bnxt_set_features()
12943 		    (bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_set_features()
12953 	if (flags != bp->flags) {  in bnxt_set_features()
12954 		u32 old_flags = bp->flags;  in bnxt_set_features()
12956 		if (!test_bit(BNXT_STATE_OPEN, &bp->state)) {  in bnxt_set_features()
12957 			bp->flags = flags;  in bnxt_set_features()
12970 			bp->flags = flags;  in bnxt_set_features()
12975 				bp->flags = old_flags;  in bnxt_set_features()
12984 	struct ipv6hdr *ip6h = (struct ipv6hdr *)(skb->data + nw_off);  in bnxt_exthdr_check()
12994 	nexthdr = &ip6h->nexthdr;  in bnxt_exthdr_check()
13002 		hp = __skb_header_pointer(NULL, start, sizeof(*hp), skb->data,  in bnxt_exthdr_check()
13014 		/* The ext header may be a hop-by-hop header inserted for  in bnxt_exthdr_check()
13019 			if (likely(skb->len <= GRO_LEGACY_MAX_SIZE))  in bnxt_exthdr_check()
13023 			if (jhdr->tlv_type != IPV6_TLV_JUMBO || jhdr->hdrlen != 0 ||  in bnxt_exthdr_check()
13024 			    jhdr->nexthdr != IPPROTO_TCP)  in bnxt_exthdr_check()
13032 		nexthdr = &hp->nexthdr;  in bnxt_exthdr_check()
13037 		if (skb->encapsulation) {  in bnxt_exthdr_check()
13043 	/* Only support TCP/UDP for non-tunneled ipv6 and inner ipv6 */  in bnxt_exthdr_check()
13051 	__be16 udp_port = uh->dest;  in bnxt_udp_tunl_check()
13053 	if (udp_port != bp->vxlan_port && udp_port != bp->nge_port &&  in bnxt_udp_tunl_check()
13054 	    udp_port != bp->vxlan_gpe_port)  in bnxt_udp_tunl_check()
13056 	if (skb->inner_protocol == htons(ETH_P_TEB)) {  in bnxt_udp_tunl_check()
13059 		switch (eh->h_proto) {  in bnxt_udp_tunl_check()
13067 	} else if (skb->inner_protocol == htons(ETH_P_IP)) {  in bnxt_udp_tunl_check()
13069 	} else if (skb->inner_protocol == htons(ETH_P_IPV6)) {  in bnxt_udp_tunl_check()
13084 		switch (skb->inner_protocol) {  in bnxt_tunl_check()
13111 		if (!skb->encapsulation)  in bnxt_features_check()
13113 		l4_proto = &ip_hdr(skb)->protocol;  in bnxt_features_check()
13144 		rc = -ENOMEM;  in bnxt_dbg_hwrm_rd_reg()
13148 	req->host_dest_addr = cpu_to_le64(mapping);  in bnxt_dbg_hwrm_rd_reg()
13151 	req->read_addr = cpu_to_le32(reg_off + CHIMP_REG_VIEW_ADDR);  in bnxt_dbg_hwrm_rd_reg()
13152 	req->read_len32 = cpu_to_le32(num_words);  in bnxt_dbg_hwrm_rd_reg()
13155 	if (rc || resp->error_code) {  in bnxt_dbg_hwrm_rd_reg()
13156 		rc = -EIO;  in bnxt_dbg_hwrm_rd_reg()
13178 	req->ring_type = ring_type;  in bnxt_dbg_hwrm_ring_info_get()
13179 	req->fw_ring_id = cpu_to_le32(ring_id);  in bnxt_dbg_hwrm_ring_info_get()
13183 		*prod = le32_to_cpu(resp->producer_index);  in bnxt_dbg_hwrm_ring_info_get()
13184 		*cons = le32_to_cpu(resp->consumer_index);  in bnxt_dbg_hwrm_ring_info_get()
13193 	int i = bnapi->index, j;  in bnxt_dump_tx_sw_state()
13196 		netdev_info(bnapi->bp->dev, "[%d.%d]: tx{fw_ring: %d prod: %x cons: %x}\n",  in bnxt_dump_tx_sw_state()
13197 			    i, j, txr->tx_ring_struct.fw_ring_id, txr->tx_prod,  in bnxt_dump_tx_sw_state()
13198 			    txr->tx_cons);  in bnxt_dump_tx_sw_state()
13203 	struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;  in bnxt_dump_rx_sw_state()
13204 	int i = bnapi->index;  in bnxt_dump_rx_sw_state()
13209 …netdev_info(bnapi->bp->dev, "[%d]: rx{fw_ring: %d prod: %x} rx_agg{fw_ring: %d agg_prod: %x sw_agg…  in bnxt_dump_rx_sw_state()
13210 		    i, rxr->rx_ring_struct.fw_ring_id, rxr->rx_prod,  in bnxt_dump_rx_sw_state()
13211 		    rxr->rx_agg_ring_struct.fw_ring_id, rxr->rx_agg_prod,  in bnxt_dump_rx_sw_state()
13212 		    rxr->rx_sw_agg_prod);  in bnxt_dump_rx_sw_state()
13217 	struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;  in bnxt_dump_cp_sw_state()
13218 	int i = bnapi->index;  in bnxt_dump_cp_sw_state()
13220 	netdev_info(bnapi->bp->dev, "[%d]: cp{fw_ring: %d raw_cons: %x}\n",  in bnxt_dump_cp_sw_state()
13221 		    i, cpr->cp_ring_struct.fw_ring_id, cpr->cp_raw_cons);  in bnxt_dump_cp_sw_state()
13229 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_dbg_dump_states()
13230 		bnapi = bp->bnapi[i];  in bnxt_dbg_dump_states()
13241 	struct bnxt_rx_ring_info *rxr = &bp->rx_ring[ring_nr];  in bnxt_hwrm_rx_ring_reset()
13243 	struct bnxt_napi *bnapi = rxr->bnapi;  in bnxt_hwrm_rx_ring_reset()
13252 	cpr = &bnapi->cp_ring;  in bnxt_hwrm_rx_ring_reset()
13253 	cp_ring_id = cpr->cp_ring_struct.fw_ring_id;  in bnxt_hwrm_rx_ring_reset()
13254 	req->cmpl_ring = cpu_to_le16(cp_ring_id);  in bnxt_hwrm_rx_ring_reset()
13255 	req->ring_type = RING_RESET_REQ_RING_TYPE_RX_RING_GRP;  in bnxt_hwrm_rx_ring_reset()
13256 	req->ring_id = cpu_to_le16(bp->grp_info[bnapi->index].fw_grp_id);  in bnxt_hwrm_rx_ring_reset()
13264 	if (netif_running(bp->dev)) {  in bnxt_reset_task()
13274 	netdev_err(bp->dev,  "TX timeout detected, starting reset task!\n");  in bnxt_tx_timeout()
13280 	struct bnxt_fw_health *fw_health = bp->fw_health;  in bnxt_fw_health_check()
13281 	struct pci_dev *pdev = bp->pdev;  in bnxt_fw_health_check()
13284 	if (!fw_health->enabled || test_bit(BNXT_STATE_IN_FW_RESET, &bp->state))  in bnxt_fw_health_check()
13289 	if (fw_health->tmr_counter) {  in bnxt_fw_health_check()
13290 		fw_health->tmr_counter--;  in bnxt_fw_health_check()
13295 	if (val == fw_health->last_fw_heartbeat && pci_device_is_present(pdev)) {  in bnxt_fw_health_check()
13296 		fw_health->arrests++;  in bnxt_fw_health_check()
13300 	fw_health->last_fw_heartbeat = val;  in bnxt_fw_health_check()
13303 	if (val != fw_health->last_fw_reset_cnt && pci_device_is_present(pdev)) {  in bnxt_fw_health_check()
13304 		fw_health->discoveries++;  in bnxt_fw_health_check()
13308 	fw_health->tmr_counter = fw_health->tmr_multiplier;  in bnxt_fw_health_check()
13318 	struct net_device *dev = bp->dev;  in bnxt_timer()
13320 	if (!netif_running(dev) || !test_bit(BNXT_STATE_OPEN, &bp->state))  in bnxt_timer()
13323 	if (atomic_read(&bp->intr_sem) != 0)  in bnxt_timer()
13326 	if (bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY)  in bnxt_timer()
13329 	if (BNXT_LINK_IS_UP(bp) && bp->stats_coal_ticks)  in bnxt_timer()
13336 	if ((bp->flags & BNXT_FLAG_RFS) && bp->ntp_fltr_count)  in bnxt_timer()
13340 	if (bp->link_info.phy_retry) {  in bnxt_timer()
13341 		if (time_after(jiffies, bp->link_info.phy_retry_expires)) {  in bnxt_timer()
13342 			bp->link_info.phy_retry = false;  in bnxt_timer()
13343 			netdev_warn(bp->dev, "failed to update phy settings after maximum retries.\n");  in bnxt_timer()
13349 	if (test_bit(BNXT_STATE_L2_FILTER_RETRY, &bp->state))  in bnxt_timer()
13352 	if ((BNXT_CHIP_P5(bp)) && !bp->chip_rev && netif_carrier_ok(dev))  in bnxt_timer()
13356 	mod_timer(&bp->timer, jiffies + bp->current_interval);  in bnxt_timer()
13366 	clear_bit(BNXT_STATE_IN_SP_TASK, &bp->state);  in bnxt_rtnl_lock_sp()
13372 	set_bit(BNXT_STATE_IN_SP_TASK, &bp->state);  in bnxt_rtnl_unlock_sp()
13380 	if (test_bit(BNXT_STATE_OPEN, &bp->state))  in bnxt_reset()
13391 	if (!test_bit(BNXT_STATE_OPEN, &bp->state)) {  in bnxt_rx_ring_reset()
13396 	if (bp->flags & BNXT_FLAG_TPA)  in bnxt_rx_ring_reset()
13398 	for (i = 0; i < bp->rx_nr_rings; i++) {  in bnxt_rx_ring_reset()
13399 		struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];  in bnxt_rx_ring_reset()
13403 		if (!rxr->bnapi->in_reset)  in bnxt_rx_ring_reset()
13408 			if (rc == -EINVAL || rc == -EOPNOTSUPP)  in bnxt_rx_ring_reset()
13409 …netdev_info_once(bp->dev, "RX ring reset not supported by firmware, falling back to global reset\n…  in bnxt_rx_ring_reset()
13411 				netdev_warn(bp->dev, "RX ring reset failed, rc = %d, falling back to global reset\n",  in bnxt_rx_ring_reset()
13417 		rxr->rx_prod = 0;  in bnxt_rx_ring_reset()
13418 		rxr->rx_agg_prod = 0;  in bnxt_rx_ring_reset()
13419 		rxr->rx_sw_agg_prod = 0;  in bnxt_rx_ring_reset()
13420 		rxr->rx_next_cons = 0;  in bnxt_rx_ring_reset()
13421 		rxr->bnapi->in_reset = false;  in bnxt_rx_ring_reset()
13423 		cpr = &rxr->bnapi->cp_ring;  in bnxt_rx_ring_reset()
13424 		cpr->sw_stats->rx.rx_resets++;  in bnxt_rx_ring_reset()
13425 		if (bp->flags & BNXT_FLAG_AGG_RINGS)  in bnxt_rx_ring_reset()
13426 			bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod);  in bnxt_rx_ring_reset()
13427 		bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod);  in bnxt_rx_ring_reset()
13429 	if (bp->flags & BNXT_FLAG_TPA)  in bnxt_rx_ring_reset()
13441 	pci_disable_device(bp->pdev);  in bnxt_fw_fatal_close()
13450 	if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state)) {  in bnxt_fw_reset_close()
13453 		pci_read_config_word(bp->pdev, PCI_SUBSYSTEM_ID, &val);  in bnxt_fw_reset_close()
13455 			bp->fw_reset_min_dsecs = 0;  in bnxt_fw_reset_close()
13462 	if (pci_is_enabled(bp->pdev))  in bnxt_fw_reset_close()
13463 		pci_disable_device(bp->pdev);  in bnxt_fw_reset_close()
13469 	struct bnxt_fw_health *fw_health = bp->fw_health;  in is_bnxt_fw_ok()
13474 	if (val == fw_health->last_fw_heartbeat)  in is_bnxt_fw_ok()
13478 	if (val != fw_health->last_fw_reset_cnt)  in is_bnxt_fw_ok()
13490 	struct bnxt_fw_health *fw_health = bp->fw_health;  in bnxt_force_fw_reset()
13491 	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;  in bnxt_force_fw_reset()
13494 	if (!test_bit(BNXT_STATE_OPEN, &bp->state) ||  in bnxt_force_fw_reset()
13495 	    test_bit(BNXT_STATE_IN_FW_RESET, &bp->state))  in bnxt_force_fw_reset()
13501 		spin_lock_irqsave(&ptp->ptp_lock, flags);  in bnxt_force_fw_reset()
13502 		set_bit(BNXT_STATE_IN_FW_RESET, &bp->state);  in bnxt_force_fw_reset()
13503 		spin_unlock_irqrestore(&ptp->ptp_lock, flags);  in bnxt_force_fw_reset()
13505 		set_bit(BNXT_STATE_IN_FW_RESET, &bp->state);  in bnxt_force_fw_reset()
13508 	wait_dsecs = fw_health->master_func_wait_dsecs;  in bnxt_force_fw_reset()
13509 	if (fw_health->primary) {  in bnxt_force_fw_reset()
13510 		if (fw_health->flags & ERROR_RECOVERY_QCFG_RESP_FLAGS_CO_CPU)  in bnxt_force_fw_reset()
13512 		bp->fw_reset_state = BNXT_FW_RESET_STATE_RESET_FW;  in bnxt_force_fw_reset()
13514 		bp->fw_reset_timestamp = jiffies + wait_dsecs * HZ / 10;  in bnxt_force_fw_reset()
13515 		wait_dsecs = fw_health->normal_func_wait_dsecs;  in bnxt_force_fw_reset()
13516 		bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV;  in bnxt_force_fw_reset()
13519 	bp->fw_reset_min_dsecs = fw_health->post_reset_wait_dsecs;  in bnxt_force_fw_reset()
13520 	bp->fw_reset_max_dsecs = fw_health->post_reset_max_wait_dsecs;  in bnxt_force_fw_reset()
13526 	netdev_warn(bp->dev, "Detected firmware fatal condition, initiating reset\n");  in bnxt_fw_exception()
13527 	set_bit(BNXT_STATE_FW_FATAL_COND, &bp->state);  in bnxt_fw_exception()
13547 		netdev_err(bp->dev, "func_qcfg cmd failed, rc = %d\n", rc);  in bnxt_get_registered_vfs()
13550 	if (bp->pf.registered_vfs)  in bnxt_get_registered_vfs()
13551 		return bp->pf.registered_vfs;  in bnxt_get_registered_vfs()
13552 	if (bp->sriov_cfg)  in bnxt_get_registered_vfs()
13562 	if (test_bit(BNXT_STATE_OPEN, &bp->state) &&  in bnxt_fw_reset()
13563 	    !test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) {  in bnxt_fw_reset()
13564 		struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;  in bnxt_fw_reset()
13570 			spin_lock_irqsave(&ptp->ptp_lock, flags);  in bnxt_fw_reset()
13571 			set_bit(BNXT_STATE_IN_FW_RESET, &bp->state);  in bnxt_fw_reset()
13572 			spin_unlock_irqrestore(&ptp->ptp_lock, flags);  in bnxt_fw_reset()
13574 			set_bit(BNXT_STATE_IN_FW_RESET, &bp->state);  in bnxt_fw_reset()
13576 		if (bp->pf.active_vfs &&  in bnxt_fw_reset()
13577 		    !test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state))  in bnxt_fw_reset()
13580 			netdev_err(bp->dev, "Firmware reset aborted, rc = %d\n",  in bnxt_fw_reset()
13582 			clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);  in bnxt_fw_reset()
13583 			dev_close(bp->dev);  in bnxt_fw_reset()
13588 			if (bp->fw_reset_max_dsecs < vf_tmo_dsecs)  in bnxt_fw_reset()
13589 				bp->fw_reset_max_dsecs = vf_tmo_dsecs;  in bnxt_fw_reset()
13590 			bp->fw_reset_state =  in bnxt_fw_reset()
13596 		if (bp->fw_cap & BNXT_FW_CAP_ERR_RECOVER_RELOAD) {  in bnxt_fw_reset()
13597 			bp->fw_reset_state = BNXT_FW_RESET_STATE_POLL_FW_DOWN;  in bnxt_fw_reset()
13600 			bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV;  in bnxt_fw_reset()
13601 			tmo = bp->fw_reset_min_dsecs * HZ / 10;  in bnxt_fw_reset()
13613 	if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in bnxt_chk_missed_irq()
13616 	for (i = 0; i < bp->cp_nr_rings; i++) {  in bnxt_chk_missed_irq()
13617 		struct bnxt_napi *bnapi = bp->bnapi[i];  in bnxt_chk_missed_irq()
13625 		cpr = &bnapi->cp_ring;  in bnxt_chk_missed_irq()
13626 		for (j = 0; j < cpr->cp_ring_count; j++) {  in bnxt_chk_missed_irq()
13627 			struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[j];  in bnxt_chk_missed_irq()
13630 			if (cpr2->has_more_work || !bnxt_has_work(bp, cpr2))  in bnxt_chk_missed_irq()
13633 			if (cpr2->cp_raw_cons != cpr2->last_cp_raw_cons) {  in bnxt_chk_missed_irq()
13634 				cpr2->last_cp_raw_cons = cpr2->cp_raw_cons;  in bnxt_chk_missed_irq()
13637 			fw_ring_id = cpr2->cp_ring_struct.fw_ring_id;  in bnxt_chk_missed_irq()
13641 			cpr->sw_stats->cmn.missed_irqs++;  in bnxt_chk_missed_irq()
13650 	struct bnxt_link_info *link_info = &bp->link_info;  in bnxt_init_ethtool_link_settings()
13652 	if (BNXT_AUTO_MODE(link_info->auto_mode)) {  in bnxt_init_ethtool_link_settings()
13653 		link_info->autoneg = BNXT_AUTONEG_SPEED;  in bnxt_init_ethtool_link_settings()
13654 		if (bp->hwrm_spec_code >= 0x10201) {  in bnxt_init_ethtool_link_settings()
13655 			if (link_info->auto_pause_setting &  in bnxt_init_ethtool_link_settings()
13657 				link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;  in bnxt_init_ethtool_link_settings()
13659 			link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;  in bnxt_init_ethtool_link_settings()
13664 		link_info->req_duplex = link_info->duplex_setting;  in bnxt_init_ethtool_link_settings()
13666 	if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)  in bnxt_init_ethtool_link_settings()
13667 		link_info->req_flow_ctrl =  in bnxt_init_ethtool_link_settings()
13668 			link_info->auto_pause_setting & BNXT_LINK_PAUSE_BOTH;  in bnxt_init_ethtool_link_settings()
13670 		link_info->req_flow_ctrl = link_info->force_pause_setting;  in bnxt_init_ethtool_link_settings()
13675 	struct bnxt_fw_health *fw_health = bp->fw_health;  in bnxt_fw_echo_reply()
13682 	req->event_data1 = cpu_to_le32(fw_health->echo_req_data1);  in bnxt_fw_echo_reply()
13683 	req->event_data2 = cpu_to_le32(fw_health->echo_req_data2);  in bnxt_fw_echo_reply()
13697 	set_bit(BNXT_STATE_IN_SP_TASK, &bp->state);  in bnxt_sp_task()
13699 	if (!test_bit(BNXT_STATE_OPEN, &bp->state)) {  in bnxt_sp_task()
13700 		clear_bit(BNXT_STATE_IN_SP_TASK, &bp->state);  in bnxt_sp_task()
13704 	if (test_and_clear_bit(BNXT_RESTART_ULP_SP_EVENT, &bp->sp_event)) {  in bnxt_sp_task()
13709 	if (test_and_clear_bit(BNXT_RX_MASK_SP_EVENT, &bp->sp_event))  in bnxt_sp_task()
13712 	if (test_and_clear_bit(BNXT_RX_NTP_FLTR_SP_EVENT, &bp->sp_event))  in bnxt_sp_task()
13714 	if (test_and_clear_bit(BNXT_HWRM_EXEC_FWD_REQ_SP_EVENT, &bp->sp_event))  in bnxt_sp_task()
13716 	if (test_and_clear_bit(BNXT_HWRM_PF_UNLOAD_SP_EVENT, &bp->sp_event))  in bnxt_sp_task()
13717 		netdev_info(bp->dev, "Receive PF driver unload event!\n");  in bnxt_sp_task()
13718 	if (test_and_clear_bit(BNXT_PERIODIC_STATS_SP_EVENT, &bp->sp_event)) {  in bnxt_sp_task()
13724 	if (test_and_clear_bit(BNXT_LINK_CHNG_SP_EVENT, &bp->sp_event)) {  in bnxt_sp_task()
13727 		mutex_lock(&bp->link_lock);  in bnxt_sp_task()
13729 				       &bp->sp_event))  in bnxt_sp_task()
13734 			netdev_err(bp->dev, "SP task can't update link (rc: %x)\n",  in bnxt_sp_task()
13738 				       &bp->sp_event))  in bnxt_sp_task()
13740 		mutex_unlock(&bp->link_lock);  in bnxt_sp_task()
13742 	if (test_and_clear_bit(BNXT_UPDATE_PHY_SP_EVENT, &bp->sp_event)) {  in bnxt_sp_task()
13745 		mutex_lock(&bp->link_lock);  in bnxt_sp_task()
13747 		mutex_unlock(&bp->link_lock);  in bnxt_sp_task()
13749 			netdev_warn(bp->dev, "update phy settings retry failed\n");  in bnxt_sp_task()
13751 			bp->link_info.phy_retry = false;  in bnxt_sp_task()
13752 			netdev_info(bp->dev, "update phy settings retry succeeded\n");  in bnxt_sp_task()
13755 	if (test_and_clear_bit(BNXT_HWRM_PORT_MODULE_SP_EVENT, &bp->sp_event)) {  in bnxt_sp_task()
13756 		mutex_lock(&bp->link_lock);  in bnxt_sp_task()
13758 		mutex_unlock(&bp->link_lock);  in bnxt_sp_task()
13761 	if (test_and_clear_bit(BNXT_FLOW_STATS_SP_EVENT, &bp->sp_event))  in bnxt_sp_task()
13764 	if (test_and_clear_bit(BNXT_RING_COAL_NOW_SP_EVENT, &bp->sp_event))  in bnxt_sp_task()
13767 	if (test_and_clear_bit(BNXT_FW_ECHO_REQUEST_SP_EVENT, &bp->sp_event))  in bnxt_sp_task()
13770 	if (test_and_clear_bit(BNXT_THERMAL_THRESHOLD_SP_EVENT, &bp->sp_event))  in bnxt_sp_task()
13776 	if (test_and_clear_bit(BNXT_RESET_TASK_SP_EVENT, &bp->sp_event))  in bnxt_sp_task()
13779 	if (test_and_clear_bit(BNXT_RESET_TASK_SILENT_SP_EVENT, &bp->sp_event))  in bnxt_sp_task()
13782 	if (test_and_clear_bit(BNXT_RST_RING_SP_EVENT, &bp->sp_event))  in bnxt_sp_task()
13785 	if (test_and_clear_bit(BNXT_FW_RESET_NOTIFY_SP_EVENT, &bp->sp_event)) {  in bnxt_sp_task()
13786 		if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state) ||  in bnxt_sp_task()
13787 		    test_bit(BNXT_STATE_FW_NON_FATAL_COND, &bp->state))  in bnxt_sp_task()
13793 	if (test_and_clear_bit(BNXT_FW_EXCEPTION_SP_EVENT, &bp->sp_event)) {  in bnxt_sp_task()
13799 	clear_bit(BNXT_STATE_IN_SP_TASK, &bp->state);  in bnxt_sp_task()
13820 		return -ENOMEM;  in bnxt_check_rings()
13822 	if (bp->flags & BNXT_FLAG_AGG_RINGS)  in bnxt_check_rings()
13828 		return -ENOMEM;  in bnxt_check_rings()
13835 		return -ENOMEM;  in bnxt_check_rings()
13843 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)  in bnxt_check_rings()
13846 	if (!rc && pci_msix_can_alloc_dyn(bp->pdev)) {  in bnxt_check_rings()
13847 		if (!bnxt_ulp_registered(bp->edev)) {  in bnxt_check_rings()
13851 		if (hwr.cp > bp->total_irqs) {  in bnxt_check_rings()
13855 				netdev_warn(bp->dev, "Unable to allocate %d MSIX vectors, maximum available %d\n",  in bnxt_check_rings()
13857 				rc = -ENOSPC;  in bnxt_check_rings()
13866 	if (bp->bar2) {  in bnxt_unmap_bars()
13867 		pci_iounmap(pdev, bp->bar2);  in bnxt_unmap_bars()
13868 		bp->bar2 = NULL;  in bnxt_unmap_bars()
13871 	if (bp->bar1) {  in bnxt_unmap_bars()
13872 		pci_iounmap(pdev, bp->bar1);  in bnxt_unmap_bars()
13873 		bp->bar1 = NULL;  in bnxt_unmap_bars()
13876 	if (bp->bar0) {  in bnxt_unmap_bars()
13877 		pci_iounmap(pdev, bp->bar0);  in bnxt_unmap_bars()
13878 		bp->bar0 = NULL;  in bnxt_unmap_bars()
13884 	bnxt_unmap_bars(bp, bp->pdev);  in bnxt_cleanup_pci()
13885 	pci_release_regions(bp->pdev);  in bnxt_cleanup_pci()
13886 	if (pci_is_enabled(bp->pdev))  in bnxt_cleanup_pci()
13887 		pci_disable_device(bp->pdev);  in bnxt_cleanup_pci()
13892 	struct bnxt_coal_cap *coal_cap = &bp->coal_cap;  in bnxt_init_dflt_coal()
13896 	if (coal_cap->cmpl_params &  in bnxt_init_dflt_coal()
13903 	coal = &bp->rx_coal;  in bnxt_init_dflt_coal()
13904 	coal->coal_ticks = 10;  in bnxt_init_dflt_coal()
13905 	coal->coal_bufs = 30;  in bnxt_init_dflt_coal()
13906 	coal->coal_ticks_irq = 1;  in bnxt_init_dflt_coal()
13907 	coal->coal_bufs_irq = 2;  in bnxt_init_dflt_coal()
13908 	coal->idle_thresh = 50;  in bnxt_init_dflt_coal()
13909 	coal->bufs_per_record = 2;  in bnxt_init_dflt_coal()
13910 	coal->budget = 64;		/* NAPI budget */  in bnxt_init_dflt_coal()
13911 	coal->flags = flags;  in bnxt_init_dflt_coal()
13913 	coal = &bp->tx_coal;  in bnxt_init_dflt_coal()
13914 	coal->coal_ticks = 28;  in bnxt_init_dflt_coal()
13915 	coal->coal_bufs = 30;  in bnxt_init_dflt_coal()
13916 	coal->coal_ticks_irq = 2;  in bnxt_init_dflt_coal()
13917 	coal->coal_bufs_irq = 2;  in bnxt_init_dflt_coal()
13918 	coal->bufs_per_record = 1;  in bnxt_init_dflt_coal()
13919 	coal->flags = flags;  in bnxt_init_dflt_coal()
13921 	bp->stats_coal_ticks = BNXT_DEF_STATS_COAL_TICKS;  in bnxt_init_dflt_coal()
13924 /* FW that pre-reserves 1 VNIC per function */
13929 	if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS) &&  in bnxt_fw_pre_resv_vnics()
13932 	if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) &&  in bnxt_fw_pre_resv_vnics()
13942 	bp->fw_cap = 0;  in bnxt_fw_init_one_p1()
13963 		return -ENODEV;  in bnxt_fw_init_one_p1()
13976 		netdev_err(bp->dev, "hwrm query capability failure rc: %x\n",  in bnxt_fw_init_one_p2()
13978 		return -ENODEV;  in bnxt_fw_init_one_p2()
13983 		netdev_warn(bp->dev, "hwrm query adv flow mgnt failure rc: %d\n",  in bnxt_fw_init_one_p2()
13987 		netdev_warn(bp->dev, "no memory for firmware error recovery\n");  in bnxt_fw_init_one_p2()
13991 			netdev_warn(bp->dev, "hwrm query error recovery failure rc: %d\n",  in bnxt_fw_init_one_p2()
13997 		return -ENODEV;  in bnxt_fw_init_one_p2()
14001 		netdev_warn(bp->dev, "crash dump mem alloc failure rc: %d\n",  in bnxt_fw_init_one_p2()
14007 			netdev_warn(bp->dev,  in bnxt_fw_init_one_p2()
14013 		bp->fw_cap |= BNXT_FW_CAP_PRE_RESV_VNICS;  in bnxt_fw_init_one_p2()
14019 	if (bp->fw_cap & BNXT_FW_CAP_PTP)  in bnxt_fw_init_one_p2()
14028 	bp->rss_cap &= ~BNXT_RSS_CAP_UDP_RSS_CAP;  in bnxt_set_dflt_rss_hash_type()
14029 	bp->rss_hash_cfg = VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4 |  in bnxt_set_dflt_rss_hash_type()
14033 	if (bp->rss_cap & BNXT_RSS_CAP_RSS_HASH_TYPE_DELTA)  in bnxt_set_dflt_rss_hash_type()
14034 		bp->rss_hash_delta = bp->rss_hash_cfg;  in bnxt_set_dflt_rss_hash_type()
14035 	if (BNXT_CHIP_P4_PLUS(bp) && bp->hwrm_spec_code >= 0x10501) {  in bnxt_set_dflt_rss_hash_type()
14036 		bp->rss_cap |= BNXT_RSS_CAP_UDP_RSS_CAP;  in bnxt_set_dflt_rss_hash_type()
14037 		bp->rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4 |  in bnxt_set_dflt_rss_hash_type()
14044 	struct net_device *dev = bp->dev;  in bnxt_set_dflt_rfs()
14046 	dev->hw_features &= ~NETIF_F_NTUPLE;  in bnxt_set_dflt_rfs()
14047 	dev->features &= ~NETIF_F_NTUPLE;  in bnxt_set_dflt_rfs()
14048 	bp->flags &= ~BNXT_FLAG_RFS;  in bnxt_set_dflt_rfs()
14050 		dev->hw_features |= NETIF_F_NTUPLE;  in bnxt_set_dflt_rfs()
14052 			bp->flags |= BNXT_FLAG_RFS;  in bnxt_set_dflt_rfs()
14053 			dev->features |= NETIF_F_NTUPLE;  in bnxt_set_dflt_rfs()
14060 	struct pci_dev *pdev = bp->pdev;  in bnxt_fw_init_one_p3()
14066 	if (bp->flags & BNXT_FLAG_WOL_CAP)  in bnxt_fw_init_one_p3()
14067 		device_set_wakeup_enable(&pdev->dev, bp->wol);  in bnxt_fw_init_one_p3()
14069 		device_set_wakeup_capable(&pdev->dev, false);  in bnxt_fw_init_one_p3()
14083 		netdev_err(bp->dev, "Firmware init phase 1 failed\n");  in bnxt_fw_init_one()
14088 		netdev_err(bp->dev, "Firmware init phase 2 failed\n");  in bnxt_fw_init_one()
14094 	rc = bnxt_approve_mac(bp, bp->dev->dev_addr, false);  in bnxt_fw_init_one()
14104 	struct bnxt_fw_health *fw_health = bp->fw_health;  in bnxt_fw_reset_writel()
14105 	u32 reg = fw_health->fw_reset_seq_regs[reg_idx];  in bnxt_fw_reset_writel()
14106 	u32 val = fw_health->fw_reset_seq_vals[reg_idx];  in bnxt_fw_reset_writel()
14109 	delay_msecs = fw_health->fw_reset_seq_delay_msec[reg_idx];  in bnxt_fw_reset_writel()
14114 		pci_write_config_dword(bp->pdev, reg_off, val);  in bnxt_fw_reset_writel()
14118 		       bp->bar0 + BNXT_GRCPF_REG_WINDOW_BASE_OUT + 4);  in bnxt_fw_reset_writel()
14122 		writel(val, bp->bar0 + reg_off);  in bnxt_fw_reset_writel()
14125 		writel(val, bp->bar1 + reg_off);  in bnxt_fw_reset_writel()
14129 		pci_read_config_dword(bp->pdev, 0, &val);  in bnxt_fw_reset_writel()
14140 	if (~bp->fw_cap & BNXT_FW_CAP_HOT_RESET_IF)  in bnxt_hwrm_reset_permitted()
14146 	req->fid = cpu_to_le16(0xffff);  in bnxt_hwrm_reset_permitted()
14149 		result = !!(le16_to_cpu(resp->flags) &  in bnxt_hwrm_reset_permitted()
14157 	struct bnxt_fw_health *fw_health = bp->fw_health;  in bnxt_reset_all()
14160 	if (bp->fw_cap & BNXT_FW_CAP_ERR_RECOVER_RELOAD) {  in bnxt_reset_all()
14162 		bp->fw_reset_timestamp = jiffies;  in bnxt_reset_all()
14166 	if (fw_health->flags & ERROR_RECOVERY_QCFG_RESP_FLAGS_HOST) {  in bnxt_reset_all()
14167 		for (i = 0; i < fw_health->fw_reset_seq_cnt; i++)  in bnxt_reset_all()
14169 	} else if (fw_health->flags & ERROR_RECOVERY_QCFG_RESP_FLAGS_CO_CPU) {  in bnxt_reset_all()
14174 			req->target_id = cpu_to_le16(HWRM_TARGET_ID_KONG);  in bnxt_reset_all()
14175 			req->embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP;  in bnxt_reset_all()
14176 			req->selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP;  in bnxt_reset_all()
14177 			req->flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL;  in bnxt_reset_all()
14180 		if (rc != -ENODEV)  in bnxt_reset_all()
14181 			netdev_warn(bp->dev, "Unable to reset FW rc=%d\n", rc);  in bnxt_reset_all()
14183 	bp->fw_reset_timestamp = jiffies;  in bnxt_reset_all()
14188 	return time_after(jiffies, bp->fw_reset_timestamp +  in bnxt_fw_reset_timeout()
14189 			  (bp->fw_reset_max_dsecs * HZ / 10));  in bnxt_fw_reset_timeout()
14194 	clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);  in bnxt_fw_reset_abort()
14195 	if (bp->fw_reset_state != BNXT_FW_RESET_STATE_POLL_VF)  in bnxt_fw_reset_abort()
14197 	bp->fw_reset_state = 0;  in bnxt_fw_reset_abort()
14198 	dev_close(bp->dev);  in bnxt_fw_reset_abort()
14206 	if (!test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) {  in bnxt_fw_reset_task()
14207 		netdev_err(bp->dev, "bnxt_fw_reset_task() called when not in fw reset mode!\n");  in bnxt_fw_reset_task()
14211 	switch (bp->fw_reset_state) {  in bnxt_fw_reset_task()
14217 …netdev_err(bp->dev, "Firmware reset aborted, subsequent func_qcfg cmd failed, rc = %d, %d msecs si…  in bnxt_fw_reset_task()
14218 				   n, jiffies_to_msecs(jiffies -  in bnxt_fw_reset_task()
14219 				   bp->fw_reset_timestamp));  in bnxt_fw_reset_task()
14223 				clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);  in bnxt_fw_reset_task()
14224 				bp->fw_reset_state = 0;  in bnxt_fw_reset_task()
14225 				netdev_err(bp->dev, "Firmware reset aborted, bnxt_get_registered_vfs() returns %d\n",  in bnxt_fw_reset_task()
14232 		bp->fw_reset_timestamp = jiffies;  in bnxt_fw_reset_task()
14234 		if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state)) {  in bnxt_fw_reset_task()
14240 		if (bp->fw_cap & BNXT_FW_CAP_ERR_RECOVER_RELOAD) {  in bnxt_fw_reset_task()
14241 			bp->fw_reset_state = BNXT_FW_RESET_STATE_POLL_FW_DOWN;  in bnxt_fw_reset_task()
14244 			bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV;  in bnxt_fw_reset_task()
14245 			tmo = bp->fw_reset_min_dsecs * HZ / 10;  in bnxt_fw_reset_task()
14261 		if (!bp->fw_health->primary) {  in bnxt_fw_reset_task()
14262 			u32 wait_dsecs = bp->fw_health->normal_func_wait_dsecs;  in bnxt_fw_reset_task()
14264 			bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV;  in bnxt_fw_reset_task()
14268 		bp->fw_reset_state = BNXT_FW_RESET_STATE_RESET_FW;  in bnxt_fw_reset_task()
14273 		bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV;  in bnxt_fw_reset_task()
14274 		bnxt_queue_fw_reset_work(bp, bp->fw_reset_min_dsecs * HZ / 10);  in bnxt_fw_reset_task()
14278 		if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state) &&  in bnxt_fw_reset_task()
14279 		    !bp->fw_reset_min_dsecs) {  in bnxt_fw_reset_task()
14282 			pci_read_config_word(bp->pdev, PCI_SUBSYSTEM_ID, &val);  in bnxt_fw_reset_task()
14285 					netdev_err(bp->dev, "Firmware reset aborted, PCI config space invalid\n");  in bnxt_fw_reset_task()
14286 					rc = -ETIMEDOUT;  in bnxt_fw_reset_task()
14293 		clear_bit(BNXT_STATE_FW_FATAL_COND, &bp->state);  in bnxt_fw_reset_task()
14294 		clear_bit(BNXT_STATE_FW_NON_FATAL_COND, &bp->state);  in bnxt_fw_reset_task()
14295 		if (test_and_clear_bit(BNXT_STATE_FW_ACTIVATE_RESET, &bp->state) &&  in bnxt_fw_reset_task()
14296 		    !test_bit(BNXT_STATE_FW_ACTIVATE, &bp->state))  in bnxt_fw_reset_task()
14298 		if (pci_enable_device(bp->pdev)) {  in bnxt_fw_reset_task()
14299 			netdev_err(bp->dev, "Cannot re-enable PCI device\n");  in bnxt_fw_reset_task()
14300 			rc = -ENODEV;  in bnxt_fw_reset_task()
14303 		pci_set_master(bp->pdev);  in bnxt_fw_reset_task()
14304 		bp->fw_reset_state = BNXT_FW_RESET_STATE_POLL_FW;  in bnxt_fw_reset_task()
14307 		bp->hwrm_cmd_timeout = SHORT_HWRM_CMD_TIMEOUT;  in bnxt_fw_reset_task()
14311 				netdev_err(bp->dev, "Firmware reset aborted\n");  in bnxt_fw_reset_task()
14317 		bp->hwrm_cmd_timeout = DFLT_HWRM_CMD_TIMEOUT;  in bnxt_fw_reset_task()
14318 		bp->fw_reset_state = BNXT_FW_RESET_STATE_OPENING;  in bnxt_fw_reset_task()
14325 		rc = bnxt_open(bp->dev);  in bnxt_fw_reset_task()
14327 			netdev_err(bp->dev, "bnxt_open() failed during FW reset\n");  in bnxt_fw_reset_task()
14333 		if ((bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY) &&  in bnxt_fw_reset_task()
14334 		    bp->fw_health->enabled) {  in bnxt_fw_reset_task()
14335 			bp->fw_health->last_fw_reset_cnt =  in bnxt_fw_reset_task()
14338 		bp->fw_reset_state = 0;  in bnxt_fw_reset_task()
14341 		clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);  in bnxt_fw_reset_task()
14343 		clear_bit(BNXT_STATE_FW_ACTIVATE, &bp->state);  in bnxt_fw_reset_task()
14344 		if (test_and_clear_bit(BNXT_STATE_RECOVER, &bp->state)) {  in bnxt_fw_reset_task()
14360 	if (bp->fw_health->status_reliable ||  in bnxt_fw_reset_task()
14361 	    (bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY)) {  in bnxt_fw_reset_task()
14364 		netdev_err(bp->dev, "fw_health_status 0x%x\n", sts);  in bnxt_fw_reset_task()
14379 	SET_NETDEV_DEV(dev, &pdev->dev);  in bnxt_init_board()
14381 	/* enable device (incl. PCI PM wakeup), and bus-mastering */  in bnxt_init_board()
14384 		dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n");  in bnxt_init_board()
14389 		dev_err(&pdev->dev,  in bnxt_init_board()
14391 		rc = -ENODEV;  in bnxt_init_board()
14397 		dev_err(&pdev->dev, "Cannot obtain PCI resources, aborting\n");  in bnxt_init_board()
14401 	if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) != 0 &&  in bnxt_init_board()
14402 	    dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)) != 0) {  in bnxt_init_board()
14403 		dev_err(&pdev->dev, "System does not support DMA, aborting\n");  in bnxt_init_board()
14404 		rc = -EIO;  in bnxt_init_board()
14410 	bp->dev = dev;  in bnxt_init_board()
14411 	bp->pdev = pdev;  in bnxt_init_board()
14413 	/* Doorbell BAR bp->bar1 is mapped after bnxt_fw_init_one_p2()  in bnxt_init_board()
14416 	bp->bar0 = pci_ioremap_bar(pdev, 0);  in bnxt_init_board()
14417 	if (!bp->bar0) {  in bnxt_init_board()
14418 		dev_err(&pdev->dev, "Cannot map device registers, aborting\n");  in bnxt_init_board()
14419 		rc = -ENOMEM;  in bnxt_init_board()
14423 	bp->bar2 = pci_ioremap_bar(pdev, 4);  in bnxt_init_board()
14424 	if (!bp->bar2) {  in bnxt_init_board()
14425 		dev_err(&pdev->dev, "Cannot map bar4 registers, aborting\n");  in bnxt_init_board()
14426 		rc = -ENOMEM;  in bnxt_init_board()
14430 	INIT_WORK(&bp->sp_task, bnxt_sp_task);  in bnxt_init_board()
14431 	INIT_DELAYED_WORK(&bp->fw_reset_task, bnxt_fw_reset_task);  in bnxt_init_board()
14433 	spin_lock_init(&bp->ntp_fltr_lock);  in bnxt_init_board()
14435 	spin_lock_init(&bp->db_lock);  in bnxt_init_board()
14438 	bp->rx_ring_size = BNXT_DEFAULT_RX_RING_SIZE;  in bnxt_init_board()
14439 	bp->tx_ring_size = BNXT_DEFAULT_TX_RING_SIZE;  in bnxt_init_board()
14441 	timer_setup(&bp->timer, bnxt_timer, 0);  in bnxt_init_board()
14442 	bp->current_interval = BNXT_TIMER_INTERVAL;  in bnxt_init_board()
14444 	bp->vxlan_fw_dst_port_id = INVALID_HW_RING_ID;  in bnxt_init_board()
14445 	bp->nge_fw_dst_port_id = INVALID_HW_RING_ID;  in bnxt_init_board()
14447 	clear_bit(BNXT_STATE_OPEN, &bp->state);  in bnxt_init_board()
14468 	if (!is_valid_ether_addr(addr->sa_data))  in bnxt_change_mac_addr()
14469 		return -EADDRNOTAVAIL;  in bnxt_change_mac_addr()
14471 	if (ether_addr_equal(addr->sa_data, dev->dev_addr))  in bnxt_change_mac_addr()
14474 	rc = bnxt_approve_mac(bp, addr->sa_data, true);  in bnxt_change_mac_addr()
14478 	eth_hw_addr_set(dev, addr->sa_data);  in bnxt_change_mac_addr()
14496 	WRITE_ONCE(dev->mtu, new_mtu);  in bnxt_change_mtu()
14511 	if (tc > bp->max_tc) {  in bnxt_setup_mq_tc()
14513 			   tc, bp->max_tc);  in bnxt_setup_mq_tc()
14514 		return -EINVAL;  in bnxt_setup_mq_tc()
14517 	if (bp->num_tc == tc)  in bnxt_setup_mq_tc()
14520 	if (bp->flags & BNXT_FLAG_SHARED_RINGS)  in bnxt_setup_mq_tc()
14523 	rc = bnxt_check_rings(bp, bp->tx_nr_rings_per_tc, bp->rx_nr_rings,  in bnxt_setup_mq_tc()
14524 			      sh, tc, bp->tx_nr_rings_xdp);  in bnxt_setup_mq_tc()
14528 	/* Needs to close the device and do hw resource re-allocations */  in bnxt_setup_mq_tc()
14529 	if (netif_running(bp->dev))  in bnxt_setup_mq_tc()
14533 		bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tc;  in bnxt_setup_mq_tc()
14535 		bp->num_tc = tc;  in bnxt_setup_mq_tc()
14537 		bp->tx_nr_rings = bp->tx_nr_rings_per_tc;  in bnxt_setup_mq_tc()
14539 		bp->num_tc = 0;  in bnxt_setup_mq_tc()
14541 	bp->tx_nr_rings += bp->tx_nr_rings_xdp;  in bnxt_setup_mq_tc()
14542 	tx_cp = bnxt_num_tx_to_cp(bp, bp->tx_nr_rings);  in bnxt_setup_mq_tc()
14543 	bp->cp_nr_rings = sh ? max_t(int, tx_cp, bp->rx_nr_rings) :  in bnxt_setup_mq_tc()
14544 			       tx_cp + bp->rx_nr_rings;  in bnxt_setup_mq_tc()
14546 	if (netif_running(bp->dev))  in bnxt_setup_mq_tc()
14558 	    !tc_cls_can_offload_and_chain0(bp->dev, type_data))  in bnxt_setup_tc_block_cb()
14559 		return -EOPNOTSUPP;  in bnxt_setup_tc_block_cb()
14563 		return bnxt_tc_setup_flower(bp, bp->pf.fw_fid, type_data);  in bnxt_setup_tc_block_cb()
14565 		return -EOPNOTSUPP;  in bnxt_setup_tc_block_cb()
14585 		mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;  in bnxt_setup_tc()
14587 		return bnxt_setup_mq_tc(dev, mqprio->num_tc);  in bnxt_setup_tc()
14590 		return -EOPNOTSUPP;  in bnxt_setup_tc()
14602 	vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT];  in bnxt_get_ntp_filter_idx()
14603 	return bnxt_toeplitz(bp, fkeys, (void *)vnic->rss_hash_key);  in bnxt_get_ntp_filter_idx()
14612 	spin_lock_bh(&bp->ntp_fltr_lock);  in bnxt_insert_ntp_filter()
14613 	bit_id = bitmap_find_free_region(bp->ntp_fltr_bmap, bp->max_fltr, 0);  in bnxt_insert_ntp_filter()
14615 		spin_unlock_bh(&bp->ntp_fltr_lock);  in bnxt_insert_ntp_filter()
14616 		return -ENOMEM;  in bnxt_insert_ntp_filter()
14619 	fltr->base.sw_id = (u16)bit_id;  in bnxt_insert_ntp_filter()
14620 	fltr->base.type = BNXT_FLTR_TYPE_NTUPLE;  in bnxt_insert_ntp_filter()
14621 	fltr->base.flags |= BNXT_ACT_RING_DST;  in bnxt_insert_ntp_filter()
14622 	head = &bp->ntp_fltr_hash_tbl[idx];  in bnxt_insert_ntp_filter()
14623 	hlist_add_head_rcu(&fltr->base.hash, head);  in bnxt_insert_ntp_filter()
14624 	set_bit(BNXT_FLTR_INSERTED, &fltr->base.state);  in bnxt_insert_ntp_filter()
14625 	bnxt_insert_usr_fltr(bp, &fltr->base);  in bnxt_insert_ntp_filter()
14626 	bp->ntp_fltr_count++;  in bnxt_insert_ntp_filter()
14627 	spin_unlock_bh(&bp->ntp_fltr_lock);  in bnxt_insert_ntp_filter()
14634 	struct bnxt_flow_masks *masks1 = &f1->fmasks;  in bnxt_fltr_match()
14635 	struct bnxt_flow_masks *masks2 = &f2->fmasks;  in bnxt_fltr_match()
14636 	struct flow_keys *keys1 = &f1->fkeys;  in bnxt_fltr_match()
14637 	struct flow_keys *keys2 = &f2->fkeys;  in bnxt_fltr_match()
14639 	if (keys1->basic.n_proto != keys2->basic.n_proto ||  in bnxt_fltr_match()
14640 	    keys1->basic.ip_proto != keys2->basic.ip_proto)  in bnxt_fltr_match()
14643 	if (keys1->basic.n_proto == htons(ETH_P_IP)) {  in bnxt_fltr_match()
14644 		if (keys1->addrs.v4addrs.src != keys2->addrs.v4addrs.src ||  in bnxt_fltr_match()
14645 		    masks1->addrs.v4addrs.src != masks2->addrs.v4addrs.src ||  in bnxt_fltr_match()
14646 		    keys1->addrs.v4addrs.dst != keys2->addrs.v4addrs.dst ||  in bnxt_fltr_match()
14647 		    masks1->addrs.v4addrs.dst != masks2->addrs.v4addrs.dst)  in bnxt_fltr_match()
14650 		if (!ipv6_addr_equal(&keys1->addrs.v6addrs.src,  in bnxt_fltr_match()
14651 				     &keys2->addrs.v6addrs.src) ||  in bnxt_fltr_match()
14652 		    !ipv6_addr_equal(&masks1->addrs.v6addrs.src,  in bnxt_fltr_match()
14653 				     &masks2->addrs.v6addrs.src) ||  in bnxt_fltr_match()
14654 		    !ipv6_addr_equal(&keys1->addrs.v6addrs.dst,  in bnxt_fltr_match()
14655 				     &keys2->addrs.v6addrs.dst) ||  in bnxt_fltr_match()
14656 		    !ipv6_addr_equal(&masks1->addrs.v6addrs.dst,  in bnxt_fltr_match()
14657 				     &masks2->addrs.v6addrs.dst))  in bnxt_fltr_match()
14661 	return keys1->ports.src == keys2->ports.src &&  in bnxt_fltr_match()
14662 	       masks1->ports.src == masks2->ports.src &&  in bnxt_fltr_match()
14663 	       keys1->ports.dst == keys2->ports.dst &&  in bnxt_fltr_match()
14664 	       masks1->ports.dst == masks2->ports.dst &&  in bnxt_fltr_match()
14665 	       keys1->control.flags == keys2->control.flags &&  in bnxt_fltr_match()
14666 	       f1->l2_fltr == f2->l2_fltr;  in bnxt_fltr_match()
14676 	head = &bp->ntp_fltr_hash_tbl[idx];  in bnxt_lookup_ntp_filter_from_idx()
14696 	if (ether_addr_equal(dev->dev_addr, eth->h_dest)) {  in bnxt_rx_flow_steer()
14697 		l2_fltr = bp->vnic_info[BNXT_VNIC_DEFAULT].l2_filters[0];  in bnxt_rx_flow_steer()
14698 		atomic_inc(&l2_fltr->refcnt);  in bnxt_rx_flow_steer()
14702 		ether_addr_copy(key.dst_mac_addr, eth->h_dest);  in bnxt_rx_flow_steer()
14706 			return -EINVAL;  in bnxt_rx_flow_steer()
14707 		if (l2_fltr->base.flags & BNXT_ACT_FUNC_DST) {  in bnxt_rx_flow_steer()
14709 			return -EINVAL;  in bnxt_rx_flow_steer()
14715 		return -ENOMEM;  in bnxt_rx_flow_steer()
14718 	fkeys = &new_fltr->fkeys;  in bnxt_rx_flow_steer()
14720 		rc = -EPROTONOSUPPORT;  in bnxt_rx_flow_steer()
14724 	if ((fkeys->basic.n_proto != htons(ETH_P_IP) &&  in bnxt_rx_flow_steer()
14725 	     fkeys->basic.n_proto != htons(ETH_P_IPV6)) ||  in bnxt_rx_flow_steer()
14726 	    ((fkeys->basic.ip_proto != IPPROTO_TCP) &&  in bnxt_rx_flow_steer()
14727 	     (fkeys->basic.ip_proto != IPPROTO_UDP))) {  in bnxt_rx_flow_steer()
14728 		rc = -EPROTONOSUPPORT;  in bnxt_rx_flow_steer()
14731 	new_fltr->fmasks = BNXT_FLOW_IPV4_MASK_ALL;  in bnxt_rx_flow_steer()
14732 	if (fkeys->basic.n_proto == htons(ETH_P_IPV6)) {  in bnxt_rx_flow_steer()
14733 		if (bp->hwrm_spec_code < 0x10601) {  in bnxt_rx_flow_steer()
14734 			rc = -EPROTONOSUPPORT;  in bnxt_rx_flow_steer()
14737 		new_fltr->fmasks = BNXT_FLOW_IPV6_MASK_ALL;  in bnxt_rx_flow_steer()
14739 	flags = fkeys->control.flags;  in bnxt_rx_flow_steer()
14741 	     bp->hwrm_spec_code < 0x10601) || (flags & FLOW_DIS_IS_FRAGMENT)) {  in bnxt_rx_flow_steer()
14742 		rc = -EPROTONOSUPPORT;  in bnxt_rx_flow_steer()
14745 	new_fltr->l2_fltr = l2_fltr;  in bnxt_rx_flow_steer()
14751 		rc = fltr->base.sw_id;  in bnxt_rx_flow_steer()
14757 	new_fltr->flow_id = flow_id;  in bnxt_rx_flow_steer()
14758 	new_fltr->base.rxq = rxq_index;  in bnxt_rx_flow_steer()
14762 		return new_fltr->base.sw_id;  in bnxt_rx_flow_steer()
14774 	spin_lock_bh(&bp->ntp_fltr_lock);  in bnxt_del_ntp_filter()
14775 	if (!test_and_clear_bit(BNXT_FLTR_INSERTED, &fltr->base.state)) {  in bnxt_del_ntp_filter()
14776 		spin_unlock_bh(&bp->ntp_fltr_lock);  in bnxt_del_ntp_filter()
14779 	hlist_del_rcu(&fltr->base.hash);  in bnxt_del_ntp_filter()
14780 	bnxt_del_one_usr_fltr(bp, &fltr->base);  in bnxt_del_ntp_filter()
14781 	bp->ntp_fltr_count--;  in bnxt_del_ntp_filter()
14782 	spin_unlock_bh(&bp->ntp_fltr_lock);  in bnxt_del_ntp_filter()
14783 	bnxt_del_l2_filter(bp, fltr->l2_fltr);  in bnxt_del_ntp_filter()
14784 	clear_bit(fltr->base.sw_id, bp->ntp_fltr_bmap);  in bnxt_del_ntp_filter()
14799 		head = &bp->ntp_fltr_hash_tbl[i];  in bnxt_cfg_ntp_filters()
14803 			if (test_bit(BNXT_FLTR_VALID, &fltr->base.state)) {  in bnxt_cfg_ntp_filters()
14804 				if (fltr->base.flags & BNXT_ACT_NO_AGING)  in bnxt_cfg_ntp_filters()
14806 				if (rps_may_expire_flow(bp->dev, fltr->base.rxq,  in bnxt_cfg_ntp_filters()
14807 							fltr->flow_id,  in bnxt_cfg_ntp_filters()
14808 							fltr->base.sw_id)) {  in bnxt_cfg_ntp_filters()
14819 					set_bit(BNXT_FLTR_VALID, &fltr->base.state);  in bnxt_cfg_ntp_filters()
14835 	if (ti->type == UDP_TUNNEL_TYPE_VXLAN)  in bnxt_udp_tunnel_set_port()
14837 	else if (ti->type == UDP_TUNNEL_TYPE_GENEVE)  in bnxt_udp_tunnel_set_port()
14842 	return bnxt_hwrm_tunnel_dst_port_alloc(bp, ti->port, cmd);  in bnxt_udp_tunnel_set_port()
14851 	if (ti->type == UDP_TUNNEL_TYPE_VXLAN)  in bnxt_udp_tunnel_unset_port()
14853 	else if (ti->type == UDP_TUNNEL_TYPE_GENEVE)  in bnxt_udp_tunnel_unset_port()
14888 	return ndo_dflt_bridge_getlink(skb, pid, seq, dev, bp->br_mode, 0, 0,  in bnxt_bridge_getlink()
14899 	if (bp->hwrm_spec_code < 0x10708 || !BNXT_SINGLE_PF(bp))  in bnxt_bridge_setlink()
14900 		return -EOPNOTSUPP;  in bnxt_bridge_setlink()
14904 		return -EINVAL;  in bnxt_bridge_setlink()
14910 		if (mode == bp->br_mode)  in bnxt_bridge_setlink()
14915 			bp->br_mode = mode;  in bnxt_bridge_setlink()
14926 	if (bp->eswitch_mode != DEVLINK_ESWITCH_MODE_SWITCHDEV)  in bnxt_get_port_parent_id()
14927 		return -EOPNOTSUPP;  in bnxt_get_port_parent_id()
14929 	/* The PF and it's VF-reps only support the switchdev framework */  in bnxt_get_port_parent_id()
14930 	if (!BNXT_PF(bp) || !(bp->flags & BNXT_FLAG_DSN_VALID))  in bnxt_get_port_parent_id()
14931 		return -EOPNOTSUPP;  in bnxt_get_port_parent_id()
14933 	ppid->id_len = sizeof(bp->dsn);  in bnxt_get_port_parent_id()
14934 	memcpy(ppid->id, bp->dsn, ppid->id_len);  in bnxt_get_port_parent_id()
14979 	cpr = &bp->bnapi[i]->cp_ring;  in bnxt_get_queue_stats_rx()
14980 	sw = cpr->stats.sw_stats;  in bnxt_get_queue_stats_rx()
14982 	stats->packets = 0;  in bnxt_get_queue_stats_rx()
14983 	stats->packets += BNXT_GET_RING_STATS64(sw, rx_ucast_pkts);  in bnxt_get_queue_stats_rx()
14984 	stats->packets += BNXT_GET_RING_STATS64(sw, rx_mcast_pkts);  in bnxt_get_queue_stats_rx()
14985 	stats->packets += BNXT_GET_RING_STATS64(sw, rx_bcast_pkts);  in bnxt_get_queue_stats_rx()
14987 	stats->bytes = 0;  in bnxt_get_queue_stats_rx()
14988 	stats->bytes += BNXT_GET_RING_STATS64(sw, rx_ucast_bytes);  in bnxt_get_queue_stats_rx()
14989 	stats->bytes += BNXT_GET_RING_STATS64(sw, rx_mcast_bytes);  in bnxt_get_queue_stats_rx()
14990 	stats->bytes += BNXT_GET_RING_STATS64(sw, rx_bcast_bytes);  in bnxt_get_queue_stats_rx()
14992 	stats->alloc_fail = cpr->sw_stats->rx.rx_oom_discards;  in bnxt_get_queue_stats_rx()
15002 	bnapi = bp->tx_ring[bp->tx_ring_map[i]].bnapi;  in bnxt_get_queue_stats_tx()
15003 	sw = bnapi->cp_ring.stats.sw_stats;  in bnxt_get_queue_stats_tx()
15005 	stats->packets = 0;  in bnxt_get_queue_stats_tx()
15006 	stats->packets += BNXT_GET_RING_STATS64(sw, tx_ucast_pkts);  in bnxt_get_queue_stats_tx()
15007 	stats->packets += BNXT_GET_RING_STATS64(sw, tx_mcast_pkts);  in bnxt_get_queue_stats_tx()
15008 	stats->packets += BNXT_GET_RING_STATS64(sw, tx_bcast_pkts);  in bnxt_get_queue_stats_tx()
15010 	stats->bytes = 0;  in bnxt_get_queue_stats_tx()
15011 	stats->bytes += BNXT_GET_RING_STATS64(sw, tx_ucast_bytes);  in bnxt_get_queue_stats_tx()
15012 	stats->bytes += BNXT_GET_RING_STATS64(sw, tx_mcast_bytes);  in bnxt_get_queue_stats_tx()
15013 	stats->bytes += BNXT_GET_RING_STATS64(sw, tx_bcast_bytes);  in bnxt_get_queue_stats_tx()
15022 	rx->packets = bp->net_stats_prev.rx_packets;  in bnxt_get_base_stats()
15023 	rx->bytes = bp->net_stats_prev.rx_bytes;  in bnxt_get_base_stats()
15024 	rx->alloc_fail = bp->ring_err_stats_prev.rx_total_oom_discards;  in bnxt_get_base_stats()
15026 	tx->packets = bp->net_stats_prev.tx_packets;  in bnxt_get_base_stats()
15027 	tx->bytes = bp->net_stats_prev.tx_bytes;  in bnxt_get_base_stats()
15040 	rxr->rx_agg_bmap_size = bp->rx_agg_ring_mask + 1;  in bnxt_alloc_rx_agg_bmap()
15041 	mem_size = rxr->rx_agg_bmap_size / 8;  in bnxt_alloc_rx_agg_bmap()
15042 	rxr->rx_agg_bmap = kzalloc(mem_size, GFP_KERNEL);  in bnxt_alloc_rx_agg_bmap()
15043 	if (!rxr->rx_agg_bmap)  in bnxt_alloc_rx_agg_bmap()
15044 		return -ENOMEM;  in bnxt_alloc_rx_agg_bmap()
15056 	rxr = &bp->rx_ring[idx];  in bnxt_queue_mem_alloc()
15062 	clone->rx_prod = 0;  in bnxt_queue_mem_alloc()
15063 	clone->rx_agg_prod = 0;  in bnxt_queue_mem_alloc()
15064 	clone->rx_sw_agg_prod = 0;  in bnxt_queue_mem_alloc()
15065 	clone->rx_next_cons = 0;  in bnxt_queue_mem_alloc()
15067 	rc = bnxt_alloc_rx_page_pool(bp, clone, rxr->page_pool->p.nid);  in bnxt_queue_mem_alloc()
15071 	rc = xdp_rxq_info_reg(&clone->xdp_rxq, bp->dev, idx, 0);  in bnxt_queue_mem_alloc()
15075 	rc = xdp_rxq_info_reg_mem_model(&clone->xdp_rxq,  in bnxt_queue_mem_alloc()
15077 					clone->page_pool);  in bnxt_queue_mem_alloc()
15081 	ring = &clone->rx_ring_struct;  in bnxt_queue_mem_alloc()
15082 	rc = bnxt_alloc_ring(bp, &ring->ring_mem);  in bnxt_queue_mem_alloc()
15086 	if (bp->flags & BNXT_FLAG_AGG_RINGS) {  in bnxt_queue_mem_alloc()
15087 		ring = &clone->rx_agg_ring_struct;  in bnxt_queue_mem_alloc()
15088 		rc = bnxt_alloc_ring(bp, &ring->ring_mem);  in bnxt_queue_mem_alloc()
15101 	if (bp->flags & BNXT_FLAG_AGG_RINGS)  in bnxt_queue_mem_alloc()
15107 	bnxt_free_ring(bp, &clone->rx_agg_ring_struct.ring_mem);  in bnxt_queue_mem_alloc()
15109 	bnxt_free_ring(bp, &clone->rx_ring_struct.ring_mem);  in bnxt_queue_mem_alloc()
15111 	xdp_rxq_info_unreg(&clone->xdp_rxq);  in bnxt_queue_mem_alloc()
15113 	clone->page_pool->p.napi = NULL;  in bnxt_queue_mem_alloc()
15114 	page_pool_destroy(clone->page_pool);  in bnxt_queue_mem_alloc()
15115 	clone->page_pool = NULL;  in bnxt_queue_mem_alloc()
15128 	xdp_rxq_info_unreg(&rxr->xdp_rxq);  in bnxt_queue_mem_free()
15130 	page_pool_destroy(rxr->page_pool);  in bnxt_queue_mem_free()
15131 	rxr->page_pool = NULL;  in bnxt_queue_mem_free()
15133 	ring = &rxr->rx_ring_struct;  in bnxt_queue_mem_free()
15134 	bnxt_free_ring(bp, &ring->ring_mem);  in bnxt_queue_mem_free()
15136 	ring = &rxr->rx_agg_ring_struct;  in bnxt_queue_mem_free()
15137 	bnxt_free_ring(bp, &ring->ring_mem);  in bnxt_queue_mem_free()
15139 	kfree(rxr->rx_agg_bmap);  in bnxt_queue_mem_free()
15140 	rxr->rx_agg_bmap = NULL;  in bnxt_queue_mem_free()
15151 	dst_ring = &dst->rx_ring_struct;  in bnxt_copy_rx_ring()
15152 	dst_rmem = &dst_ring->ring_mem;  in bnxt_copy_rx_ring()
15153 	src_ring = &src->rx_ring_struct;  in bnxt_copy_rx_ring()
15154 	src_rmem = &src_ring->ring_mem;  in bnxt_copy_rx_ring()
15156 	WARN_ON(dst_rmem->nr_pages != src_rmem->nr_pages);  in bnxt_copy_rx_ring()
15157 	WARN_ON(dst_rmem->page_size != src_rmem->page_size);  in bnxt_copy_rx_ring()
15158 	WARN_ON(dst_rmem->flags != src_rmem->flags);  in bnxt_copy_rx_ring()
15159 	WARN_ON(dst_rmem->depth != src_rmem->depth);  in bnxt_copy_rx_ring()
15160 	WARN_ON(dst_rmem->vmem_size != src_rmem->vmem_size);  in bnxt_copy_rx_ring()
15161 	WARN_ON(dst_rmem->ctx_mem != src_rmem->ctx_mem);  in bnxt_copy_rx_ring()
15163 	dst_rmem->pg_tbl = src_rmem->pg_tbl;  in bnxt_copy_rx_ring()
15164 	dst_rmem->pg_tbl_map = src_rmem->pg_tbl_map;  in bnxt_copy_rx_ring()
15165 	*dst_rmem->vmem = *src_rmem->vmem;  in bnxt_copy_rx_ring()
15166 	for (i = 0; i < dst_rmem->nr_pages; i++) {  in bnxt_copy_rx_ring()
15167 		dst_rmem->pg_arr[i] = src_rmem->pg_arr[i];  in bnxt_copy_rx_ring()
15168 		dst_rmem->dma_arr[i] = src_rmem->dma_arr[i];  in bnxt_copy_rx_ring()
15171 	if (!(bp->flags & BNXT_FLAG_AGG_RINGS))  in bnxt_copy_rx_ring()
15174 	dst_ring = &dst->rx_agg_ring_struct;  in bnxt_copy_rx_ring()
15175 	dst_rmem = &dst_ring->ring_mem;  in bnxt_copy_rx_ring()
15176 	src_ring = &src->rx_agg_ring_struct;  in bnxt_copy_rx_ring()
15177 	src_rmem = &src_ring->ring_mem;  in bnxt_copy_rx_ring()
15179 	WARN_ON(dst_rmem->nr_pages != src_rmem->nr_pages);  in bnxt_copy_rx_ring()
15180 	WARN_ON(dst_rmem->page_size != src_rmem->page_size);  in bnxt_copy_rx_ring()
15181 	WARN_ON(dst_rmem->flags != src_rmem->flags);  in bnxt_copy_rx_ring()
15182 	WARN_ON(dst_rmem->depth != src_rmem->depth);  in bnxt_copy_rx_ring()
15183 	WARN_ON(dst_rmem->vmem_size != src_rmem->vmem_size);  in bnxt_copy_rx_ring()
15184 	WARN_ON(dst_rmem->ctx_mem != src_rmem->ctx_mem);  in bnxt_copy_rx_ring()
15185 	WARN_ON(dst->rx_agg_bmap_size != src->rx_agg_bmap_size);  in bnxt_copy_rx_ring()
15187 	dst_rmem->pg_tbl = src_rmem->pg_tbl;  in bnxt_copy_rx_ring()
15188 	dst_rmem->pg_tbl_map = src_rmem->pg_tbl_map;  in bnxt_copy_rx_ring()
15189 	*dst_rmem->vmem = *src_rmem->vmem;  in bnxt_copy_rx_ring()
15190 	for (i = 0; i < dst_rmem->nr_pages; i++) {  in bnxt_copy_rx_ring()
15191 		dst_rmem->pg_arr[i] = src_rmem->pg_arr[i];  in bnxt_copy_rx_ring()
15192 		dst_rmem->dma_arr[i] = src_rmem->dma_arr[i];  in bnxt_copy_rx_ring()
15195 	dst->rx_agg_bmap = src->rx_agg_bmap;  in bnxt_copy_rx_ring()
15206 	rxr = &bp->rx_ring[idx];  in bnxt_queue_start()
15209 	rxr->rx_prod = clone->rx_prod;  in bnxt_queue_start()
15210 	rxr->rx_agg_prod = clone->rx_agg_prod;  in bnxt_queue_start()
15211 	rxr->rx_sw_agg_prod = clone->rx_sw_agg_prod;  in bnxt_queue_start()
15212 	rxr->rx_next_cons = clone->rx_next_cons;  in bnxt_queue_start()
15213 	rxr->page_pool = clone->page_pool;  in bnxt_queue_start()
15214 	rxr->xdp_rxq = clone->xdp_rxq;  in bnxt_queue_start()
15225 	bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod);  in bnxt_queue_start()
15226 	if (bp->flags & BNXT_FLAG_AGG_RINGS)  in bnxt_queue_start()
15227 		bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod);  in bnxt_queue_start()
15229 	cpr = &rxr->bnapi->cp_ring;  in bnxt_queue_start()
15230 	cpr->sw_stats->rx.rx_resets++;  in bnxt_queue_start()
15233 		vnic = &bp->vnic_info[i];  in bnxt_queue_start()
15234 		vnic->mru = bp->dev->mtu + ETH_HLEN + VLAN_HLEN;  in bnxt_queue_start()
15254 		vnic = &bp->vnic_info[i];  in bnxt_queue_stop()
15255 		vnic->mru = 0;  in bnxt_queue_stop()
15260 	rxr = &bp->rx_ring[idx];  in bnxt_queue_stop()
15263 	rxr->rx_next_cons = 0;  in bnxt_queue_stop()
15264 	page_pool_disable_direct_recycling(rxr->page_pool);  in bnxt_queue_stop()
15297 	WARN_ON(bp->num_rss_ctx);  in bnxt_remove_one()
15298 	clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);  in bnxt_remove_one()
15300 	cancel_work_sync(&bp->sp_task);  in bnxt_remove_one()
15301 	cancel_delayed_work_sync(&bp->fw_reset_task);  in bnxt_remove_one()
15302 	bp->sp_event = 0;  in bnxt_remove_one()
15314 	kfree(bp->ptp_cfg);  in bnxt_remove_one()
15315 	bp->ptp_cfg = NULL;  in bnxt_remove_one()
15316 	kfree(bp->fw_health);  in bnxt_remove_one()
15317 	bp->fw_health = NULL;  in bnxt_remove_one()
15321 	kfree(bp->rss_indir_tbl);  in bnxt_remove_one()
15322 	bp->rss_indir_tbl = NULL;  in bnxt_remove_one()
15330 	struct bnxt_link_info *link_info = &bp->link_info;  in bnxt_probe_phy()
15332 	bp->phy_flags = 0;  in bnxt_probe_phy()
15335 		netdev_err(bp->dev, "Probe phy can't get phy capabilities (rc: %x)\n",  in bnxt_probe_phy()
15339 	if (bp->phy_flags & BNXT_PHY_FL_NO_FCS)  in bnxt_probe_phy()
15340 		bp->dev->priv_flags |= IFF_SUPP_NOFCS;  in bnxt_probe_phy()
15342 		bp->dev->priv_flags &= ~IFF_SUPP_NOFCS;  in bnxt_probe_phy()
15346 	mutex_lock(&bp->link_lock);  in bnxt_probe_phy()
15349 		mutex_unlock(&bp->link_lock);  in bnxt_probe_phy()
15350 		netdev_err(bp->dev, "Probe phy can't update link (rc: %x)\n",  in bnxt_probe_phy()
15358 	if (link_info->auto_link_speeds && !link_info->support_auto_speeds)  in bnxt_probe_phy()
15359 		link_info->support_auto_speeds = link_info->support_speeds;  in bnxt_probe_phy()
15362 	mutex_unlock(&bp->link_lock);  in bnxt_probe_phy()
15370 	if (!pdev->msix_cap)  in bnxt_get_max_irq()
15373 	pci_read_config_word(pdev, pdev->msix_cap + PCI_MSIX_FLAGS, &ctrl);  in bnxt_get_max_irq()
15380 	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;  in _bnxt_get_max_rings()
15383 	*max_tx = hw_resc->max_tx_rings;  in _bnxt_get_max_rings()
15384 	*max_rx = hw_resc->max_rx_rings;  in _bnxt_get_max_rings()
15386 	max_irq = min_t(int, bnxt_get_max_func_irqs(bp) -  in _bnxt_get_max_rings()
15388 			hw_resc->max_stat_ctxs -  in _bnxt_get_max_rings()
15390 	if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))  in _bnxt_get_max_rings()
15392 	max_ring_grps = hw_resc->max_hw_ring_grps;  in _bnxt_get_max_rings()
15394 		*max_cp -= 1;  in _bnxt_get_max_rings()
15395 		*max_rx -= 2;  in _bnxt_get_max_rings()
15397 	if (bp->flags & BNXT_FLAG_AGG_RINGS)  in _bnxt_get_max_rings()
15399 	if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {  in _bnxt_get_max_rings()
15421 		return -ENOMEM;  in bnxt_get_max_rings()
15432 	if (rc && (bp->flags & BNXT_FLAG_AGG_RINGS)) {  in bnxt_get_dflt_rings()
15434 		bp->flags &= ~BNXT_FLAG_AGG_RINGS;  in bnxt_get_dflt_rings()
15438 			bp->flags |= BNXT_FLAG_AGG_RINGS;  in bnxt_get_dflt_rings()
15441 		bp->flags |= BNXT_FLAG_NO_AGG_RINGS;  in bnxt_get_dflt_rings()
15442 		bp->dev->hw_features &= ~(NETIF_F_LRO | NETIF_F_GRO_HW);  in bnxt_get_dflt_rings()
15443 		bp->dev->features &= ~(NETIF_F_LRO | NETIF_F_GRO_HW);  in bnxt_get_dflt_rings()
15447 	if (bp->flags & BNXT_FLAG_ROCE_CAP) {  in bnxt_get_dflt_rings()
15459 		max_cp -= BNXT_MIN_ROCE_CP_RINGS;  in bnxt_get_dflt_rings()
15460 		max_irq -= BNXT_MIN_ROCE_CP_RINGS;  in bnxt_get_dflt_rings()
15461 		max_stat -= BNXT_MIN_ROCE_STAT_CTXS;  in bnxt_get_dflt_rings()
15476 	bp->cp_nr_rings = min_t(int, bp->tx_nr_rings_per_tc, bp->rx_nr_rings);  in bnxt_trim_dflt_sh_rings()
15477 	bp->rx_nr_rings = bp->cp_nr_rings;  in bnxt_trim_dflt_sh_rings()
15478 	bp->tx_nr_rings_per_tc = bp->cp_nr_rings;  in bnxt_trim_dflt_sh_rings()
15479 	bp->tx_nr_rings = bp->tx_nr_rings_per_tc;  in bnxt_trim_dflt_sh_rings()
15491 		bp->flags |= BNXT_FLAG_SHARED_RINGS;  in bnxt_set_dflt_rings()
15493 	/* Reduce default rings on multi-port cards so that total default  in bnxt_set_dflt_rings()
15496 	if (bp->port_count > 1) {  in bnxt_set_dflt_rings()
15498 			max_t(int, num_online_cpus() / bp->port_count, 1);  in bnxt_set_dflt_rings()
15505 	bp->rx_nr_rings = min_t(int, dflt_rings, max_rx_rings);  in bnxt_set_dflt_rings()
15506 	bp->tx_nr_rings_per_tc = min_t(int, dflt_rings, max_tx_rings);  in bnxt_set_dflt_rings()
15510 		bp->cp_nr_rings = bp->tx_nr_rings_per_tc + bp->rx_nr_rings;  in bnxt_set_dflt_rings()
15511 	bp->tx_nr_rings = bp->tx_nr_rings_per_tc;  in bnxt_set_dflt_rings()
15513 	avail_msix = bnxt_get_max_func_irqs(bp) - bp->cp_nr_rings;  in bnxt_set_dflt_rings()
15515 		int ulp_num_msix = min(avail_msix, bp->ulp_num_msix_want);  in bnxt_set_dflt_rings()
15522 	if (rc && rc != -ENODEV)  in bnxt_set_dflt_rings()
15523 		netdev_warn(bp->dev, "Unable to reserve tx rings\n");  in bnxt_set_dflt_rings()
15524 	bp->tx_nr_rings_per_tc = bp->tx_nr_rings;  in bnxt_set_dflt_rings()
15528 	/* Rings may have been trimmed, re-reserve the trimmed rings. */  in bnxt_set_dflt_rings()
15531 		if (rc && rc != -ENODEV)  in bnxt_set_dflt_rings()
15532 			netdev_warn(bp->dev, "2nd rings reservation failed.\n");  in bnxt_set_dflt_rings()
15533 		bp->tx_nr_rings_per_tc = bp->tx_nr_rings;  in bnxt_set_dflt_rings()
15536 		bp->rx_nr_rings++;  in bnxt_set_dflt_rings()
15537 		bp->cp_nr_rings++;  in bnxt_set_dflt_rings()
15540 		bp->tx_nr_rings = 0;  in bnxt_set_dflt_rings()
15541 		bp->rx_nr_rings = 0;  in bnxt_set_dflt_rings()
15550 	if (bp->tx_nr_rings)  in bnxt_init_dflt_ring_mode()
15557 		if (BNXT_VF(bp) && rc == -ENODEV)  in bnxt_init_dflt_ring_mode()
15558 			netdev_err(bp->dev, "Cannot configure VF rings while PF is unavailable.\n");  in bnxt_init_dflt_ring_mode()
15560 			netdev_err(bp->dev, "Not enough rings available.\n");  in bnxt_init_dflt_ring_mode()
15567 	bp->tx_nr_rings_per_tc = bp->tx_nr_rings;  in bnxt_init_dflt_ring_mode()
15583 	if (netif_running(bp->dev))  in bnxt_restore_pf_fw_resources()
15591 	if (netif_running(bp->dev)) {  in bnxt_restore_pf_fw_resources()
15593 			dev_close(bp->dev);  in bnxt_restore_pf_fw_resources()
15606 		eth_hw_addr_set(bp->dev, bp->pf.mac_addr);  in bnxt_init_mac_addr()
15609 		struct bnxt_vf_info *vf = &bp->vf;  in bnxt_init_mac_addr()
15612 		if (is_valid_ether_addr(vf->mac_addr)) {  in bnxt_init_mac_addr()
15614 			eth_hw_addr_set(bp->dev, vf->mac_addr);  in bnxt_init_mac_addr()
15620 			eth_hw_addr_random(bp->dev);  in bnxt_init_mac_addr()
15622 		rc = bnxt_approve_mac(bp, bp->dev->dev_addr, strict_approval);  in bnxt_init_mac_addr()
15630 	struct pci_dev *pdev = bp->pdev;  in bnxt_vpd_read_info()
15646 	size = min_t(int, kw_len, BNXT_VPD_FLD_LEN - 1);  in bnxt_vpd_read_info()
15647 	memcpy(bp->board_partno, &vpd_data[pos], size);  in bnxt_vpd_read_info()
15656 	size = min_t(int, kw_len, BNXT_VPD_FLD_LEN - 1);  in bnxt_vpd_read_info()
15657 	memcpy(bp->board_serialno, &vpd_data[pos], size);  in bnxt_vpd_read_info()
15664 	struct pci_dev *pdev = bp->pdev;  in bnxt_pcie_dsn_get()
15669 		netdev_info(bp->dev, "Unable to read adapter's DSN\n");  in bnxt_pcie_dsn_get()
15670 		return -EOPNOTSUPP;  in bnxt_pcie_dsn_get()
15675 	bp->flags |= BNXT_FLAG_DSN_VALID;  in bnxt_pcie_dsn_get()
15681 	if (!bp->db_size)  in bnxt_map_db_bar()
15682 		return -ENODEV;  in bnxt_map_db_bar()
15683 	bp->bar1 = pci_iomap(bp->pdev, 2, bp->db_size);  in bnxt_map_db_bar()
15684 	if (!bp->bar1)  in bnxt_map_db_bar()
15685 		return -ENOMEM;  in bnxt_map_db_bar()
15691 	netdev_info(bp->dev, "%s found at mem %lx, node addr %pM\n",  in bnxt_print_device_info()
15692 		    board_info[bp->board_idx].name,  in bnxt_print_device_info()
15693 		    (long)pci_resource_start(bp->pdev, 0), bp->dev->dev_addr);  in bnxt_print_device_info()
15695 	pcie_print_link_status(bp->pdev);  in bnxt_print_device_info()
15706 		return -ENODEV;  in bnxt_init_one()
15708 	if (!pdev->msix_cap) {  in bnxt_init_one()
15709 		dev_err(&pdev->dev, "MSIX capability not found, aborting\n");  in bnxt_init_one()
15710 		return -ENODEV;  in bnxt_init_one()
15725 		return -ENOMEM;  in bnxt_init_one()
15728 	bp->board_idx = ent->driver_data;  in bnxt_init_one()
15729 	bp->msg_enable = BNXT_DEF_MSG_ENABLE;  in bnxt_init_one()
15732 	if (bnxt_vf_pciid(bp->board_idx))  in bnxt_init_one()
15733 		bp->flags |= BNXT_FLAG_VF;  in bnxt_init_one()
15737 		SET_NETDEV_DEVLINK_PORT(dev, &bp->dl_port);  in bnxt_init_one()
15743 	dev->netdev_ops = &bnxt_netdev_ops;  in bnxt_init_one()
15744 	dev->stat_ops = &bnxt_stat_ops;  in bnxt_init_one()
15745 	dev->watchdog_timeo = BNXT_TX_TIMEOUT;  in bnxt_init_one()
15746 	dev->ethtool_ops = &bnxt_ethtool_ops;  in bnxt_init_one()
15753 	mutex_init(&bp->hwrm_cmd_lock);  in bnxt_init_one()
15754 	mutex_init(&bp->link_lock);  in bnxt_init_one()
15764 		bp->flags |= BNXT_FLAG_CHIP_P5_PLUS;  in bnxt_init_one()
15766 			bp->flags |= BNXT_FLAG_CHIP_P7;  in bnxt_init_one()
15779 		dev_err(&pdev->dev, "Cannot map doorbell BAR rc = %d, aborting\n",  in bnxt_init_one()
15784 	dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_SG |  in bnxt_init_one()
15791 	if (bp->flags & BNXT_FLAG_UDP_GSO_CAP)  in bnxt_init_one()
15792 		dev->hw_features |= NETIF_F_GSO_UDP_L4;  in bnxt_init_one()
15795 		dev->hw_features |= NETIF_F_LRO;  in bnxt_init_one()
15797 	dev->hw_enc_features =  in bnxt_init_one()
15803 	if (bp->flags & BNXT_FLAG_UDP_GSO_CAP)  in bnxt_init_one()
15804 		dev->hw_enc_features |= NETIF_F_GSO_UDP_L4;  in bnxt_init_one()
15805 	if (bp->flags & BNXT_FLAG_CHIP_P7)  in bnxt_init_one()
15806 		dev->udp_tunnel_nic_info = &bnxt_udp_tunnels_p7;  in bnxt_init_one()
15808 		dev->udp_tunnel_nic_info = &bnxt_udp_tunnels;  in bnxt_init_one()
15810 	dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM |  in bnxt_init_one()
15812 	dev->vlan_features = dev->hw_features | NETIF_F_HIGHDMA;  in bnxt_init_one()
15813 	if (bp->fw_cap & BNXT_FW_CAP_VLAN_RX_STRIP)  in bnxt_init_one()
15814 		dev->hw_features |= BNXT_HW_FEATURE_VLAN_ALL_RX;  in bnxt_init_one()
15815 	if (bp->fw_cap & BNXT_FW_CAP_VLAN_TX_INSERT)  in bnxt_init_one()
15816 		dev->hw_features |= BNXT_HW_FEATURE_VLAN_ALL_TX;  in bnxt_init_one()
15818 		dev->hw_features |= NETIF_F_GRO_HW;  in bnxt_init_one()
15819 	dev->features |= dev->hw_features | NETIF_F_HIGHDMA;  in bnxt_init_one()
15820 	if (dev->features & NETIF_F_GRO_HW)  in bnxt_init_one()
15821 		dev->features &= ~NETIF_F_LRO;  in bnxt_init_one()
15822 	dev->priv_flags |= IFF_UNICAST_FLT;  in bnxt_init_one()
15825 	if (bp->tso_max_segs)  in bnxt_init_one()
15826 		netif_set_tso_max_segs(dev, bp->tso_max_segs);  in bnxt_init_one()
15828 	dev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |  in bnxt_init_one()
15832 	init_waitqueue_head(&bp->sriov_cfg_wait);  in bnxt_init_one()
15835 		bp->gro_func = bnxt_gro_func_5730x;  in bnxt_init_one()
15837 			bp->gro_func = bnxt_gro_func_5731x;  in bnxt_init_one()
15839 			bp->gro_func = bnxt_gro_func_5750x;  in bnxt_init_one()
15842 		bp->flags |= BNXT_FLAG_DOUBLE_DB;  in bnxt_init_one()
15846 		dev_err(&pdev->dev, "Unable to initialize mac address.\n");  in bnxt_init_one()
15847 		rc = -EADDRNOTAVAIL;  in bnxt_init_one()
15853 		rc = bnxt_pcie_dsn_get(bp, bp->dsn);  in bnxt_init_one()
15856 	/* MTU range: 60 - FW defined max */  in bnxt_init_one()
15857 	dev->min_mtu = ETH_ZLEN;  in bnxt_init_one()
15858 	dev->max_mtu = bp->max_mtu;  in bnxt_init_one()
15864 	hw_resc = &bp->hw_resc;  in bnxt_init_one()
15865 	bp->max_fltr = hw_resc->max_rx_em_flows + hw_resc->max_rx_wm_flows +  in bnxt_init_one()
15868 	if (bp->max_fltr < BNXT_MAX_FLTR)  in bnxt_init_one()
15869 		bp->max_fltr = BNXT_MAX_FLTR;  in bnxt_init_one()
15877 		if (BNXT_VF(bp) && rc == -ENODEV) {  in bnxt_init_one()
15878 			netdev_err(bp->dev, "Cannot configure VF rings while PF is unavailable.\n");  in bnxt_init_one()
15880 			netdev_err(bp->dev, "Not enough rings available.\n");  in bnxt_init_one()
15881 			rc = -ENOMEM;  in bnxt_init_one()
15890 	if (dev->hw_features & BNXT_HW_FEATURE_VLAN_ALL_RX)  in bnxt_init_one()
15891 		bp->flags |= BNXT_FLAG_STRIP_VLAN;  in bnxt_init_one()
15898 	 * limited MSIX, so we re-initialize the TX rings per TC.  in bnxt_init_one()
15900 	bp->tx_nr_rings_per_tc = bp->tx_nr_rings;  in bnxt_init_one()
15907 				dev_err(&pdev->dev, "Unable to create workqueue.\n");  in bnxt_init_one()
15908 				rc = -ENOMEM;  in bnxt_init_one()
15923 	INIT_LIST_HEAD(&bp->usr_fltr_list);  in bnxt_init_one()
15926 		bp->rss_cap |= BNXT_RSS_CAP_MULTI_RSS_CTX;  in bnxt_init_one()
15928 		dev->queue_mgmt_ops = &bnxt_queue_mgmt_ops;  in bnxt_init_one()
15956 	kfree(bp->ptp_cfg);  in bnxt_init_one()
15957 	bp->ptp_cfg = NULL;  in bnxt_init_one()
15958 	kfree(bp->fw_health);  in bnxt_init_one()
15959 	bp->fw_health = NULL;  in bnxt_init_one()
15963 	kfree(bp->rss_indir_tbl);  in bnxt_init_one()
15964 	bp->rss_indir_tbl = NULL;  in bnxt_init_one()
15991 		pci_wake_from_d3(pdev, bp->wol);  in bnxt_shutdown()
16014 	pci_disable_device(bp->pdev);  in bnxt_suspend()
16027 	rc = pci_enable_device(bp->pdev);  in bnxt_resume()
16029 		netdev_err(dev, "Cannot re-enable PCI device during resume, err = %d\n",  in bnxt_resume()
16033 	pci_set_master(bp->pdev);  in bnxt_resume()
16035 		rc = -ENODEV;  in bnxt_resume()
16040 		rc = -EBUSY;  in bnxt_resume()
16051 		rc = -ENODEV;  in bnxt_resume()
16054 	if (bp->fw_crash_mem)  in bnxt_resume()
16082  * bnxt_io_error_detected - called when PCI error is detected
16084  * @state: The current pci connection state
16103 	if (test_and_set_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) {  in bnxt_io_error_detected()
16104 		netdev_err(bp->dev, "Firmware reset already in progress\n");  in bnxt_io_error_detected()
16118 		set_bit(BNXT_STATE_PCI_CHANNEL_IO_FROZEN, &bp->state);  in bnxt_io_error_detected()
16135  * bnxt_io_slot_reset - called after the pci bus has been reset.
16138  * Restart the card from scratch, as if from a cold-boot.
16152 	netdev_info(bp->dev, "PCI Slot Reset\n");  in bnxt_io_slot_reset()
16154 	if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS) &&  in bnxt_io_slot_reset()
16155 	    test_bit(BNXT_STATE_PCI_CHANNEL_IO_FROZEN, &bp->state))  in bnxt_io_slot_reset()
16161 		dev_err(&pdev->dev,  in bnxt_io_slot_reset()
16162 			"Cannot re-enable PCI device after reset.\n");  in bnxt_io_slot_reset()
16169 		 * As pci_restore_state() does not re-write the BARs if the  in bnxt_io_slot_reset()
16174 				       &bp->state)) {  in bnxt_io_slot_reset()
16177 				pci_write_config_dword(bp->pdev, off, 0);  in bnxt_io_slot_reset()
16196 			dev_err(&pdev->dev, "Firmware not ready\n");  in bnxt_io_slot_reset()
16211 	clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);  in bnxt_io_slot_reset()
16219  * bnxt_io_resume - called when traffic can start flowing again.
16231 	netdev_info(bp->dev, "PCI Slot Resume\n");  in bnxt_io_resume()