263 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset)  in bnx2_reg_rd_ind()  function
295 	return bnx2_reg_rd_ind(bp, bp->shmem_base + offset);  in bnx2_shmem_rd()
336 		io->data = bnx2_reg_rd_ind(bp, io->offset);  in bnx2_drv_ctl()
387 	if (!bnx2_reg_rd_ind(bp, BNX2_FW_MAX_ISCSI_CONN))  in bnx2_register_cnic()
2491 		   bnx2_reg_rd_ind(bp, mcp_p0), bnx2_reg_rd_ind(bp, mcp_p1));  in bnx2_dump_mcp_state()
2493 		   bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_MODE),  in bnx2_dump_mcp_state()
2494 		   bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_STATE),  in bnx2_dump_mcp_state()
2495 		   bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_EVENT_MASK));  in bnx2_dump_mcp_state()
2497 		   bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_PROGRAM_COUNTER),  in bnx2_dump_mcp_state()
2498 		   bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_PROGRAM_COUNTER),  in bnx2_dump_mcp_state()
2499 		   bnx2_reg_rd_ind(bp, BNX2_MCP_CPU_INSTRUCTION));  in bnx2_dump_mcp_state()
2674 	val = bnx2_reg_rd_ind(bp, BNX2_RBUF_STATUS1);  in bnx2_alloc_bad_rbuf()
2679 		val = bnx2_reg_rd_ind(bp, BNX2_RBUF_FW_BUF_ALLOC);  in bnx2_alloc_bad_rbuf()
2689 		val = bnx2_reg_rd_ind(bp, BNX2_RBUF_STATUS1);  in bnx2_alloc_bad_rbuf()
3841 	val = bnx2_reg_rd_ind(bp, cpu_reg->mode);  in load_cpu_fw()
3895 	val = bnx2_reg_rd_ind(bp, cpu_reg->mode);  in load_cpu_fw()
5731 			if (bnx2_reg_rd_ind(bp, start + offset) !=  in bnx2_do_mem_test()
6181 		bnx2_reg_rd_ind(bp, BNX2_FW_RX_DROP_COUNT);  in bnx2_timer()
6494 			   bnx2_reg_rd_ind(bp, ftq_arr[i].off));  in bnx2_dump_ftq()
6499 			   reg, bnx2_reg_rd_ind(bp, reg),  in bnx2_dump_ftq()
6500 			   bnx2_reg_rd_ind(bp, reg + 4),  in bnx2_dump_ftq()
6501 			   bnx2_reg_rd_ind(bp, reg + 8),  in bnx2_dump_ftq()
6502 			   bnx2_reg_rd_ind(bp, reg + 0x1c),  in bnx2_dump_ftq()
6503 			   bnx2_reg_rd_ind(bp, reg + 0x1c),  in bnx2_dump_ftq()
6504 			   bnx2_reg_rd_ind(bp, reg + 0x20));  in bnx2_dump_ftq()
8223 	reg = bnx2_reg_rd_ind(bp, BNX2_SHM_HDR_SIGNATURE);  in bnx2_init_board()
8225 	if (bnx2_reg_rd_ind(bp, BNX2_MCP_TOE_ID) & BNX2_MCP_TOE_ID_FUNCTION_ID)  in bnx2_init_board()
8232 		bp->shmem_base = bnx2_reg_rd_ind(bp, BNX2_SHM_HDR_ADDR_0 + off);  in bnx2_init_board()
8293 			reg = bnx2_reg_rd_ind(bp, addr + i * 4);  in bnx2_init_board()