Lines Matching +full:queue +full:- +full:pkt +full:- +full:tx

1 /* SPDX-License-Identifier: GPL-2.0-only */
28 /* HW supports 40-bit addressing hence the */
108 /* Level-2 Interrupt controller offsets and defines */
118 /* Level-2 instance 0 interrupt bits */
132 /* SYSTEMPORT Lite groups the TX queues interrupts on instance 0 */
220 /* There is a 0xC gap between the end of RX and beginning of TX stats and then
221 * between the end of TX stats and the beginning of the RX RUNT
329 #define TDMA_PORT_SIZE DESC_SIZE /* two 32-bits words */
401 /* Defininition for a given TX ring base address */
490 /* Internal linked-list RAM size */
496 /* Rx/Tx common counter group.*/
499 u32 cnt_127; /* RO Rx/Tx 127 bytes packet */
500 u32 cnt_255; /* RO Rx/Tx 65-255 bytes packet */
501 u32 cnt_511; /* RO Rx/Tx 256-511 bytes packet */
502 u32 cnt_1023; /* RO Rx/Tx 512-1023 bytes packet */
503 u32 cnt_1518; /* RO Rx/Tx 1024-1518 bytes packet */
504 u32 cnt_mgv; /* RO Rx/Tx 1519-1522 good VLAN packet */
505 u32 cnt_2047; /* RO Rx/Tx 1522-2047 bytes packet*/
506 u32 cnt_4095; /* RO Rx/Tx 2048-4095 bytes packet*/
507 u32 cnt_9216; /* RO Rx/Tx 4096-9216 bytes packet*/
513 u32 pkt; /* RO (0x428) Received pkt count*/ member
515 u32 mca; /* RO # of Received multicast pkt */
516 u32 bca; /* RO # of Receive broadcast pkt */
518 u32 cf; /* RO # of Received control frame pkt*/
519 u32 pf; /* RO # of Received pause frame pkt */
520 u32 uo; /* RO # of unknown op code pkt */
523 u32 cde; /* RO # of code error pkt */
524 u32 fcr; /* RO # of carrier sense error pkt */
525 u32 ovr; /* RO # of oversize pkt*/
527 u32 mtue; /* RO # of MTU error pkt*/
528 u32 pok; /* RO # of Received good pkt */
529 u32 uc; /* RO # of unicast pkt */
530 u32 ppp; /* RO # of PPP pkt */
531 u32 rcrc; /* RO (0x470),# of CRC match pkt */
537 u32 pkts; /* RO (0x4a8) Transmited pkt */
538 u32 mca; /* RO # of xmited multicast pkt */
539 u32 bca; /* RO # of xmited broadcast pkt */
543 u32 ovr; /* RO # of xmited oversize pkt */
544 u32 drf; /* RO # of xmited deferral pkt */
545 u32 edf; /* RO # of xmited Excessive deferral pkt*/
546 u32 scl; /* RO # of xmited single collision pkt */
547 u32 mcl; /* RO # of xmited multiple collision pkt*/
548 u32 lcl; /* RO # of xmited late collision pkt */
549 u32 ecl; /* RO # of xmited excessive collision pkt*/
550 u32 frg; /* RO # of xmited fragments pkt*/
554 u32 pok; /* RO # of xmited good pkt */
555 u32 uc; /* RO (0x4f0) # of xmited unicast pkt */
560 struct bcm_sysport_tx_counters tx; member
579 BCM_SYSPORT_STAT_NETDEV = -1,
593 .stat_sizeof = sizeof(((struct net_device_stats *)0)->m), \
600 .stat_sizeof = sizeof(((struct bcm_sysport_stats64 *)0)->m), \
607 .stat_sizeof = sizeof(((struct bcm_sysport_priv *)0)->m), \
619 .stat_sizeof = sizeof(((struct bcm_sysport_priv *)0)->m), \
627 .stat_sizeof = sizeof(((struct bcm_sysport_priv *)0)->m), \
635 .stat_sizeof = sizeof(((struct bcm_sysport_priv *)0)->m), \
641 /* TX bytes and packets */
688 /* Software view of the TX ring */
690 spinlock_t lock; /* Ring lock for tx reclaim/xmit */
691 struct napi_struct napi; /* NAPI per tx queue */
694 unsigned int alloc_size; /* Ring one-time allocated size */
703 unsigned int switch_queue; /* switch port queue number */
704 unsigned int switch_port; /* switch port queue number */
705 bool inspect; /* inspect switch port and queue */
728 /* Receive queue */