Lines Matching full:emac
45 #define ISTAT_EMAC 0x04000000 /* EMAC Interrupt */
126 #define B44_RXCONFIG 0x0400UL /* EMAC RX Config */
136 #define B44_RXMAXLEN 0x0404UL /* EMAC RX Max Packet Length */
137 #define B44_TXMAXLEN 0x0408UL /* EMAC TX Max Packet Length */
138 #define B44_MDIO_CTRL 0x0410UL /* EMAC MDIO Control */
141 #define B44_MDIO_DATA 0x0414UL /* EMAC MDIO Data */
157 #define B44_EMAC_IMASK 0x0418UL /* EMAC Interrupt Mask */
158 #define B44_EMAC_ISTAT 0x041CUL /* EMAC Interrupt Status */
162 #define B44_CAM_DATA_LO 0x0420UL /* EMAC CAM Data Low */
163 #define B44_CAM_DATA_HI 0x0424UL /* EMAC CAM Data High */
165 #define B44_CAM_CTRL 0x0428UL /* EMAC CAM Control */
173 #define B44_ENET_CTRL 0x042CUL /* EMAC ENET Control */
174 #define ENET_CTRL_ENABLE 0x00000001 /* EMAC Enable */
175 #define ENET_CTRL_DISABLE 0x00000002 /* EMAC Disable */
176 #define ENET_CTRL_SRST 0x00000004 /* EMAC Soft Reset */
178 #define B44_TX_CTRL 0x0430UL /* EMAC TX Control */
183 #define B44_TX_WMARK 0x0434UL /* EMAC TX Watermark */
184 #define B44_MIB_CTRL 0x0438UL /* EMAC MIB Control */