Lines Matching +full:0 +full:x101000

10 #define ASP_INTR2_OFFSET			0x1000
11 #define ASP_INTR2_STATUS 0x0
12 #define ASP_INTR2_SET 0x4
13 #define ASP_INTR2_CLEAR 0x8
14 #define ASP_INTR2_MASK_STATUS 0xc
15 #define ASP_INTR2_MASK_SET 0x10
16 #define ASP_INTR2_MASK_CLEAR 0x14
25 #define ASP_WAKEUP_INTR2_OFFSET 0x1200
26 #define ASP_WAKEUP_INTR2_STATUS 0x0
27 #define ASP_WAKEUP_INTR2_SET 0x4
28 #define ASP_WAKEUP_INTR2_CLEAR 0x8
29 #define ASP_WAKEUP_INTR2_MASK_STATUS 0xc
30 #define ASP_WAKEUP_INTR2_MASK_SET 0x10
31 #define ASP_WAKEUP_INTR2_MASK_CLEAR 0x14
32 #define ASP_WAKEUP_INTR2_MPD_0 BIT(0)
38 #define ASP_CTRL2_OFFSET 0x2000
39 #define ASP_CTRL2_CORE_CLOCK_SELECT 0x0
40 #define ASP_CTRL2_CORE_CLOCK_SELECT_MAIN BIT(0)
41 #define ASP_CTRL2_CPU_CLOCK_SELECT 0x4
42 #define ASP_CTRL2_CPU_CLOCK_SELECT_MAIN BIT(0)
44 #define ASP_TX_ANALYTICS_OFFSET 0x4c000
45 #define ASP_TX_ANALYTICS_CTRL 0x0
47 #define ASP_RX_ANALYTICS_OFFSET 0x98000
48 #define ASP_RX_ANALYTICS_CTRL 0x0
50 #define ASP_RX_CTRL_OFFSET 0x9f000
51 #define ASP_RX_CTRL_UMAC_0_FRAME_COUNT 0x8
52 #define ASP_RX_CTRL_UMAC_1_FRAME_COUNT 0xc
53 #define ASP_RX_CTRL_FB_0_FRAME_COUNT 0x14
54 #define ASP_RX_CTRL_FB_1_FRAME_COUNT 0x18
55 #define ASP_RX_CTRL_FB_8_FRAME_COUNT 0x1c
57 /* ASP2.0 */
58 #define ASP_RX_CTRL_FB_OUT_FRAME_COUNT 0x20
59 #define ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT 0x24
60 #define ASP_RX_CTRL_FLUSH 0x28
61 #define ASP_CTRL_UMAC0_FLUSH_MASK (BIT(0) | BIT(12))
64 #define ASP_RX_CTRL_FB_RX_FIFO_DEPTH 0x30
66 #define ASP_RX_CTRL_FB_9_FRAME_COUNT_2_1 0x20
67 #define ASP_RX_CTRL_FB_10_FRAME_COUNT_2_1 0x24
68 #define ASP_RX_CTRL_FB_OUT_FRAME_COUNT_2_1 0x28
69 #define ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT_2_1 0x2c
70 #define ASP_RX_CTRL_FLUSH_2_1 0x30
71 #define ASP_RX_CTRL_FB_RX_FIFO_DEPTH_2_1 0x38
73 #define ASP_RX_FILTER_OFFSET 0x80000
74 #define ASP_RX_FILTER_BLK_CTRL 0x0
75 #define ASP_RX_FILTER_OPUT_EN BIT(0)
81 #define ASP_RX_FILTER_MDA_CFG(sel) (((sel) * 0x14) + 0x100)
85 #define ASP_RX_FILTER_MDA_PAT_H(sel) (((sel) * 0x14) + 0x104)
86 #define ASP_RX_FILTER_MDA_PAT_L(sel) (((sel) * 0x14) + 0x108)
87 #define ASP_RX_FILTER_MDA_MSK_H(sel) (((sel) * 0x14) + 0x10c)
88 #define ASP_RX_FILTER_MDA_MSK_L(sel) (((sel) * 0x14) + 0x110)
89 #define ASP_RX_FILTER_MDA_CFG(sel) (((sel) * 0x14) + 0x100)
90 #define ASP_RX_FILTER_MDA_PAT_H(sel) (((sel) * 0x14) + 0x104)
91 #define ASP_RX_FILTER_MDA_PAT_L(sel) (((sel) * 0x14) + 0x108)
92 #define ASP_RX_FILTER_MDA_MSK_H(sel) (((sel) * 0x14) + 0x10c)
93 #define ASP_RX_FILTER_MDA_MSK_L(sel) (((sel) * 0x14) + 0x110)
94 #define ASP_RX_FILTER_NET_CFG(sel) (((sel) * 0xa04) + 0x400)
95 #define ASP_RX_FILTER_NET_CFG_CH(sel) ((sel) << 0)
107 (((sel) * 0xa04) + ((block) * 0x200) + (off) + 0x600)
109 (((sel) * 0xa04) + ((block) * 0x200) + (off) + 0x700)
111 #define ASP_RX_FILTER_NET_OFFSET(sel) (((sel) * 0xa04) + 0xe00)
112 #define ASP_RX_FILTER_NET_OFFSET_L2(val) ((val) << 0)
118 ASP_RX_FILTER_NET_L2 = 0,
125 #define ASP_EDPKT_OFFSET 0x9c000
126 #define ASP_EDPKT_ENABLE 0x4
127 #define ASP_EDPKT_ENABLE_EN BIT(0)
128 #define ASP_EDPKT_HDR_CFG 0xc
130 #define ASP_EDPKT_HDR_SZ_32 0
134 #define ASP_EDPKT_BURST_BUF_PSCAL_TOUT 0x10
135 #define ASP_EDPKT_BURST_BUF_WRITE_TOUT 0x14
136 #define ASP_EDPKT_BURST_BUF_READ_TOUT 0x18
137 #define ASP_EDPKT_RX_TS_COUNTER 0x38
138 #define ASP_EDPKT_ENDI 0x48
140 #define ASP_EDPKT_ENDI_NO_BT_SWP 0
142 #define ASP_EDPKT_RX_PKT_CNT 0x138
143 #define ASP_EDPKT_HDR_EXTR_CNT 0x13c
144 #define ASP_EDPKT_HDR_OUT_CNT 0x140
145 #define ASP_EDPKT_SPARE_REG 0x174
149 #define ASP_CTRL_OFFSET 0x101000
150 #define ASP_CTRL_ASP_SW_INIT 0x04
151 #define ASP_CTRL_ASP_SW_INIT_ACPUSS_CORE BIT(0)
157 #define ASP_CTRL_CLOCK_CTRL 0x04
158 #define ASP_CTRL_CLOCK_CTRL_ASP_TX_DISABLE BIT(0)
161 #define ASP_CTRL_CLOCK_CTRL_ASP_RGMII_MASK (0x7 << ASP_CTRL_CLOCK_CTRL_ASP_RGMII_SHIFT)
163 #define ASP_CTRL_CLOCK_CTRL_ASP_ALL_DISABLE GENMASK(4, 0)
164 #define ASP_CTRL_CORE_CLOCK_SELECT 0x08
165 #define ASP_CTRL_CORE_CLOCK_SELECT_MAIN BIT(0)
166 #define ASP_CTRL_SCRATCH_0 0x0c
191 #define DESC_ADDR(x) ((x) & GENMASK_ULL(39, 0))
201 /* 39:0 (TX/RX) bits 0-39 of buf addr
209 * 60:57 (RX) rx_port_num (0-unicmac0, 1-unimac1)
215 #define DESC_INT_EN BIT(0)
223 /* 0 (TX) tx_int_en
499 #define PKT_OFFLOAD_NOP (0 << 28)