200 int atl1e_read_phy_reg(struct atl1e_hw *hw, u16 reg_addr, u16 *phy_data)  in atl1e_read_phy_reg()  argument
221 		*phy_data = (u16)val;  in atl1e_read_phy_reg()
234 int atl1e_write_phy_reg(struct atl1e_hw *hw, u32 reg_addr, u16 phy_data)  in atl1e_write_phy_reg()  argument
239 	val = ((u32)(phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |  in atl1e_write_phy_reg()
378 	u16 phy_data;  in atl1e_phy_commit()  local
380 	phy_data = BMCR_RESET | BMCR_ANENABLE | BMCR_ANRESTART;  in atl1e_phy_commit()
382 	ret_val = atl1e_write_phy_reg(hw, MII_BMCR, phy_data);  in atl1e_phy_commit()
586 	u16 phy_data;  in atl1e_get_speed_and_duplex()  local
589 	err = atl1e_read_phy_reg(hw, MII_AT001_PSSR, &phy_data);  in atl1e_get_speed_and_duplex()
593 	if (!(phy_data & MII_AT001_PSSR_SPD_DPLX_RESOLVED))  in atl1e_get_speed_and_duplex()
596 	switch (phy_data & MII_AT001_PSSR_SPEED) {  in atl1e_get_speed_and_duplex()
610 	if (phy_data & MII_AT001_PSSR_DPLX)  in atl1e_get_speed_and_duplex()