Lines Matching refs:AT_WRITE_REG
95 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data); in atl1c_pcie_patch()
101 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data); in atl1c_pcie_patch()
104 AT_WRITE_REG(hw, REG_MASTER_CTRL, in atl1c_pcie_patch()
114 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data); in atl1c_pcie_patch()
118 AT_WRITE_REG(hw, REG_LINK_CTRL, data); in atl1c_pcie_patch()
124 AT_WRITE_REG(hw, REG_PM_CTRL, data); in atl1c_pcie_patch()
127 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG); in atl1c_pcie_patch()
146 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd); in atl1c_reset_pcie()
155 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); in atl1c_reset_pcie()
175 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data); in atl1c_reset_pcie()
191 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF); in atl1c_irq_enable()
192 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); in atl1c_irq_enable()
204 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); in atl1c_irq_disable()
205 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); in atl1c_irq_disable()
407 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); in atl1c_set_multi()
410 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); in atl1c_set_multi()
444 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); in atl1c_vlan_mode()
1092 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, in atl1c_configure_des_ring()
1096 AT_WRITE_REG(hw, atl1c_qregs[i].tpd_addr_lo, in atl1c_configure_des_ring()
1099 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, in atl1c_configure_des_ring()
1104 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI, in atl1c_configure_des_ring()
1107 AT_WRITE_REG(hw, atl1c_qregs[i].rfd_addr_lo, in atl1c_configure_des_ring()
1111 AT_WRITE_REG(hw, REG_RFD_RING_SIZE, in atl1c_configure_des_ring()
1113 AT_WRITE_REG(hw, REG_RX_BUF_SIZE, in atl1c_configure_des_ring()
1118 AT_WRITE_REG(hw, atl1c_qregs[i].rrd_addr_lo, in atl1c_configure_des_ring()
1121 AT_WRITE_REG(hw, REG_RRD_RING_SIZE, in atl1c_configure_des_ring()
1125 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L); in atl1c_configure_des_ring()
1126 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L); in atl1c_configure_des_ring()
1127 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L); in atl1c_configure_des_ring()
1128 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L); in atl1c_configure_des_ring()
1129 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L); in atl1c_configure_des_ring()
1130 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L); in atl1c_configure_des_ring()
1131 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ in atl1c_configure_des_ring()
1132 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/ in atl1c_configure_des_ring()
1135 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); in atl1c_configure_des_ring()
1146 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, in atl1c_configure_tx()
1162 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); in atl1c_configure_tx()
1181 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); in atl1c_configure_rx()
1195 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); in atl1c_configure_dma()
1209 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); in atl1c_stop_mac()
1213 AT_WRITE_REG(hw, REG_TXQ_CTRL, data); in atl1c_stop_mac()
1219 AT_WRITE_REG(hw, REG_MAC_CTRL, data); in atl1c_stop_mac()
1252 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq); in atl1c_start_mac()
1253 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq); in atl1c_start_mac()
1254 AT_WRITE_REG(hw, REG_MAC_CTRL, mac); in atl1c_start_mac()
1277 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST); in atl1c_reset_mac()
1289 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data); in atl1c_reset_mac()
1293 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW); in atl1c_reset_mac()
1301 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); in atl1c_reset_mac()
1306 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); in atl1c_reset_mac()
1395 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); in atl1c_set_aspm()
1418 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); in atl1c_configure_mac()
1420 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); in atl1c_configure_mac()
1432 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data); in atl1c_configure_mac()
1434 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, in atl1c_configure_mac()
1444 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); in atl1c_configure_mac()
1453 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); in atl1c_configure_mac()
1455 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, in atl1c_configure_mac()
1459 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + in atl1c_configure_mac()
1483 AT_WRITE_REG(&adapter->hw, REG_MT_MODE, mode); in atl1c_configure()
1626 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); in atl1c_clean_tx()
1660 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); in atl1c_intr_rx_tx()
1694 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); in atl1c_intr()
1726 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); in atl1c_intr()
1825 AT_WRITE_REG(&adapter->hw, atl1c_qregs[queue].rfd_prod, in atl1c_alloc_rx_buffer()
1956 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); in atl1c_clean_rx()
2537 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); in atl1c_resume()