Lines Matching refs:tc

116 	unsigned int tc, q;  in hw_atl2_hw_queue_to_tc_map_set()  local
135 for (tc = 0; tc != tcs; tc++) { in hw_atl2_hw_queue_to_tc_map_set()
136 unsigned int tc_q_offset = tc * q_per_tc; in hw_atl2_hw_queue_to_tc_map_set()
139 rx_map |= tc << HW_ATL2_RX_Q_TC_MAP_SHIFT(q); in hw_atl2_hw_queue_to_tc_map_set()
148 tx_map |= tc << HW_ATL2_TX_Q_TC_MAP_SHIFT(q); in hw_atl2_hw_queue_to_tc_map_set()
168 u32 tc = 0U; in hw_atl2_hw_qos_set() local
179 for (tc = 0; tc < cfg->tcs; tc++) { in hw_atl2_hw_qos_set()
183 hw_atl_tpb_tx_pkt_buff_size_per_tc_set(self, tx_buff_size, tc); in hw_atl2_hw_qos_set()
186 hw_atl_tpb_tx_buff_hi_threshold_per_tc_set(self, threshold, tc); in hw_atl2_hw_qos_set()
189 hw_atl_tpb_tx_buff_lo_threshold_per_tc_set(self, threshold, tc); in hw_atl2_hw_qos_set()
192 hw_atl_rpb_rx_pkt_buff_size_per_tc_set(self, rx_buff_size, tc); in hw_atl2_hw_qos_set()
195 hw_atl_rpb_rx_buff_hi_threshold_per_tc_set(self, threshold, tc); in hw_atl2_hw_qos_set()
198 hw_atl_rpb_rx_buff_lo_threshold_per_tc_set(self, threshold, tc); in hw_atl2_hw_qos_set()
200 hw_atl_b0_set_fc(self, self->aq_nic_cfg->fc.req, tc); in hw_atl2_hw_qos_set()
220 int tc; in hw_atl2_hw_rss_set() local
228 for (tc = 0; tc != num_tcs; tc++) { in hw_atl2_hw_rss_set()
229 hw_atl2_new_rpf_rss_redir_set(self, tc, i, in hw_atl2_hw_rss_set()
230 tc * in hw_atl2_hw_rss_set()
254 int tc; in hw_atl2_hw_init_tx_tc_rate_limit() local
269 for (tc = 0; tc != nic_cfg->tcs; tc++) { in hw_atl2_hw_init_tx_tc_rate_limit()
270 if (!nic_cfg->tc_min_rate[tc]) { in hw_atl2_hw_init_tx_tc_rate_limit()
271 tc_weight[tc] = 0; in hw_atl2_hw_init_tx_tc_rate_limit()
275 tc_weight[tc] = (-1L + link_speed + in hw_atl2_hw_init_tx_tc_rate_limit()
276 nic_cfg->tc_min_rate[tc] * in hw_atl2_hw_init_tx_tc_rate_limit()
279 tc_weight[tc] = min(tc_weight[tc], max_weight); in hw_atl2_hw_init_tx_tc_rate_limit()
280 sum_weight += tc_weight[tc]; in hw_atl2_hw_init_tx_tc_rate_limit()
295 for (tc = 0; tc != nic_cfg->tcs; tc++) { in hw_atl2_hw_init_tx_tc_rate_limit()
296 const u32 en = (nic_cfg->tc_max_rate[tc] != 0) ? 1U : 0U; in hw_atl2_hw_init_tx_tc_rate_limit()
297 const u32 desc = AQ_NIC_CFG_TCVEC2RING(nic_cfg, tc, 0); in hw_atl2_hw_init_tx_tc_rate_limit()
300 hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(self, tc, in hw_atl2_hw_init_tx_tc_rate_limit()
302 hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(self, tc, 0x1E); in hw_atl2_hw_init_tx_tc_rate_limit()
305 weight = tc_weight[tc]; in hw_atl2_hw_init_tx_tc_rate_limit()
319 hw_atl2_tps_tx_pkt_shed_tc_data_weight_set(self, tc, weight); in hw_atl2_hw_init_tx_tc_rate_limit()
320 hw_atl2_tps_tx_pkt_shed_tc_data_max_credit_set(self, tc, in hw_atl2_hw_init_tx_tc_rate_limit()
328 nic_cfg->tc_max_rate[tc]; in hw_atl2_hw_init_tx_tc_rate_limit()
343 for (tc = nic_cfg->tcs; tc != AQ_CFG_TCS_MAX; tc++) { in hw_atl2_hw_init_tx_tc_rate_limit()
344 const u32 desc = AQ_NIC_CFG_TCVEC2RING(nic_cfg, tc, 0); in hw_atl2_hw_init_tx_tc_rate_limit()