Lines Matching +full:mac +full:- +full:address
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Altera Triple-Speed Ethernet MAC driver
3 * Copyright (C) 2008-2014 Altera Corporation. All rights reserved
48 /* MAC function configuration default settings */
55 /* MAC Command_Config Register Bit Definitions
113 /* MDIO registers within MAC register Space
120 u32 auto_negotiation_advertisement; /* Auto-negotiation
154 /* MAC register Space. Note that some of these registers may or may not be
169 * MAC block
172 /* 32-bit primary MAC address word 0 bits 0 to 31 of the primary
173 * MAC address
176 /* 32-bit primary MAC address word 1 bits 32 to 47 of the primary
177 * MAC address
180 /* 14-bit maximum frame length. The MAC receive logic */
186 /* 12-bit receive FIFO section-empty threshold */
188 /* 12-bit receive FIFO section-full threshold */
190 /* 12-bit transmit FIFO section-empty threshold */
192 /* 12-bit transmit FIFO section-full threshold */
194 /* 12-bit receive FIFO almost-empty threshold */
196 /* 12-bit receive FIFO almost-full threshold */
198 /* 12-bit transmit FIFO almost-empty threshold */
200 /* 12-bit transmit FIFO almost-full threshold */
202 /* MDIO address of PHY Device 0. Bits 0 to 4 hold a 5-bit PHY address */
204 /* MDIO address of PHY Device 1. Bits 0 to 4 hold a 5-bit PHY address */
207 /* Bit[15:0]—16-bit holdoff quanta */
218 /* The MAC addresses */
244 /* IETF MIB (MIB-II) Object Support */
268 * of the MAC client.
316 /* Multicast address resolution table, mapped in the controller address
327 /* 4 Supplemental MAC Addresses */
401 /* MAC address space */
407 /* mSGDMA Rx Dispatcher address space */
412 /* mSGDMA Tx Dispatcher address space */
416 /* SGMII PCS address space */
436 /* RX/TX MAC FIFO configs */
457 /* MAC command_config register protection */
465 int phy_addr; /* PHY's MDIO address, -1 for autodetection */
487 u32 csrrd32(void __iomem *mac, size_t offs) in csrrd32() argument
489 void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); in csrrd32()
494 u16 csrrd16(void __iomem *mac, size_t offs) in csrrd16() argument
496 void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); in csrrd16()
501 u8 csrrd8(void __iomem *mac, size_t offs) in csrrd8() argument
503 void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); in csrrd8()
508 void csrwr32(u32 val, void __iomem *mac, size_t offs) in csrwr32() argument
510 void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); in csrwr32()
516 void csrwr16(u16 val, void __iomem *mac, size_t offs) in csrwr16() argument
518 void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); in csrwr16()
524 void csrwr8(u8 val, void __iomem *mac, size_t offs) in csrwr8() argument
526 void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); in csrwr8()