Lines Matching +full:100 +full:base +full:- +full:fx

3 	Written 1996-1999 by Donald Becker.
43 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
48 /* ARM systems perform better by disregarding the bus-master
49 transfer capability of these cards. -- rmk */
98 This is only in the support-all-kernels source code. */
117 The Boomerang size is twice as large as the Vortex -- it has additional
124 code size of a per-interface flag is not worthwhile. */
137 XL, 3Com's PCI to 10/100baseT adapters. It also works with the 10Mbs
145 II. Board-specific settings
151 The EEPROM settings for media type and forced-full-duplex are observed.
158 series. The primary interface is two programmed-I/O FIFOs, with an
159 alternate single-contiguous-region bus-master transfer (see next).
161 The 3c900 "Boomerang" series uses a full-bus-master interface with separate
164 programmed-I/O interface that has been removed in 'B' and subsequent board
176 The Boomerang chip's full-bus-master interface is useful, and has the
177 currently-unused advantages over other similar chips that queued transmit
181 With full-bus-master support, this driver uses a "RX_COPYBREAK" scheme.
183 full-sized skbuffs as receive buffers. The value RX_COPYBREAK is used as
184 the copying breakpoint: it is chosen to trade-off the memory wasted by
185 passing the full-sized skbuff to the queue layer for all frames vs. the
186 copying cost of copying a frame to a correctly-sized skbuff.
189 The driver runs as two independent, single-threaded flows of control. One
190 is the send-packet routine, which enforces single-threaded use by the
191 dev->tbusy flag. The other thread is the interrupt handler, which is single
215 EEPROM_8BIT=0x10, /* AKPM: Uses 0x230 as the base bitmaps for EEPROM reads */
287 {"3c595 Vortex 100baseTx",
289 {"3c595 Vortex 100baseT4",
292 {"3c595 Vortex 100base-MII",
305 {"3c900B-FL Cyclone 10base-FL",
307 {"3c905 Boomerang 100baseTx",
309 {"3c905 Boomerang 100baseT4",
311 {"3C905B-TX Fast Etherlink XL PCI",
313 {"3c905B Cyclone 100baseTx",
316 {"3c905B Cyclone 10/100/BNC",
318 {"3c905B-FX Cyclone 100baseFx",
322 {"3c920B-EMB-WNM (ATI Radeon 9100 IGP)",
327 {"3c980C Python-T",
329 {"3cSOHO100-TX Hurricane",
340 {"3c575 [Megahertz] 10/100 LAN CardBus",
357 {"3CXFEM656C Tornado+Winmodem CardBus", /* From pcmcia-cs-3.1.5 */
369 {"3c905B-T4",
371 {"3c920B-EMB-WNM Tornado",
445 32-bit 'Dwords' rather than octets. */
474 On the Vortex this window is always mapped at offsets 0x10-0x1f. */
505 ((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
508 (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
509 (((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
525 Media_Lnk = 0x0080, /* Enable just link beat for 100TX/100FX. */
584 /* Chip features we care about in vp->capabilities, read from the EEPROM. */
596 /* The Rx and Tx rings should be quad-word-aligned. */
601 /* The addresses of transmit- and receive-in-place skbuffs. */
606 struct vortex_extra_stats xstats; /* NIC-specific extra stats */
615 /* Some values here only for performance evaluation and path-coverage */
621 int options; /* User-settable misc. driver options. */
622 unsigned int media_override:4, /* Passed-in media type. */
625 bus_master:1, /* Vortex can only do a fragment bus-m. */
630 enable_wol:1, /* Wake-on-LAN is enabled */
631 pm_state_valid:1, /* pci_dev->saved_config_space has sane contents */
662 if (window != vp->window) { in window_set()
663 iowrite16(SelectWindow + window, vp->ioaddr + EL3_CMD); in window_set()
664 vp->window = window; in window_set()
674 spin_lock_irqsave(&vp->window_lock, flags); \
676 ret = ioread ## size(vp->ioaddr + addr); \
677 spin_unlock_irqrestore(&vp->window_lock, flags); \
685 spin_lock_irqsave(&vp->window_lock, flags); \
687 iowrite ## size(value, vp->ioaddr + addr); \
688 spin_unlock_irqrestore(&vp->window_lock, flags); \
701 ((struct pci_dev *) (((vp)->gendev) ? DEVICE_PCI((vp)->gendev) : NULL))
704 #define DEVICE_EISA(dev) (((dev)->bus == &eisa_bus_type) ? to_eisa_device((dev)) : NULL)
710 ((struct eisa_device *) (((vp)->gendev) ? DEVICE_EISA((vp)->gendev) : NULL))
723 mask:8, /* The transceiver-present bit in Wn3_Config.*/
731 { "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx, (14*HZ)/10},
732 { "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14*HZ)/10},
736 { "MII-External", 0, 0x41, XCVR_10baseT, 3*HZ },
784 /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
785 /* Option count limit only -- unlimited interfaces are supported. */
787 static int options[MAX_UNITS] = { [0 ... MAX_UNITS-1] = -1 };
788 static int full_duplex[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
789 static int hw_checksums[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
790 static int flow_ctrl[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
791 static int enable_wol[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
792 static int use_mmio[MAX_UNITS] = {[0 ... MAX_UNITS-1] = -1 };
793 static int global_options = -1;
794 static int global_full_duplex = -1;
795 static int global_enable_wol = -1;
796 static int global_use_mmio = -1;
798 /* Variables to work-around the Compaq PCI BIOS32 problem. */
821 MODULE_PARM_DESC(debug, "3c59x debug level (0-6)");
822 MODULE_PARM_DESC(options, "3c59x: Bits 0-3: media type, bit 4: bus mastering, bit 9: full duplex");
826 MODULE_PARM_DESC(hw_checksums, "3c59x Hardware checksum checking by adapter(s) (0-1)");
827 MODULE_PARM_DESC(flow_ctrl, "3c59x 802.3x flow control usage (PAUSE only) (0-1)");
828 MODULE_PARM_DESC(enable_wol, "3c59x: Turn on Wake-on-LAN for adapter(s) (0-1)");
830 MODULE_PARM_DESC(rx_copybreak, "3c59x copy breakpoint for copy-only-tiny-frames");
832 MODULE_PARM_DESC(compaq_ioaddr, "3c59x PCI I/O base address (Compaq BIOS problem workaround)");
837 MODULE_PARM_DESC(use_mmio, "3c59x: use memory-mapped PCI I/O resource (0-1)");
842 vortex_boomerang_interrupt(dev->irq, dev); in poll_vortex()
910 if (!request_region(edev->base_addr, VORTEX_TOTAL_SIZE, DRV_NAME)) in vortex_eisa_probe()
911 return -EBUSY; in vortex_eisa_probe()
913 ioaddr = ioport_map(edev->base_addr, VORTEX_TOTAL_SIZE); in vortex_eisa_probe()
916 edev->id.driver_data, vortex_cards_found)) { in vortex_eisa_probe()
917 release_region(edev->base_addr, VORTEX_TOTAL_SIZE); in vortex_eisa_probe()
918 return -ENODEV; in vortex_eisa_probe()
942 ioaddr = vp->ioaddr; in vortex_eisa_remove()
946 release_region(edev->base_addr, VORTEX_TOTAL_SIZE); in vortex_eisa_remove()
985 /* Special code to work-around the Compaq PCI BIOS32 problem. */ in vortex_eisa_init()
991 return vortex_cards_found - orig_cards_found + eisa_found; in vortex_eisa_init()
1015 vci = &vortex_info_tbl[ent->driver_data]; in vortex_init_one()
1016 pci_bar = vci->drv_flags & (IS_CYCLONE | IS_TORNADO) ? 1 : 0; in vortex_init_one()
1023 if (!ioaddr) /* If mapping fails, fall-back to BAR 0... */ in vortex_init_one()
1026 rc = -ENOMEM; in vortex_init_one()
1030 rc = vortex_probe1(&pdev->dev, ioaddr, pdev->irq, in vortex_init_one()
1031 ent->driver_data, unit); in vortex_init_one()
1115 print_name = dev_name(&edev->dev); in vortex_probe1()
1120 retval = -ENOMEM; in vortex_probe1()
1130 if (dev->mem_start) { in vortex_probe1()
1133 * LILO 'ether=' argument for non-modular use in vortex_probe1()
1135 option = dev->mem_start; in vortex_probe1()
1148 vp->enable_wol = 1; in vortex_probe1()
1158 vci->name, in vortex_probe1()
1161 dev->base_addr = (unsigned long)ioaddr; in vortex_probe1()
1162 dev->irq = irq; in vortex_probe1()
1163 dev->mtu = mtu; in vortex_probe1()
1164 vp->ioaddr = ioaddr; in vortex_probe1()
1165 vp->large_frames = mtu > 1500; in vortex_probe1()
1166 vp->drv_flags = vci->drv_flags; in vortex_probe1()
1167 vp->has_nway = (vci->drv_flags & HAS_NWAY) ? 1 : 0; in vortex_probe1()
1168 vp->io_size = vci->io_size; in vortex_probe1()
1169 vp->card_idx = card_idx; in vortex_probe1()
1170 vp->window = -1; in vortex_probe1()
1177 /* PCI-only startup logic */ in vortex_probe1()
1179 /* enable bus-mastering if necessary */ in vortex_probe1()
1180 if (vci->flags & PCI_USES_MASTER) in vortex_probe1()
1183 if (vci->drv_flags & IS_VORTEX) { in vortex_probe1()
1200 spin_lock_init(&vp->lock); in vortex_probe1()
1201 spin_lock_init(&vp->mii_lock); in vortex_probe1()
1202 spin_lock_init(&vp->window_lock); in vortex_probe1()
1203 vp->gendev = gendev; in vortex_probe1()
1204 vp->mii.dev = dev; in vortex_probe1()
1205 vp->mii.mdio_read = mdio_read; in vortex_probe1()
1206 vp->mii.mdio_write = mdio_write; in vortex_probe1()
1207 vp->mii.phy_id_mask = 0x1f; in vortex_probe1()
1208 vp->mii.reg_num_mask = 0x1f; in vortex_probe1()
1211 vp->rx_ring = dma_alloc_coherent(gendev, sizeof(struct boom_rx_desc) * RX_RING_SIZE in vortex_probe1()
1213 &vp->rx_ring_dma, GFP_KERNEL); in vortex_probe1()
1214 retval = -ENOMEM; in vortex_probe1()
1215 if (!vp->rx_ring) in vortex_probe1()
1218 vp->tx_ring = (struct boom_tx_desc *)(vp->rx_ring + RX_RING_SIZE); in vortex_probe1()
1219 vp->tx_ring_dma = vp->rx_ring_dma + sizeof(struct boom_rx_desc) * RX_RING_SIZE; in vortex_probe1()
1221 /* if we are a PCI driver, we store info in pdev->driver_data in vortex_probe1()
1228 vp->media_override = 7; in vortex_probe1()
1230 vp->media_override = ((option & 7) == 2) ? 0 : option & 15; in vortex_probe1()
1231 if (vp->media_override != 7) in vortex_probe1()
1232 vp->medialock = 1; in vortex_probe1()
1233 vp->full_duplex = (option & 0x200) ? 1 : 0; in vortex_probe1()
1234 vp->bus_master = (option & 16) ? 1 : 0; in vortex_probe1()
1238 vp->full_duplex = 1; in vortex_probe1()
1240 vp->enable_wol = 1; in vortex_probe1()
1244 vp->full_duplex = 1; in vortex_probe1()
1246 vp->flow_ctrl = 1; in vortex_probe1()
1248 vp->enable_wol = 1; in vortex_probe1()
1251 vp->mii.force_media = vp->full_duplex; in vortex_probe1()
1252 vp->options = option; in vortex_probe1()
1255 int base; in vortex_probe1() local
1257 if (vci->drv_flags & EEPROM_8BIT) in vortex_probe1()
1258 base = 0x230; in vortex_probe1()
1259 else if (vci->drv_flags & EEPROM_OFFSET) in vortex_probe1()
1260 base = EEPROM_Read + 0x30; in vortex_probe1()
1262 base = EEPROM_Read; in vortex_probe1()
1266 window_write16(vp, base + i, 0, Wn0EepromCmd); in vortex_probe1()
1268 for (timer = 10; timer >= 0; timer--) { in vortex_probe1()
1285 if ((checksum != 0x00) && !(vci->drv_flags & IS_TORNADO)) in vortex_probe1()
1291 pr_cont(" %pM", dev->dev_addr); in vortex_probe1()
1294 if (!is_valid_ether_addr(dev->dev_addr)) { in vortex_probe1()
1295 retval = -EINVAL; in vortex_probe1()
1300 window_write8(vp, dev->dev_addr[i], 2, i); in vortex_probe1()
1303 pr_cont(", IRQ %d\n", dev->irq); in vortex_probe1()
1305 if (dev->irq <= 0 || dev->irq >= nr_irqs) in vortex_probe1()
1307 dev->irq); in vortex_probe1()
1311 pr_info(" product code %02x%02x rev %02x.%d date %02d-%02d-%02d\n", in vortex_probe1()
1317 if (pdev && vci->drv_flags & HAS_CB_FNS) { in vortex_probe1()
1320 vp->cb_fn_base = pci_iomap(pdev, 2, 0); in vortex_probe1()
1321 if (!vp->cb_fn_base) { in vortex_probe1()
1322 retval = -ENOMEM; in vortex_probe1()
1327 pr_info("%s: CardBus functions mapped %16.16llx->%p\n", in vortex_probe1()
1330 vp->cb_fn_base); in vortex_probe1()
1334 if (vp->drv_flags & INVERT_LED_PWR) in vortex_probe1()
1336 if (vp->drv_flags & INVERT_MII_PWR) in vortex_probe1()
1339 if (vp->drv_flags & WNO_XCVR_PWR) { in vortex_probe1()
1345 vp->info1 = eeprom[13]; in vortex_probe1()
1346 vp->info2 = eeprom[15]; in vortex_probe1()
1347 vp->capabilities = eeprom[16]; in vortex_probe1()
1349 if (vp->info1 & 0x8000) { in vortex_probe1()
1350 vp->full_duplex = 1; in vortex_probe1()
1358 vp->available_media = window_read16(vp, 3, Wn3_Options); in vortex_probe1()
1359 if ((vp->available_media & 0xff) == 0) /* Broken 3c916 */ in vortex_probe1()
1360 vp->available_media = 0x40; in vortex_probe1()
1365 pr_info(" %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n", in vortex_probe1()
1373 vp->default_media = XCVR(config); in vortex_probe1()
1374 if (vp->default_media == XCVR_NWAY) in vortex_probe1()
1375 vp->has_nway = 1; in vortex_probe1()
1376 vp->autoselect = AUTOSELECT(config); in vortex_probe1()
1379 if (vp->media_override != 7) { in vortex_probe1()
1381 print_name, vp->media_override, in vortex_probe1()
1382 media_tbl[vp->media_override].name); in vortex_probe1()
1383 dev->if_port = vp->media_override; in vortex_probe1()
1385 dev->if_port = vp->default_media; in vortex_probe1()
1387 if ((vp->available_media & 0x40) || (vci->drv_flags & HAS_NWAY) || in vortex_probe1()
1388 dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) { in vortex_probe1()
1391 if (vp->drv_flags & EXTRA_PREAMBLE) in vortex_probe1()
1405 phyx = phy - 1; in vortex_probe1()
1410 vp->phys[phy_idx++] = phyx; in vortex_probe1()
1419 mii_preamble_required--; in vortex_probe1()
1422 vp->phys[0] = 24; in vortex_probe1()
1424 vp->advertising = mdio_read(dev, vp->phys[0], MII_ADVERTISE); in vortex_probe1()
1425 if (vp->full_duplex) { in vortex_probe1()
1427 vp->advertising &= ~0x02A0; in vortex_probe1()
1428 mdio_write(dev, vp->phys[0], 4, vp->advertising); in vortex_probe1()
1431 vp->mii.phy_id = vp->phys[0]; in vortex_probe1()
1434 if (vp->capabilities & CapBusMaster) { in vortex_probe1()
1435 vp->full_bus_master_tx = 1; in vortex_probe1()
1437 pr_info(" Enabling bus-master transmits and %s receives.\n", in vortex_probe1()
1438 (vp->info2 & 1) ? "early" : "whole-frame" ); in vortex_probe1()
1440 vp->full_bus_master_rx = (vp->info2 & 1) ? 1 : 2; in vortex_probe1()
1441 vp->bus_master = 0; /* AKPM: vortex only */ in vortex_probe1()
1444 /* The 3c59x-specific entries in the device structure. */ in vortex_probe1()
1445 if (vp->full_bus_master_tx) { in vortex_probe1()
1446 dev->netdev_ops = &boomrang_netdev_ops; in vortex_probe1()
1449 ((hw_checksums[card_idx] == -1 && (vp->drv_flags & HAS_HWCKSM)) || in vortex_probe1()
1451 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; in vortex_probe1()
1454 dev->netdev_ops = &vortex_netdev_ops; in vortex_probe1()
1459 (dev->features & NETIF_F_SG) ? "en":"dis", in vortex_probe1()
1460 (dev->features & NETIF_F_IP_CSUM) ? "en":"dis"); in vortex_probe1()
1463 dev->ethtool_ops = &vortex_ethtool_ops; in vortex_probe1()
1464 dev->watchdog_timeo = (watchdog * HZ) / 1000; in vortex_probe1()
1467 vp->pm_state_valid = 1; in vortex_probe1()
1476 dma_free_coherent(&pdev->dev, in vortex_probe1()
1479 vp->rx_ring, vp->rx_ring_dma); in vortex_probe1()
1491 void __iomem *ioaddr = vp->ioaddr; in issue_and_wait()
1505 dev->name, cmd, i * 10); in issue_and_wait()
1511 dev->name, cmd, ioread16(ioaddr + EL3_STATUS)); in issue_and_wait()
1519 pr_info("%s: setting %s-duplex.\n", in vortex_set_duplex()
1520 dev->name, (vp->full_duplex) ? "full" : "half"); in vortex_set_duplex()
1522 /* Set the full-duplex bit. */ in vortex_set_duplex()
1524 ((vp->info1 & 0x8000) || vp->full_duplex ? 0x20 : 0) | in vortex_set_duplex()
1525 (vp->large_frames ? 0x40 : 0) | in vortex_set_duplex()
1526 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? in vortex_set_duplex()
1539 if (mii_check_media(&vp->mii, ok_to_print, init)) { in vortex_check_media()
1540 vp->full_duplex = vp->mii.full_duplex; in vortex_check_media()
1551 void __iomem *ioaddr = vp->ioaddr; in vortex_up()
1557 if (vp->pm_state_valid) in vortex_up()
1561 pr_warn("%s: Could not enable device\n", dev->name); in vortex_up()
1569 if (vp->media_override != 7) { in vortex_up()
1571 dev->name, vp->media_override, in vortex_up()
1572 media_tbl[vp->media_override].name); in vortex_up()
1573 dev->if_port = vp->media_override; in vortex_up()
1574 } else if (vp->autoselect) { in vortex_up()
1575 if (vp->has_nway) { in vortex_up()
1578 dev->name, dev->if_port); in vortex_up()
1579 dev->if_port = XCVR_NWAY; in vortex_up()
1581 /* Find first available media type, starting with 100baseTx. */ in vortex_up()
1582 dev->if_port = XCVR_100baseTx; in vortex_up()
1583 while (! (vp->available_media & media_tbl[dev->if_port].mask)) in vortex_up()
1584 dev->if_port = media_tbl[dev->if_port].next; in vortex_up()
1587 dev->name, media_tbl[dev->if_port].name); in vortex_up()
1590 dev->if_port = vp->default_media; in vortex_up()
1593 dev->name, media_tbl[dev->if_port].name); in vortex_up()
1596 timer_setup(&vp->timer, vortex_timer, 0); in vortex_up()
1597 mod_timer(&vp->timer, RUN_AT(media_tbl[dev->if_port].wait)); in vortex_up()
1601 dev->name, media_tbl[dev->if_port].name); in vortex_up()
1603 vp->full_duplex = vp->mii.force_media; in vortex_up()
1604 config = BFINS(config, dev->if_port, 20, 4); in vortex_up()
1609 if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) { in vortex_up()
1610 mdio_read(dev, vp->phys[0], MII_BMSR); in vortex_up()
1611 mii_reg5 = mdio_read(dev, vp->phys[0], MII_LPA); in vortex_up()
1612 vp->partner_flow_ctrl = ((mii_reg5 & 0x0400) != 0); in vortex_up()
1613 vp->mii.full_duplex = vp->full_duplex; in vortex_up()
1622 * Don't reset the PHY - that upsets autonegotiation during DHCP operations. in vortex_up()
1631 dev->name, dev->irq, window_read16(vp, 4, Wn4_Media)); in vortex_up()
1636 window_write8(vp, dev->dev_addr[i], 2, i); in vortex_up()
1640 if (vp->cb_fn_base) { in vortex_up()
1642 if (vp->drv_flags & INVERT_LED_PWR) in vortex_up()
1644 if (vp->drv_flags & INVERT_MII_PWR) in vortex_up()
1649 if (dev->if_port == XCVR_10base2) in vortex_up()
1652 if (dev->if_port != XCVR_NWAY) { in vortex_up()
1656 media_tbl[dev->if_port].media_bits, in vortex_up()
1671 if (vp->full_bus_master_rx) { /* Boomerang bus master. */ in vortex_up()
1672 vp->cur_rx = 0; in vortex_up()
1676 iowrite32(vp->rx_ring_dma, ioaddr + UpListPtr); in vortex_up()
1678 if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */ in vortex_up()
1679 vp->cur_tx = vp->dirty_tx = 0; in vortex_up()
1680 if (vp->drv_flags & IS_BOOMERANG) in vortex_up()
1684 vp->rx_ring[i].status = 0; in vortex_up()
1686 vp->tx_skbuff[i] = NULL; in vortex_up()
1689 /* Set receiver mode: presumably accept b-case and phys addr only. */ in vortex_up()
1698 vp->status_enable = SetStatusEnb | HostError|IntReq|StatsFull|TxComplete| in vortex_up()
1699 (vp->full_bus_master_tx ? DownComplete : TxAvailable) | in vortex_up()
1700 (vp->full_bus_master_rx ? UpComplete : RxComplete) | in vortex_up()
1701 (vp->bus_master ? DMADone : 0); in vortex_up()
1702 vp->intr_enable = SetIntrEnb | IntLatch | TxAvailable | in vortex_up()
1703 (vp->full_bus_master_rx ? 0 : RxComplete) | in vortex_up()
1705 | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete; in vortex_up()
1706 iowrite16(vp->status_enable, ioaddr + EL3_CMD); in vortex_up()
1710 iowrite16(vp->intr_enable, ioaddr + EL3_CMD); in vortex_up()
1711 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */ in vortex_up()
1712 iowrite32(0x8000, vp->cb_fn_base + 4); in vortex_up()
1727 /* Use the now-standard shared IRQ implementation. */ in vortex_open()
1728 if ((retval = request_irq(dev->irq, vortex_boomerang_interrupt, IRQF_SHARED, dev->name, dev))) { in vortex_open()
1729 pr_err("%s: Could not reserve IRQ %d\n", dev->name, dev->irq); in vortex_open()
1733 if (vp->full_bus_master_rx) { /* Boomerang bus master. */ in vortex_open()
1735 pr_debug("%s: Filling in the Rx ring.\n", dev->name); in vortex_open()
1738 vp->rx_ring[i].next = cpu_to_le32(vp->rx_ring_dma + sizeof(struct boom_rx_desc) * (i+1)); in vortex_open()
1739 vp->rx_ring[i].status = 0; /* Clear complete bit. */ in vortex_open()
1740 vp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ | LAST_FRAG); in vortex_open()
1744 vp->rx_skbuff[i] = skb; in vortex_open()
1749 dma = dma_map_single(vp->gendev, skb->data, in vortex_open()
1751 if (dma_mapping_error(vp->gendev, dma)) in vortex_open()
1753 vp->rx_ring[i].addr = cpu_to_le32(dma); in vortex_open()
1756 pr_emerg("%s: no memory for rx ring\n", dev->name); in vortex_open()
1757 retval = -ENOMEM; in vortex_open()
1761 vp->rx_ring[i-1].next = cpu_to_le32(vp->rx_ring_dma); in vortex_open()
1770 if (vp->rx_skbuff[i]) { in vortex_open()
1771 dev_kfree_skb(vp->rx_skbuff[i]); in vortex_open()
1772 vp->rx_skbuff[i] = NULL; in vortex_open()
1775 free_irq(dev->irq, dev); in vortex_open()
1778 pr_err("%s: vortex_open() fails: returning %d\n", dev->name, retval); in vortex_open()
1787 struct net_device *dev = vp->mii.dev; in vortex_timer()
1788 void __iomem *ioaddr = vp->ioaddr; in vortex_timer()
1795 dev->name, media_tbl[dev->if_port].name); in vortex_timer()
1796 pr_debug("dev->watchdog_timeo=%d\n", dev->watchdog_timeo); in vortex_timer()
1800 switch (dev->if_port) { in vortex_timer()
1807 dev->name, media_tbl[dev->if_port].name, media_status); in vortex_timer()
1812 dev->name, media_tbl[dev->if_port].name, media_status); in vortex_timer()
1825 dev->name, media_tbl[dev->if_port].name, media_status); in vortex_timer()
1829 if (dev->flags & IFF_SLAVE || !netif_carrier_ok(dev)) in vortex_timer()
1832 if (vp->medialock) in vortex_timer()
1838 spin_lock_irq(&vp->lock); in vortex_timer()
1841 dev->if_port = media_tbl[dev->if_port].next; in vortex_timer()
1842 } while ( ! (vp->available_media & media_tbl[dev->if_port].mask)); in vortex_timer()
1843 if (dev->if_port == XCVR_Default) { /* Go back to default. */ in vortex_timer()
1844 dev->if_port = vp->default_media; in vortex_timer()
1847 dev->name, media_tbl[dev->if_port].name); in vortex_timer()
1851 dev->name, media_tbl[dev->if_port].name); in vortex_timer()
1852 next_tick = media_tbl[dev->if_port].wait; in vortex_timer()
1856 media_tbl[dev->if_port].media_bits, in vortex_timer()
1860 config = BFINS(config, dev->if_port, 20, 4); in vortex_timer()
1863 iowrite16(dev->if_port == XCVR_10base2 ? StartCoax : StopCoax, in vortex_timer()
1869 spin_unlock_irq(&vp->lock); in vortex_timer()
1875 dev->name, media_tbl[dev->if_port].name); in vortex_timer()
1877 mod_timer(&vp->timer, RUN_AT(next_tick)); in vortex_timer()
1878 if (vp->deferred) in vortex_timer()
1885 void __iomem *ioaddr = vp->ioaddr; in vortex_tx_timeout()
1888 dev->name, ioread8(ioaddr + TxStatus), in vortex_tx_timeout()
1897 pr_err("%s: Transmitter encountered 16 collisions --" in vortex_tx_timeout()
1898 " network cable problem?\n", dev->name); in vortex_tx_timeout()
1900 pr_err("%s: Interrupt posted but not delivered --" in vortex_tx_timeout()
1901 " IRQ blocked by another device?\n", dev->name); in vortex_tx_timeout()
1903 vortex_boomerang_interrupt(dev->irq, dev); in vortex_tx_timeout()
1911 dev->stats.tx_errors++; in vortex_tx_timeout()
1912 if (vp->full_bus_master_tx) { in vortex_tx_timeout()
1913 pr_debug("%s: Resetting the Tx ring pointer.\n", dev->name); in vortex_tx_timeout()
1914 if (vp->cur_tx - vp->dirty_tx > 0 && ioread32(ioaddr + DownListPtr) == 0) in vortex_tx_timeout()
1915 iowrite32(vp->tx_ring_dma + (vp->dirty_tx % TX_RING_SIZE) * sizeof(struct boom_tx_desc), in vortex_tx_timeout()
1917 if (vp->cur_tx - vp->dirty_tx < TX_RING_SIZE) { in vortex_tx_timeout()
1921 if (vp->drv_flags & IS_BOOMERANG) in vortex_tx_timeout()
1925 dev->stats.tx_dropped++; in vortex_tx_timeout()
1942 void __iomem *ioaddr = vp->ioaddr; in vortex_error()
1947 pr_err("%s: vortex_error(), status=0x%x\n", dev->name, status); in vortex_error()
1952 /* Presumably a tx-timeout. We must merely re-enable. */ in vortex_error()
1956 dev->name, tx_status); in vortex_error()
1963 if (tx_status & 0x14) dev->stats.tx_fifo_errors++; in vortex_error()
1964 if (tx_status & 0x38) dev->stats.tx_aborted_errors++; in vortex_error()
1965 if (tx_status & 0x08) vp->xstats.tx_max_collisions++; in vortex_error()
1969 } else if ((tx_status & 0x08) && (vp->drv_flags & MAX_COLLISION_RESET)) { /* maxCollisions */ in vortex_error()
1972 } else { /* Merely re-enable the transmitter. */ in vortex_error()
1983 pr_debug("%s: Updating stats.\n", dev->name); in vortex_error()
1990 dev->name); in vortex_error()
1994 vp->intr_enable &= ~StatsFull; in vortex_error()
1999 iowrite16(vp->status_enable, ioaddr + EL3_CMD); in vortex_error()
2000 iowrite16(vp->intr_enable, ioaddr + EL3_CMD); in vortex_error()
2006 dev->name, fifo_diag); in vortex_error()
2008 if (vp->full_bus_master_tx) { in vortex_error()
2013 pr_err("%s: PCI bus error, bus status %8.8x\n", dev->name, bus_status); in vortex_error()
2029 iowrite16(RxEnable, ioaddr + EL3_CMD); /* Re-enable the receiver. */ in vortex_error()
2037 if (!vp->full_bus_master_tx) in vortex_error()
2046 void __iomem *ioaddr = vp->ioaddr; in vortex_start_xmit()
2047 int skblen = skb->len; in vortex_start_xmit()
2050 iowrite32(skb->len, ioaddr + TX_FIFO); in vortex_start_xmit()
2051 if (vp->bus_master) { in vortex_start_xmit()
2052 /* Set the bus-master controller to transfer the packet. */ in vortex_start_xmit()
2053 int len = (skb->len + 3) & ~3; in vortex_start_xmit()
2054 vp->tx_skb_dma = dma_map_single(vp->gendev, skb->data, len, in vortex_start_xmit()
2056 if (dma_mapping_error(vp->gendev, vp->tx_skb_dma)) { in vortex_start_xmit()
2058 dev->stats.tx_dropped++; in vortex_start_xmit()
2062 spin_lock_irq(&vp->window_lock); in vortex_start_xmit()
2064 iowrite32(vp->tx_skb_dma, ioaddr + Wn7_MasterAddr); in vortex_start_xmit()
2066 spin_unlock_irq(&vp->window_lock); in vortex_start_xmit()
2067 vp->tx_skb = skb; in vortex_start_xmit()
2074 iowrite32_rep(ioaddr + TX_FIFO, skb->data, (skb->len + 3) >> 2); in vortex_start_xmit()
2079 /* Interrupt us when the FIFO has room for max-sized packet. */ in vortex_start_xmit()
2092 while (--i > 0 && (tx_status = ioread8(ioaddr + TxStatus)) > 0) { in vortex_start_xmit()
2093 if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */ in vortex_start_xmit()
2096 dev->name, tx_status); in vortex_start_xmit()
2097 if (tx_status & 0x04) dev->stats.tx_fifo_errors++; in vortex_start_xmit()
2098 if (tx_status & 0x38) dev->stats.tx_aborted_errors++; in vortex_start_xmit()
2114 void __iomem *ioaddr = vp->ioaddr; in boomerang_start_xmit()
2116 int entry = vp->cur_tx % TX_RING_SIZE; in boomerang_start_xmit()
2117 int skblen = skb->len; in boomerang_start_xmit()
2118 struct boom_tx_desc *prev_entry = &vp->tx_ring[(vp->cur_tx-1) % TX_RING_SIZE]; in boomerang_start_xmit()
2125 dev->name, vp->cur_tx); in boomerang_start_xmit()
2134 if (vp->handling_irq) in boomerang_start_xmit()
2137 if (vp->cur_tx - vp->dirty_tx >= TX_RING_SIZE) { in boomerang_start_xmit()
2140 dev->name); in boomerang_start_xmit()
2145 vp->tx_skbuff[entry] = skb; in boomerang_start_xmit()
2147 vp->tx_ring[entry].next = 0; in boomerang_start_xmit()
2149 if (skb->ip_summed != CHECKSUM_PARTIAL) in boomerang_start_xmit()
2150 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded); in boomerang_start_xmit()
2152 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded | AddTCPChksum | AddUDPChksum); in boomerang_start_xmit()
2154 if (!skb_shinfo(skb)->nr_frags) { in boomerang_start_xmit()
2155 dma_addr = dma_map_single(vp->gendev, skb->data, skb->len, in boomerang_start_xmit()
2157 if (dma_mapping_error(vp->gendev, dma_addr)) in boomerang_start_xmit()
2160 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(dma_addr); in boomerang_start_xmit()
2161 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len | LAST_FRAG); in boomerang_start_xmit()
2165 dma_addr = dma_map_single(vp->gendev, skb->data, in boomerang_start_xmit()
2167 if (dma_mapping_error(vp->gendev, dma_addr)) in boomerang_start_xmit()
2170 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(dma_addr); in boomerang_start_xmit()
2171 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb_headlen(skb)); in boomerang_start_xmit()
2173 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { in boomerang_start_xmit()
2174 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in boomerang_start_xmit()
2176 dma_addr = skb_frag_dma_map(vp->gendev, frag, in boomerang_start_xmit()
2180 if (dma_mapping_error(vp->gendev, dma_addr)) { in boomerang_start_xmit()
2181 for(i = i-1; i >= 0; i--) in boomerang_start_xmit()
2182 dma_unmap_page(vp->gendev, in boomerang_start_xmit()
2183 le32_to_cpu(vp->tx_ring[entry].frag[i+1].addr), in boomerang_start_xmit()
2184 le32_to_cpu(vp->tx_ring[entry].frag[i+1].length), in boomerang_start_xmit()
2187 dma_unmap_single(vp->gendev, in boomerang_start_xmit()
2188 le32_to_cpu(vp->tx_ring[entry].frag[0].addr), in boomerang_start_xmit()
2189 le32_to_cpu(vp->tx_ring[entry].frag[0].length), in boomerang_start_xmit()
2195 vp->tx_ring[entry].frag[i+1].addr = in boomerang_start_xmit()
2198 if (i == skb_shinfo(skb)->nr_frags-1) in boomerang_start_xmit()
2199 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(skb_frag_size(frag)|LAST_FRAG); in boomerang_start_xmit()
2201 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(skb_frag_size(frag)); in boomerang_start_xmit()
2205 dma_addr = dma_map_single(vp->gendev, skb->data, skb->len, DMA_TO_DEVICE); in boomerang_start_xmit()
2206 if (dma_mapping_error(vp->gendev, dma_addr)) in boomerang_start_xmit()
2208 vp->tx_ring[entry].addr = cpu_to_le32(dma_addr); in boomerang_start_xmit()
2209 vp->tx_ring[entry].length = cpu_to_le32(skb->len | LAST_FRAG); in boomerang_start_xmit()
2210 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded); in boomerang_start_xmit()
2213 spin_lock_irqsave(&vp->lock, flags); in boomerang_start_xmit()
2216 prev_entry->next = cpu_to_le32(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc)); in boomerang_start_xmit()
2218 iowrite32(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc), ioaddr + DownListPtr); in boomerang_start_xmit()
2219 vp->queued_packet++; in boomerang_start_xmit()
2222 vp->cur_tx++; in boomerang_start_xmit()
2225 if (vp->cur_tx - vp->dirty_tx > TX_RING_SIZE - 1) { in boomerang_start_xmit()
2232 prev_entry->status &= cpu_to_le32(~TxIntrUploaded); in boomerang_start_xmit()
2237 spin_unlock_irqrestore(&vp->lock, flags); in boomerang_start_xmit()
2241 dev_err(vp->gendev, "Error mapping dma buffer\n"); in boomerang_start_xmit()
2263 ioaddr = vp->ioaddr; in _vortex_interrupt()
2275 status |= vp->deferred; in _vortex_interrupt()
2276 vp->deferred = 0; in _vortex_interrupt()
2284 dev->name, status, ioread8(ioaddr + Timer)); in _vortex_interrupt()
2286 spin_lock(&vp->window_lock); in _vortex_interrupt()
2292 dev->name, status); in _vortex_interrupt()
2299 /* There's room in the FIFO for a full-sized packet. */ in _vortex_interrupt()
2307 dma_unmap_single(vp->gendev, vp->tx_skb_dma, (vp->tx_skb->len + 3) & ~3, DMA_TO_DEVICE); in _vortex_interrupt()
2309 bytes_compl += vp->tx_skb->len; in _vortex_interrupt()
2310 dev_consume_skb_irq(vp->tx_skb); /* Release the transferred buffer */ in _vortex_interrupt()
2318 } else { /* Interrupt when FIFO has room for max-sized packet. */ in _vortex_interrupt()
2330 spin_unlock(&vp->window_lock); in _vortex_interrupt()
2332 spin_lock(&vp->window_lock); in _vortex_interrupt()
2336 if (--work_done < 0) { in _vortex_interrupt()
2338 dev->name, status); in _vortex_interrupt()
2341 vp->deferred |= status; in _vortex_interrupt()
2342 iowrite16(SetStatusEnb | (~vp->deferred & vp->status_enable), in _vortex_interrupt()
2344 iowrite16(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD); in _vortex_interrupt()
2347 mod_timer(&vp->timer, jiffies + 1*HZ); in _vortex_interrupt()
2355 spin_unlock(&vp->window_lock); in _vortex_interrupt()
2359 dev->name, status); in _vortex_interrupt()
2379 ioaddr = vp->ioaddr; in _boomerang_interrupt()
2381 vp->handling_irq = 1; in _boomerang_interrupt()
2399 status |= vp->deferred; in _boomerang_interrupt()
2400 vp->deferred = 0; in _boomerang_interrupt()
2405 dev->name, status, ioread8(ioaddr + Timer)); in _boomerang_interrupt()
2409 dev->name, status); in _boomerang_interrupt()
2413 pr_debug("boomerang_interrupt->boomerang_rx\n"); in _boomerang_interrupt()
2418 unsigned int dirty_tx = vp->dirty_tx; in _boomerang_interrupt()
2421 while (vp->cur_tx - dirty_tx > 0) { in _boomerang_interrupt()
2423 #if 1 /* AKPM: the latter is faster, but cyclone-only */ in _boomerang_interrupt()
2425 vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc)) in _boomerang_interrupt()
2428 if ((vp->tx_ring[entry].status & DN_COMPLETE) == 0) in _boomerang_interrupt()
2432 if (vp->tx_skbuff[entry]) { in _boomerang_interrupt()
2433 struct sk_buff *skb = vp->tx_skbuff[entry]; in _boomerang_interrupt()
2436 dma_unmap_single(vp->gendev, in _boomerang_interrupt()
2437 le32_to_cpu(vp->tx_ring[entry].frag[0].addr), in _boomerang_interrupt()
2438 le32_to_cpu(vp->tx_ring[entry].frag[0].length)&0xFFF, in _boomerang_interrupt()
2441 for (i=1; i<=skb_shinfo(skb)->nr_frags; i++) in _boomerang_interrupt()
2442 dma_unmap_page(vp->gendev, in _boomerang_interrupt()
2443 le32_to_cpu(vp->tx_ring[entry].frag[i].addr), in _boomerang_interrupt()
2444 le32_to_cpu(vp->tx_ring[entry].frag[i].length)&0xFFF, in _boomerang_interrupt()
2447 dma_unmap_single(vp->gendev, in _boomerang_interrupt()
2448 le32_to_cpu(vp->tx_ring[entry].addr), skb->len, DMA_TO_DEVICE); in _boomerang_interrupt()
2451 bytes_compl += skb->len; in _boomerang_interrupt()
2453 vp->tx_skbuff[entry] = NULL; in _boomerang_interrupt()
2457 /* dev->stats.tx_packets++; Counted below. */ in _boomerang_interrupt()
2460 vp->dirty_tx = dirty_tx; in _boomerang_interrupt()
2461 if (vp->cur_tx - dirty_tx <= TX_RING_SIZE - 1) { in _boomerang_interrupt()
2472 if (--work_done < 0) { in _boomerang_interrupt()
2474 dev->name, status); in _boomerang_interrupt()
2477 vp->deferred |= status; in _boomerang_interrupt()
2478 iowrite16(SetStatusEnb | (~vp->deferred & vp->status_enable), in _boomerang_interrupt()
2480 iowrite16(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD); in _boomerang_interrupt()
2483 mod_timer(&vp->timer, jiffies + 1*HZ); in _boomerang_interrupt()
2488 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */ in _boomerang_interrupt()
2489 iowrite32(0x8000, vp->cb_fn_base + 4); in _boomerang_interrupt()
2496 dev->name, status); in _boomerang_interrupt()
2498 vp->handling_irq = 0; in _boomerang_interrupt()
2510 spin_lock_irqsave(&vp->lock, flags); in vortex_boomerang_interrupt()
2512 if (vp->full_bus_master_rx) in vortex_boomerang_interrupt()
2513 ret = _boomerang_interrupt(dev->irq, dev); in vortex_boomerang_interrupt()
2515 ret = _vortex_interrupt(dev->irq, dev); in vortex_boomerang_interrupt()
2517 spin_unlock_irqrestore(&vp->lock, flags); in vortex_boomerang_interrupt()
2525 void __iomem *ioaddr = vp->ioaddr; in vortex_rx()
2537 dev->stats.rx_errors++; in vortex_rx()
2538 if (rx_error & 0x01) dev->stats.rx_over_errors++; in vortex_rx()
2539 if (rx_error & 0x02) dev->stats.rx_length_errors++; in vortex_rx()
2540 if (rx_error & 0x04) dev->stats.rx_frame_errors++; in vortex_rx()
2541 if (rx_error & 0x08) dev->stats.rx_crc_errors++; in vortex_rx()
2542 if (rx_error & 0x10) dev->stats.rx_length_errors++; in vortex_rx()
2555 if (vp->bus_master && in vortex_rx()
2557 dma_addr_t dma = dma_map_single(vp->gendev, skb_put(skb, pkt_len), in vortex_rx()
2560 iowrite16((skb->len + 3) & ~3, ioaddr + Wn7_MasterLen); in vortex_rx()
2564 dma_unmap_single(vp->gendev, dma, pkt_len, DMA_FROM_DEVICE); in vortex_rx()
2571 skb->protocol = eth_type_trans(skb, dev); in vortex_rx()
2573 dev->stats.rx_packets++; in vortex_rx()
2575 for (i = 200; i >= 0; i--) in vortex_rx()
2581 dev->name, pkt_len); in vortex_rx()
2582 dev->stats.rx_dropped++; in vortex_rx()
2594 int entry = vp->cur_rx % RX_RING_SIZE; in boomerang_rx()
2595 void __iomem *ioaddr = vp->ioaddr; in boomerang_rx()
2602 while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){ in boomerang_rx()
2603 if (--rx_work_limit < 0) in boomerang_rx()
2609 dev->stats.rx_errors++; in boomerang_rx()
2610 if (rx_error & 0x01) dev->stats.rx_over_errors++; in boomerang_rx()
2611 if (rx_error & 0x02) dev->stats.rx_length_errors++; in boomerang_rx()
2612 if (rx_error & 0x04) dev->stats.rx_frame_errors++; in boomerang_rx()
2613 if (rx_error & 0x08) dev->stats.rx_crc_errors++; in boomerang_rx()
2614 if (rx_error & 0x10) dev->stats.rx_length_errors++; in boomerang_rx()
2620 dma_addr_t dma = le32_to_cpu(vp->rx_ring[entry].addr); in boomerang_rx()
2631 dma_sync_single_for_cpu(vp->gendev, dma, PKT_BUF_SZ, DMA_FROM_DEVICE); in boomerang_rx()
2633 skb_put_data(skb, vp->rx_skbuff[entry]->data, in boomerang_rx()
2635 dma_sync_single_for_device(vp->gendev, dma, PKT_BUF_SZ, DMA_FROM_DEVICE); in boomerang_rx()
2636 vp->rx_copy++; in boomerang_rx()
2638 /* Pre-allocate the replacement skb. If it or its in boomerang_rx()
2644 dev->stats.rx_dropped++; in boomerang_rx()
2647 newdma = dma_map_single(vp->gendev, newskb->data, in boomerang_rx()
2649 if (dma_mapping_error(vp->gendev, newdma)) { in boomerang_rx()
2650 dev->stats.rx_dropped++; in boomerang_rx()
2656 skb = vp->rx_skbuff[entry]; in boomerang_rx()
2657 vp->rx_skbuff[entry] = newskb; in boomerang_rx()
2658 vp->rx_ring[entry].addr = cpu_to_le32(newdma); in boomerang_rx()
2660 dma_unmap_single(vp->gendev, dma, PKT_BUF_SZ, DMA_FROM_DEVICE); in boomerang_rx()
2661 vp->rx_nocopy++; in boomerang_rx()
2663 skb->protocol = eth_type_trans(skb, dev); in boomerang_rx()
2669 skb->ip_summed = CHECKSUM_UNNECESSARY; in boomerang_rx()
2670 vp->rx_csumhits++; in boomerang_rx()
2674 dev->stats.rx_packets++; in boomerang_rx()
2678 vp->rx_ring[entry].status = 0; /* Clear complete bit. */ in boomerang_rx()
2680 entry = (++vp->cur_rx) % RX_RING_SIZE; in boomerang_rx()
2689 void __iomem *ioaddr = vp->ioaddr; in vortex_down()
2694 del_timer_sync(&vp->timer); in vortex_down()
2696 /* Turn off statistics ASAP. We update dev->stats below. */ in vortex_down()
2706 if (dev->if_port == XCVR_10base2) in vortex_down()
2713 if (vp->full_bus_master_rx) in vortex_down()
2715 if (vp->full_bus_master_tx) in vortex_down()
2719 vp->pm_state_valid = 1; in vortex_down()
2729 void __iomem *ioaddr = vp->ioaddr; in vortex_close()
2737 dev->name, ioread16(ioaddr + EL3_STATUS), ioread8(ioaddr + TxStatus)); in vortex_close()
2739 " tx_queued %d Rx pre-checksummed %d.\n", in vortex_close()
2740 dev->name, vp->rx_nocopy, vp->rx_copy, vp->queued_packet, vp->rx_csumhits); in vortex_close()
2744 if (vp->rx_csumhits && in vortex_close()
2745 (vp->drv_flags & HAS_HWCKSM) == 0 && in vortex_close()
2746 (vp->card_idx >= MAX_UNITS || hw_checksums[vp->card_idx] == -1)) { in vortex_close()
2748 dev->name); in vortex_close()
2752 free_irq(dev->irq, dev); in vortex_close()
2754 if (vp->full_bus_master_rx) { /* Free Boomerang bus master Rx buffers. */ in vortex_close()
2756 if (vp->rx_skbuff[i]) { in vortex_close()
2757 dma_unmap_single(vp->gendev, le32_to_cpu(vp->rx_ring[i].addr), in vortex_close()
2759 dev_kfree_skb(vp->rx_skbuff[i]); in vortex_close()
2760 vp->rx_skbuff[i] = NULL; in vortex_close()
2763 if (vp->full_bus_master_tx) { /* Free Boomerang bus master Tx buffers. */ in vortex_close()
2765 if (vp->tx_skbuff[i]) { in vortex_close()
2766 struct sk_buff *skb = vp->tx_skbuff[i]; in vortex_close()
2770 for (k=0; k<=skb_shinfo(skb)->nr_frags; k++) in vortex_close()
2771 dma_unmap_single(vp->gendev, in vortex_close()
2772 le32_to_cpu(vp->tx_ring[i].frag[k].addr), in vortex_close()
2773 le32_to_cpu(vp->tx_ring[i].frag[k].length)&0xFFF, in vortex_close()
2776 dma_unmap_single(vp->gendev, le32_to_cpu(vp->tx_ring[i].addr), skb->len, DMA_TO_DEVICE); in vortex_close()
2779 vp->tx_skbuff[i] = NULL; in vortex_close()
2792 void __iomem *ioaddr = vp->ioaddr; in dump_tx_ring()
2794 if (vp->full_bus_master_tx) { in dump_tx_ring()
2798 pr_err(" Flags; bus-master %d, dirty %d(%d) current %d(%d)\n", in dump_tx_ring()
2799 vp->full_bus_master_tx, in dump_tx_ring()
2800 vp->dirty_tx, vp->dirty_tx % TX_RING_SIZE, in dump_tx_ring()
2801 vp->cur_tx, vp->cur_tx % TX_RING_SIZE); in dump_tx_ring()
2804 &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]); in dump_tx_ring()
2810 length = le32_to_cpu(vp->tx_ring[i].frag[0].length); in dump_tx_ring()
2812 length = le32_to_cpu(vp->tx_ring[i].length); in dump_tx_ring()
2815 i, &vp->tx_ring[i], length, in dump_tx_ring()
2816 le32_to_cpu(vp->tx_ring[i].status)); in dump_tx_ring()
2827 void __iomem *ioaddr = vp->ioaddr; in vortex_get_stats()
2831 spin_lock_irqsave (&vp->lock, flags); in vortex_get_stats()
2833 spin_unlock_irqrestore (&vp->lock, flags); in vortex_get_stats()
2835 return &dev->stats; in vortex_get_stats()
2851 dev->stats.tx_carrier_errors += window_read8(vp, 6, 0); in update_stats()
2852 dev->stats.tx_heartbeat_errors += window_read8(vp, 6, 1); in update_stats()
2853 dev->stats.tx_window_errors += window_read8(vp, 6, 4); in update_stats()
2854 dev->stats.rx_fifo_errors += window_read8(vp, 6, 5); in update_stats()
2855 dev->stats.tx_packets += window_read8(vp, 6, 6); in update_stats()
2856 dev->stats.tx_packets += (window_read8(vp, 6, 9) & in update_stats()
2862 dev->stats.rx_bytes += window_read16(vp, 6, 10); in update_stats()
2863 dev->stats.tx_bytes += window_read16(vp, 6, 12); in update_stats()
2865 vp->xstats.tx_multiple_collisions += window_read8(vp, 6, 2); in update_stats()
2866 vp->xstats.tx_single_collisions += window_read8(vp, 6, 3); in update_stats()
2867 vp->xstats.tx_deferred += window_read8(vp, 6, 8); in update_stats()
2868 vp->xstats.rx_bad_ssd += window_read8(vp, 4, 12); in update_stats()
2870 dev->stats.collisions = vp->xstats.tx_multiple_collisions in update_stats()
2871 + vp->xstats.tx_single_collisions in update_stats()
2872 + vp->xstats.tx_max_collisions; in update_stats()
2876 dev->stats.rx_bytes += (up & 0x0f) << 16; in update_stats()
2877 dev->stats.tx_bytes += (up & 0xf0) << 12; in update_stats()
2885 return mii_nway_restart(&vp->mii); in vortex_nway_reset()
2893 mii_ethtool_get_link_ksettings(&vp->mii, cmd); in vortex_get_link_ksettings()
2903 return mii_ethtool_set_link_ksettings(&vp->mii, cmd); in vortex_set_link_ksettings()
2922 return -EOPNOTSUPP; in vortex_get_sset_count()
2930 void __iomem *ioaddr = vp->ioaddr; in vortex_get_ethtool_stats()
2933 spin_lock_irqsave(&vp->lock, flags); in vortex_get_ethtool_stats()
2935 spin_unlock_irqrestore(&vp->lock, flags); in vortex_get_ethtool_stats()
2937 data[0] = vp->xstats.tx_deferred; in vortex_get_ethtool_stats()
2938 data[1] = vp->xstats.tx_max_collisions; in vortex_get_ethtool_stats()
2939 data[2] = vp->xstats.tx_multiple_collisions; in vortex_get_ethtool_stats()
2940 data[3] = vp->xstats.tx_single_collisions; in vortex_get_ethtool_stats()
2941 data[4] = vp->xstats.rx_bad_ssd; in vortex_get_ethtool_stats()
2962 strscpy(info->driver, DRV_NAME, sizeof(info->driver)); in vortex_get_drvinfo()
2964 strscpy(info->bus_info, pci_name(VORTEX_PCI(vp)), in vortex_get_drvinfo()
2965 sizeof(info->bus_info)); in vortex_get_drvinfo()
2968 strscpy(info->bus_info, dev_name(vp->gendev), in vortex_get_drvinfo()
2969 sizeof(info->bus_info)); in vortex_get_drvinfo()
2971 snprintf(info->bus_info, sizeof(info->bus_info), in vortex_get_drvinfo()
2972 "EISA 0x%lx %d", dev->base_addr, dev->irq); in vortex_get_drvinfo()
2983 wol->supported = WAKE_MAGIC; in vortex_get_wol()
2985 wol->wolopts = 0; in vortex_get_wol()
2986 if (vp->enable_wol) in vortex_get_wol()
2987 wol->wolopts |= WAKE_MAGIC; in vortex_get_wol()
2995 return -EOPNOTSUPP; in vortex_set_wol()
2997 if (wol->wolopts & ~WAKE_MAGIC) in vortex_set_wol()
2998 return -EINVAL; in vortex_set_wol()
3000 if (wol->wolopts & WAKE_MAGIC) in vortex_set_wol()
3001 vp->enable_wol = 1; in vortex_set_wol()
3003 vp->enable_wol = 0; in vortex_set_wol()
3036 state = VORTEX_PCI(vp)->current_state; in vortex_ioctl()
3042 err = generic_mii_ioctl(&vp->mii, if_mii(rq), cmd, NULL); in vortex_ioctl()
3051 /* Pre-Cyclone chips have no documented multicast filter, so the only
3057 void __iomem *ioaddr = vp->ioaddr; in set_rx_mode()
3060 if (dev->flags & IFF_PROMISC) { in set_rx_mode()
3062 pr_notice("%s: Setting promiscuous mode.\n", dev->name); in set_rx_mode()
3064 } else if (!netdev_mc_empty(dev) || dev->flags & IFF_ALLMULTI) { in set_rx_mode()
3085 if ((vp->drv_flags&IS_CYCLONE) || (vp->drv_flags&IS_TORNADO)) { in set_8021q_mode()
3089 int max_pkt_size = dev->mtu+14; /* MTU+Ethernet header */ in set_8021q_mode()
3101 vp->large_frames = dev->mtu > 1500 || enable; in set_8021q_mode()
3104 if (vp->large_frames) in set_8021q_mode()
3121 Read and write the MII registers using software-generated serial
3126 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
3145 while (-- bits >= 0) { in mdio_sync()
3161 spin_lock_bh(&vp->mii_lock); in mdio_read()
3167 for (i = 14; i >= 0; i--) { in mdio_read()
3175 /* Read the two transition, 16 data, and wire-idle bits. */ in mdio_read()
3176 for (i = 19; i > 0; i--) { in mdio_read()
3187 spin_unlock_bh(&vp->mii_lock); in mdio_read()
3198 spin_lock_bh(&vp->mii_lock); in mdio_write()
3204 for (i = 31; i >= 0; i--) { in mdio_write()
3213 for (i = 1; i >= 0; i--) { in mdio_write()
3221 spin_unlock_bh(&vp->mii_lock); in mdio_write()
3225 /* Set Wake-On-LAN mode and put the board into D3 (power-down) state. */
3229 void __iomem *ioaddr = vp->ioaddr; in acpi_set_WOL()
3231 device_set_wakeup_enable(vp->gendev, vp->enable_wol); in acpi_set_WOL()
3233 if (vp->enable_wol) { in acpi_set_WOL()
3243 vp->enable_wol = 0; in acpi_set_WOL()
3247 if (VORTEX_PCI(vp)->current_state < PCI_D3hot) in acpi_set_WOL()
3268 if (vp->cb_fn_base) in vortex_remove_one()
3269 pci_iounmap(pdev, vp->cb_fn_base); in vortex_remove_one()
3274 if (vp->pm_state_valid) in vortex_remove_one()
3279 iowrite16(TotalReset | ((vp->drv_flags & EEPROM_RESET) ? 0x04 : 0x14), in vortex_remove_one()
3280 vp->ioaddr + EL3_CMD); in vortex_remove_one()
3282 pci_iounmap(pdev, vp->ioaddr); in vortex_remove_one()
3284 dma_free_coherent(&pdev->dev, in vortex_remove_one()
3287 vp->rx_ring, vp->rx_ring_dma); in vortex_remove_one()
3320 return (vortex_have_pci + vortex_have_eisa) ? 0 : -ENODEV; in vortex_init()
3334 ioaddr = ioport_map(compaq_net_device->base_addr, in vortex_eisa_cleanup()
3339 release_region(compaq_net_device->base_addr, in vortex_eisa_cleanup()