1 // SPDX-License-Identifier: GPL-2.0
2 /* Realtek SMI subdriver for the Realtek RTL8366RB ethernet switch
9  * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
25 #include "realtek.h"
26 #include "realtek-smi.h"
27 #include "realtek-mdio.h"
50 /* Switch per-port learning disablement register */
163  * VID such as untagged or priority-tagged frames for respective
166  * a C-tag with VID != 0 for respective port.
382  * struct rtl8366rb - RTL8366RB-specific data
383  * @max_mtu: per-port max MTU setting
385  * @leds: per-port and per-ledgroup led info
440 		mib->offset;  in rtl8366rb_get_mib_counter()
445 	ret = regmap_write(priv->map, addr, 0); /* Write whatever */  in rtl8366rb_get_mib_counter()
450 	ret = regmap_read(priv->map, RTL8366RB_MIB_CTRL_REG, &val);  in rtl8366rb_get_mib_counter()
452 		return -EIO;  in rtl8366rb_get_mib_counter()
455 		return -EBUSY;  in rtl8366rb_get_mib_counter()
458 		return -EIO;  in rtl8366rb_get_mib_counter()
462 	for (i = mib->length; i > 0; i--) {  in rtl8366rb_get_mib_counter()
463 		ret = regmap_read(priv->map, addr + (i - 1), &val);  in rtl8366rb_get_mib_counter()
491 	ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_MASK_REG,  in rtl8366rb_mask_irq()
494 		dev_err(priv->dev, "could not mask IRQ\n");  in rtl8366rb_mask_irq()
502 	ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_MASK_REG,  in rtl8366rb_unmask_irq()
506 		dev_err(priv->dev, "could not unmask IRQ\n");  in rtl8366rb_unmask_irq()
516 	ret = regmap_read(priv->map, RTL8366RB_INTERRUPT_STATUS_REG,  in rtl8366rb_irq()
519 		dev_err(priv->dev, "can't read interrupt status\n");  in rtl8366rb_irq()
534 			line -= 5;  in rtl8366rb_irq()
535 		child_irq = irq_find_mapping(priv->irqdomain, line);  in rtl8366rb_irq()
550 	irq_set_chip_data(irq, domain->host_data);  in rtl8366rb_irq_map()
580 	intc = of_get_child_by_name(priv->dev->of_node, "interrupt-controller");  in rtl8366rb_setup_cascaded_irq()
582 		dev_err(priv->dev, "missing child interrupt-controller node\n");  in rtl8366rb_setup_cascaded_irq()
583 		return -EINVAL;  in rtl8366rb_setup_cascaded_irq()
588 		dev_err(priv->dev, "failed to get parent IRQ\n");  in rtl8366rb_setup_cascaded_irq()
589 		ret = irq ? irq : -EINVAL;  in rtl8366rb_setup_cascaded_irq()
594 	ret = regmap_read(priv->map, RTL8366RB_INTERRUPT_STATUS_REG,  in rtl8366rb_setup_cascaded_irq()
597 		dev_err(priv->dev, "can't read interrupt status\n");  in rtl8366rb_setup_cascaded_irq()
606 		dev_info(priv->dev, "active high/rising IRQ\n");  in rtl8366rb_setup_cascaded_irq()
611 		dev_info(priv->dev, "active low/falling IRQ\n");  in rtl8366rb_setup_cascaded_irq()
615 	ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_CONTROL_REG,  in rtl8366rb_setup_cascaded_irq()
619 		dev_err(priv->dev, "could not configure IRQ polarity\n");  in rtl8366rb_setup_cascaded_irq()
623 	ret = devm_request_threaded_irq(priv->dev, irq, NULL,  in rtl8366rb_setup_cascaded_irq()
627 		dev_err(priv->dev, "unable to request irq: %d\n", ret);  in rtl8366rb_setup_cascaded_irq()
630 	priv->irqdomain = irq_domain_add_linear(intc,  in rtl8366rb_setup_cascaded_irq()
634 	if (!priv->irqdomain) {  in rtl8366rb_setup_cascaded_irq()
635 		dev_err(priv->dev, "failed to create IRQ domain\n");  in rtl8366rb_setup_cascaded_irq()
636 		ret = -EINVAL;  in rtl8366rb_setup_cascaded_irq()
639 	for (i = 0; i < priv->num_ports; i++)  in rtl8366rb_setup_cascaded_irq()
640 		irq_set_parent(irq_create_mapping(priv->irqdomain, i), irq);  in rtl8366rb_setup_cascaded_irq()
655 	dev_info(priv->dev, "set MAC: %02X:%02X:%02X:%02X:%02X:%02X\n",  in rtl8366rb_set_addr()
658 	ret = regmap_write(priv->map, RTL8366RB_SMAR0, val);  in rtl8366rb_set_addr()
662 	ret = regmap_write(priv->map, RTL8366RB_SMAR1, val);  in rtl8366rb_set_addr()
666 	ret = regmap_write(priv->map, RTL8366RB_SMAR2, val);  in rtl8366rb_set_addr()
714 /* This v1 init sequence is from Belkin F5D8235 U-Boot release */
729 /* This v2 init sequence is from Belkin F5D8235 U-Boot release */
765 /* Belkin F5D8235 v1, "belkin,f5d8235-v1" */
807 			ret = regmap_read(priv->map,  in rtl8366rb_jam_table()
813 				ret = regmap_write(priv->map,  in rtl8366rb_jam_table()
821 			dev_dbg(priv->dev, "jam %04x into register %04x\n",  in rtl8366rb_jam_table()
824 		ret = regmap_write(priv->map,  in rtl8366rb_jam_table()
842 	ret = regmap_update_bits(priv->map,  in rb8366rb_set_ledgroup_mode()
870 	struct realtek_priv *priv = led->priv;  in rb8366rb_get_port_led()
871 	u8 led_group = led->led_group;  in rb8366rb_get_port_led()
872 	u8 port_num = led->port_num;  in rb8366rb_get_port_led()
876 	ret = regmap_read(priv->map, RTL8366RB_LED_X_X_CTRL_REG(led_group),  in rb8366rb_get_port_led()
879 		dev_err(priv->dev, "error reading LED on port %d group %d\n",  in rb8366rb_get_port_led()
889 	struct realtek_priv *priv = led->priv;  in rb8366rb_set_port_led()
890 	u8 led_group = led->led_group;  in rb8366rb_set_port_led()
891 	u8 port_num = led->port_num;  in rb8366rb_set_port_led()
894 	ret = regmap_update_bits(priv->map,  in rb8366rb_set_port_led()
900 		dev_err(priv->dev, "error updating LED on port %d group %d\n",  in rb8366rb_set_port_led()
910 		dev_err(priv->dev, "error updating LED GROUP group %d\n",  in rb8366rb_set_port_led()
931 	struct rtl8366rb *rb = priv->chip_data;  in rtl8366rb_setup_led()
943 		dev_warn(priv->dev, "Invalid LED reg %d defined for port %d",  in rtl8366rb_setup_led()
944 			 led_group, dp->index);  in rtl8366rb_setup_led()
945 		return -EINVAL;  in rtl8366rb_setup_led()
948 	led = &rb->leds[dp->index][led_group];  in rtl8366rb_setup_led()
949 	led->port_num = dp->index;  in rtl8366rb_setup_led()
950 	led->led_group = led_group;  in rtl8366rb_setup_led()
951 	led->priv = priv;  in rtl8366rb_setup_led()
956 		led->cdev.brightness = 1;  in rtl8366rb_setup_led()
960 		led->cdev.brightness =  in rtl8366rb_setup_led()
965 		led->cdev.brightness = 0;  in rtl8366rb_setup_led()
969 	led->cdev.max_brightness = 1;  in rtl8366rb_setup_led()
970 	led->cdev.brightness_set_blocking =  in rtl8366rb_setup_led()
975 	init_data.devicename = kasprintf(GFP_KERNEL, "Realtek-%d:0%d:%d",  in rtl8366rb_setup_led()
976 					 dp->ds->index, dp->index, led_group);  in rtl8366rb_setup_led()
978 		return -ENOMEM;  in rtl8366rb_setup_led()
980 	ret = devm_led_classdev_register_ext(priv->dev, &led->cdev, &init_data);  in rtl8366rb_setup_led()
982 		dev_warn(priv->dev, "Failed to init LED %d for port %d",  in rtl8366rb_setup_led()
983 			 led_group, dp->index);  in rtl8366rb_setup_led()
995 	regmap_update_bits(priv->map,  in rtl8366rb_setup_all_leds_off()
1012 	struct dsa_switch *ds = &priv->ds;  in rtl8366rb_setup_leds()
1018 		if (!dp->dn)  in rtl8366rb_setup_leds()
1021 		leds_np = of_get_child_by_name(dp->dn, "leds");  in rtl8366rb_setup_leds()
1023 			dev_dbg(priv->dev, "No leds defined for port %d",  in rtl8366rb_setup_leds()
1024 				dp->index);  in rtl8366rb_setup_leds()
1044 	struct realtek_priv *priv = ds->priv;  in rtl8366rb_setup()
1053 	rb = priv->chip_data;  in rtl8366rb_setup()
1055 	ret = regmap_read(priv->map, RTL8366RB_CHIP_ID_REG, &chip_id);  in rtl8366rb_setup()
1057 		dev_err(priv->dev, "unable to read chip id\n");  in rtl8366rb_setup()
1065 		dev_err(priv->dev, "unknown chip id (%04x)\n", chip_id);  in rtl8366rb_setup()
1066 		return -ENODEV;  in rtl8366rb_setup()
1069 	ret = regmap_read(priv->map, RTL8366RB_CHIP_VERSION_CTRL_REG,  in rtl8366rb_setup()
1072 		dev_err(priv->dev, "unable to read chip version\n");  in rtl8366rb_setup()
1076 	dev_info(priv->dev, "RTL%04x ver %u chip found\n",  in rtl8366rb_setup()
1101 	 * without them, using just the off-the-shelf tables.  in rtl8366rb_setup()
1103 	if (of_machine_is_compatible("belkin,f5d8235-v1")) {  in rtl8366rb_setup()
1119 		ret = regmap_write(priv->map, RTL8366RB_PORT_ISO(i),  in rtl8366rb_setup()
1126 	ret = regmap_write(priv->map, RTL8366RB_PORT_ISO(RTL8366RB_PORT_NUM_CPU),  in rtl8366rb_setup()
1138 	ret = regmap_write(priv->map,  in rtl8366rb_setup()
1145 	ret = regmap_write(priv->map, 0x0c, 0x240);  in rtl8366rb_setup()
1148 	ret = regmap_write(priv->map, 0x0d, 0x240);  in rtl8366rb_setup()
1162 	ret = regmap_update_bits(priv->map, RTL8366RB_CPU_CTRL_REG,  in rtl8366rb_setup()
1164 				 BIT(priv->cpu_port));  in rtl8366rb_setup()
1168 	/* Make sure we default-enable the fixed CPU port */  in rtl8366rb_setup()
1169 	ret = regmap_update_bits(priv->map, RTL8366RB_PECR,  in rtl8366rb_setup()
1170 				 BIT(priv->cpu_port),  in rtl8366rb_setup()
1176 	ret = regmap_update_bits(priv->map, RTL8366RB_SGCR,  in rtl8366rb_setup()
1182 		if (i == priv->cpu_port)  in rtl8366rb_setup()
1184 			rb->max_mtu[i] = ETH_DATA_LEN + RTL8366RB_CPU_TAG_SIZE;  in rtl8366rb_setup()
1186 			rb->max_mtu[i] = ETH_DATA_LEN;  in rtl8366rb_setup()
1190 	ret = regmap_write(priv->map, RTL8366RB_PORT_LEARNDIS_CTRL,  in rtl8366rb_setup()
1196 	ret = regmap_write(priv->map, RTL8366RB_SECURITY_CTRL, 0);  in rtl8366rb_setup()
1203 	 * IO modes in the Realtek source code, if your WAN port is  in rtl8366rb_setup()
1207 	ret = regmap_update_bits(priv->map, RTL8366RB_PMC0,  in rtl8366rb_setup()
1213 	/* Accept all packets by default, we enable filtering on-demand */  in rtl8366rb_setup()
1214 	ret = regmap_write(priv->map, RTL8366RB_VLAN_INGRESS_CTRL1_REG,  in rtl8366rb_setup()
1218 	ret = regmap_write(priv->map, RTL8366RB_VLAN_INGRESS_CTRL2_REG,  in rtl8366rb_setup()
1224 	ret = regmap_update_bits(priv->map, RTL8366RB_SSCR2,  in rtl8366rb_setup()
1232 	ret = regmap_update_bits(priv->map, RTL8366RB_LED_BLINKRATE_REG,  in rtl8366rb_setup()
1244 	if (priv->leds_disabled) {  in rtl8366rb_setup()
1260 		dev_info(priv->dev, "no interrupt support\n");  in rtl8366rb_setup()
1264 		dev_err(priv->dev, "could not set up MDIO bus\n");  in rtl8366rb_setup()
1265 		return -ENODEV;  in rtl8366rb_setup()
1275 	/* This switch uses the 4 byte protocol A Realtek DSA tag */  in rtl8366_get_tag_protocol()
1282 	unsigned long *interfaces = config->supported_interfaces;  in rtl8366rb_phylink_get_caps()
1283 	struct realtek_priv *priv = ds->priv;  in rtl8366rb_phylink_get_caps()
1285 	if (port == priv->cpu_port) {  in rtl8366rb_phylink_get_caps()
1293 		config->mac_capabilities = MAC_1000 | MAC_100 |  in rtl8366rb_phylink_get_caps()
1300 		config->mac_capabilities = MAC_1000 | MAC_100 | MAC_10 |  in rtl8366rb_phylink_get_caps()
1317 	struct realtek_priv *priv = dp->ds->priv;  in rtl8366rb_mac_link_up()
1318 	int port = dp->index;  in rtl8366rb_mac_link_up()
1323 	 * We assume autonegotiation works on the PHY-facing ports.  in rtl8366rb_mac_link_up()
1325 	if (port != priv->cpu_port)  in rtl8366rb_mac_link_up()
1328 	dev_dbg(priv->dev, "MAC link up on CPU port (%d)\n", port);  in rtl8366rb_mac_link_up()
1330 	ret = regmap_update_bits(priv->map, RTL8366RB_MAC_FORCE_CTRL_REG,  in rtl8366rb_mac_link_up()
1333 		dev_err(priv->dev, "failed to force CPU port\n");  in rtl8366rb_mac_link_up()
1364 	ret = regmap_update_bits(priv->map, RTL8366RB_PAACR2,  in rtl8366rb_mac_link_up()
1368 		dev_err(priv->dev, "failed to set PAACR on CPU port\n");  in rtl8366rb_mac_link_up()
1372 	dev_dbg(priv->dev, "set PAACR to %04x\n", val);  in rtl8366rb_mac_link_up()
1375 	ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port),  in rtl8366rb_mac_link_up()
1378 		dev_err(priv->dev, "failed to enable the CPU port\n");  in rtl8366rb_mac_link_up()
1388 	struct realtek_priv *priv = dp->ds->priv;  in rtl8366rb_mac_link_down()
1389 	int port = dp->index;  in rtl8366rb_mac_link_down()
1392 	if (port != priv->cpu_port)  in rtl8366rb_mac_link_down()
1395 	dev_dbg(priv->dev, "MAC link down on CPU port (%d)\n", port);  in rtl8366rb_mac_link_down()
1398 	ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port),  in rtl8366rb_mac_link_down()
1401 		dev_err(priv->dev, "failed to disable the CPU port\n");  in rtl8366rb_mac_link_down()
1410 	struct realtek_priv *priv = ds->priv;  in rtl8366rb_port_enable()
1413 	dev_dbg(priv->dev, "enable port %d\n", port);  in rtl8366rb_port_enable()
1414 	ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port),  in rtl8366rb_port_enable()
1425 	struct realtek_priv *priv = ds->priv;  in rtl8366rb_port_disable()
1428 	dev_dbg(priv->dev, "disable port %d\n", port);  in rtl8366rb_port_disable()
1429 	ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port),  in rtl8366rb_port_disable()
1441 	struct realtek_priv *priv = ds->priv;  in rtl8366rb_port_bridge_join()
1454 		ret = regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(i),  in rtl8366rb_port_bridge_join()
1458 			dev_err(priv->dev, "failed to join port %d\n", port);  in rtl8366rb_port_bridge_join()
1464 	return regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(port),  in rtl8366rb_port_bridge_join()
1473 	struct realtek_priv *priv = ds->priv;  in rtl8366rb_port_bridge_leave()
1486 		ret = regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(i),  in rtl8366rb_port_bridge_leave()
1489 			dev_err(priv->dev, "failed to leave port %d\n", port);  in rtl8366rb_port_bridge_leave()
1495 	regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(port),  in rtl8366rb_port_bridge_leave()
1500  * rtl8366rb_drop_untagged() - make the switch drop untagged and C-tagged frames
1501  * @priv: SMI state container
1502  * @port: the port to drop untagged and C-tagged frames on
1503  * @drop: whether to drop or pass untagged and C-tagged frames
1509 	return regmap_update_bits(priv->map, RTL8366RB_VLAN_INGRESS_CTRL1_REG,  in rtl8366rb_drop_untagged()
1518 	struct realtek_priv *priv = ds->priv;  in rtl8366rb_vlan_filtering()
1522 	rb = priv->chip_data;  in rtl8366rb_vlan_filtering()
1524 	dev_dbg(priv->dev, "port %d: %s VLAN filtering\n", port,  in rtl8366rb_vlan_filtering()
1528 	ret = regmap_update_bits(priv->map, RTL8366RB_VLAN_INGRESS_CTRL2_REG,  in rtl8366rb_vlan_filtering()
1534 	 * not drop any untagged or C-tagged frames. If we turn off VLAN  in rtl8366rb_vlan_filtering()
1538 		ret = rtl8366rb_drop_untagged(priv, port, !rb->pvid_enabled[port]);  in rtl8366rb_vlan_filtering()
1552 		return -EINVAL;  in rtl8366rb_port_pre_bridge_flags()
1562 	struct realtek_priv *priv = ds->priv;  in rtl8366rb_port_bridge_flags()
1566 		ret = regmap_update_bits(priv->map, RTL8366RB_PORT_LEARNDIS_CTRL,  in rtl8366rb_port_bridge_flags()
1579 	struct realtek_priv *priv = ds->priv;  in rtl8366rb_port_stp_state_set()
1598 		dev_err(priv->dev, "unknown bridge state requested\n");  in rtl8366rb_port_stp_state_set()
1604 		regmap_update_bits(priv->map, RTL8366RB_STP_STATE_BASE + i,  in rtl8366rb_port_stp_state_set()
1613 	struct realtek_priv *priv = ds->priv;  in rtl8366rb_port_fast_age()
1616 	regmap_update_bits(priv->map, RTL8366RB_SECURITY_CTRL,  in rtl8366rb_port_fast_age()
1619 	regmap_update_bits(priv->map, RTL8366RB_SECURITY_CTRL,  in rtl8366rb_port_fast_age()
1625 	struct realtek_priv *priv = ds->priv;  in rtl8366rb_change_mtu()
1631 	/* Cache the per-port MTU setting */  in rtl8366rb_change_mtu()
1632 	rb = priv->chip_data;  in rtl8366rb_change_mtu()
1633 	rb->max_mtu[port] = new_mtu;  in rtl8366rb_change_mtu()
1641 		if (rb->max_mtu[i] > max_mtu)  in rtl8366rb_change_mtu()
1642 			max_mtu = rb->max_mtu[i];  in rtl8366rb_change_mtu()
1665 	return regmap_update_bits(priv->map, RTL8366RB_SGCR,  in rtl8366rb_change_mtu()
1674 	 * 16000 - 18 - 4 = 15978. This does not include the CPU tag  in rtl8366rb_max_mtu()
1677 	return 16000 - VLAN_ETH_HLEN - ETH_FCS_LEN;  in rtl8366rb_max_mtu()
1690 		return -EINVAL;  in rtl8366rb_get_vlan_4k()
1693 	ret = regmap_write(priv->map, RTL8366RB_VLAN_TABLE_WRITE_BASE,  in rtl8366rb_get_vlan_4k()
1699 	ret = regmap_write(priv->map, RTL8366RB_TABLE_ACCESS_CTRL_REG,  in rtl8366rb_get_vlan_4k()
1705 		ret = regmap_read(priv->map,  in rtl8366rb_get_vlan_4k()
1712 	vlan4k->vid = vid;  in rtl8366rb_get_vlan_4k()
1713 	vlan4k->untag = (data[1] >> RTL8366RB_VLAN_UNTAG_SHIFT) &  in rtl8366rb_get_vlan_4k()
1715 	vlan4k->member = data[1] & RTL8366RB_VLAN_MEMBER_MASK;  in rtl8366rb_get_vlan_4k()
1716 	vlan4k->fid = data[2] & RTL8366RB_VLAN_FID_MASK;  in rtl8366rb_get_vlan_4k()
1728 	if (vlan4k->vid >= RTL8366RB_NUM_VIDS ||  in rtl8366rb_set_vlan_4k()
1729 	    vlan4k->member > RTL8366RB_VLAN_MEMBER_MASK ||  in rtl8366rb_set_vlan_4k()
1730 	    vlan4k->untag > RTL8366RB_VLAN_UNTAG_MASK ||  in rtl8366rb_set_vlan_4k()
1731 	    vlan4k->fid > RTL8366RB_FIDMAX)  in rtl8366rb_set_vlan_4k()
1732 		return -EINVAL;  in rtl8366rb_set_vlan_4k()
1734 	data[0] = vlan4k->vid & RTL8366RB_VLAN_VID_MASK;  in rtl8366rb_set_vlan_4k()
1735 	data[1] = (vlan4k->member & RTL8366RB_VLAN_MEMBER_MASK) |  in rtl8366rb_set_vlan_4k()
1736 		  ((vlan4k->untag & RTL8366RB_VLAN_UNTAG_MASK) <<  in rtl8366rb_set_vlan_4k()
1738 	data[2] = vlan4k->fid & RTL8366RB_VLAN_FID_MASK;  in rtl8366rb_set_vlan_4k()
1741 		ret = regmap_write(priv->map,  in rtl8366rb_set_vlan_4k()
1749 	ret = regmap_write(priv->map, RTL8366RB_TABLE_ACCESS_CTRL_REG,  in rtl8366rb_set_vlan_4k()
1765 		return -EINVAL;  in rtl8366rb_get_vlan_mc()
1768 		ret = regmap_read(priv->map,  in rtl8366rb_get_vlan_mc()
1775 	vlanmc->vid = data[0] & RTL8366RB_VLAN_VID_MASK;  in rtl8366rb_get_vlan_mc()
1776 	vlanmc->priority = (data[0] >> RTL8366RB_VLAN_PRIORITY_SHIFT) &  in rtl8366rb_get_vlan_mc()
1778 	vlanmc->untag = (data[1] >> RTL8366RB_VLAN_UNTAG_SHIFT) &  in rtl8366rb_get_vlan_mc()
1780 	vlanmc->member = data[1] & RTL8366RB_VLAN_MEMBER_MASK;  in rtl8366rb_get_vlan_mc()
1781 	vlanmc->fid = data[2] & RTL8366RB_VLAN_FID_MASK;  in rtl8366rb_get_vlan_mc()
1794 	    vlanmc->vid >= RTL8366RB_NUM_VIDS ||  in rtl8366rb_set_vlan_mc()
1795 	    vlanmc->priority > RTL8366RB_PRIORITYMAX ||  in rtl8366rb_set_vlan_mc()
1796 	    vlanmc->member > RTL8366RB_VLAN_MEMBER_MASK ||  in rtl8366rb_set_vlan_mc()
1797 	    vlanmc->untag > RTL8366RB_VLAN_UNTAG_MASK ||  in rtl8366rb_set_vlan_mc()
1798 	    vlanmc->fid > RTL8366RB_FIDMAX)  in rtl8366rb_set_vlan_mc()
1799 		return -EINVAL;  in rtl8366rb_set_vlan_mc()
1801 	data[0] = (vlanmc->vid & RTL8366RB_VLAN_VID_MASK) |  in rtl8366rb_set_vlan_mc()
1802 		  ((vlanmc->priority & RTL8366RB_VLAN_PRIORITY_MASK) <<  in rtl8366rb_set_vlan_mc()
1804 	data[1] = (vlanmc->member & RTL8366RB_VLAN_MEMBER_MASK) |  in rtl8366rb_set_vlan_mc()
1805 		  ((vlanmc->untag & RTL8366RB_VLAN_UNTAG_MASK) <<  in rtl8366rb_set_vlan_mc()
1807 	data[2] = vlanmc->fid & RTL8366RB_VLAN_FID_MASK;  in rtl8366rb_set_vlan_mc()
1810 		ret = regmap_write(priv->map,  in rtl8366rb_set_vlan_mc()
1825 	if (port >= priv->num_ports)  in rtl8366rb_get_mc_index()
1826 		return -EINVAL;  in rtl8366rb_get_mc_index()
1828 	ret = regmap_read(priv->map, RTL8366RB_PORT_VLAN_CTRL_REG(port),  in rtl8366rb_get_mc_index()
1841 	struct dsa_switch *ds = &priv->ds;  in rtl8366rb_set_mc_index()
1846 	rb = priv->chip_data;  in rtl8366rb_set_mc_index()
1849 	if (port >= priv->num_ports || index >= RTL8366RB_NUM_VLANS)  in rtl8366rb_set_mc_index()
1850 		return -EINVAL;  in rtl8366rb_set_mc_index()
1852 	ret = regmap_update_bits(priv->map, RTL8366RB_PORT_VLAN_CTRL_REG(port),  in rtl8366rb_set_mc_index()
1860 	rb->pvid_enabled[port] = pvid_enabled;  in rtl8366rb_set_mc_index()
1863 	 * not drop any untagged or C-tagged frames. Make sure to update the  in rtl8366rb_set_mc_index()
1874 	unsigned int max = RTL8366RB_NUM_VLANS - 1;  in rtl8366rb_is_vlan_valid()
1876 	if (priv->vlan4k_enabled)  in rtl8366rb_is_vlan_valid()
1877 		max = RTL8366RB_NUM_VIDS - 1;  in rtl8366rb_is_vlan_valid()
1887 	dev_dbg(priv->dev, "%s VLAN\n", enable ? "enable" : "disable");  in rtl8366rb_enable_vlan()
1888 	return regmap_update_bits(priv->map,  in rtl8366rb_enable_vlan()
1895 	dev_dbg(priv->dev, "%s VLAN 4k\n", enable ? "enable" : "disable");  in rtl8366rb_enable_vlan4k()
1896 	return regmap_update_bits(priv->map, RTL8366RB_SGCR,  in rtl8366rb_enable_vlan4k()
1908 		return -EINVAL;  in rtl8366rb_phy_read()
1912 	ret = regmap_write(priv->map_nolock, RTL8366RB_PHY_ACCESS_CTRL_REG,  in rtl8366rb_phy_read()
1919 	ret = regmap_write(priv->map_nolock, reg, 0);  in rtl8366rb_phy_read()
1921 		dev_err(priv->dev,  in rtl8366rb_phy_read()
1927 	ret = regmap_read(priv->map_nolock, RTL8366RB_PHY_ACCESS_DATA_REG,  in rtl8366rb_phy_read()
1934 	dev_dbg(priv->dev, "read PHY%d register 0x%04x @ %08x, val <- %04x\n",  in rtl8366rb_phy_read()
1950 		return -EINVAL;  in rtl8366rb_phy_write()
1954 	ret = regmap_write(priv->map_nolock, RTL8366RB_PHY_ACCESS_CTRL_REG,  in rtl8366rb_phy_write()
1961 	dev_dbg(priv->dev, "write PHY%d register 0x%04x @ %04x, val -> %04x\n",  in rtl8366rb_phy_write()
1964 	ret = regmap_write(priv->map_nolock, reg, val);  in rtl8366rb_phy_write()
1980 	priv->write_reg_noack(priv, RTL8366RB_RESET_CTRL_REG,  in rtl8366rb_reset_chip()
1984 		ret = regmap_read(priv->map, RTL8366RB_RESET_CTRL_REG, &val);  in rtl8366rb_reset_chip()
1990 	} while (--timeout);  in rtl8366rb_reset_chip()
1993 		dev_err(priv->dev, "timeout waiting for the switch to reset\n");  in rtl8366rb_reset_chip()
1994 		return -EIO;  in rtl8366rb_reset_chip()
2002 	struct device *dev = priv->dev;  in rtl8366rb_detect()
2007 	ret = regmap_read(priv->map, 0x5c, &val);  in rtl8366rb_detect()
2017 		return -ENODEV;  in rtl8366rb_detect()
2020 		priv->cpu_port = RTL8366RB_PORT_NUM_CPU;  in rtl8366rb_detect()
2021 		priv->num_ports = RTL8366RB_NUM_PORTS;  in rtl8366rb_detect()
2022 		priv->num_vlan_mc = RTL8366RB_NUM_VLANS;  in rtl8366rb_detect()
2023 		priv->mib_counters = rtl8366rb_mib_counters;  in rtl8366rb_detect()
2024 		priv->num_mib_counters = ARRAY_SIZE(rtl8366rb_mib_counters);  in rtl8366rb_detect()
2027 		dev_info(dev, "found an Unknown Realtek switch (id=0x%04x)\n",  in rtl8366rb_detect()
2094 	{ .compatible = "realtek,rtl8366rb", .data = &rtl8366rb_variant, },
2101 		.name = "rtl8366rb-smi",
2111 		.name = "rtl8366rb-mdio",