37 int mv88e6xxx_port_write(struct mv88e6xxx_chip *chip, int port, int reg,  in mv88e6xxx_port_write()  function
65 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_STS, reg);  in mv88e6185_port_set_pause()
107 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);  in mv88e6xxx_port_set_rgmii_delay()
172 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);  in mv88e6xxx_port_set_link()
291 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);  in mv88e6xxx_port_set_speed_duplex()
495 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);  in mv88e6393x_port_set_speed_duplex()
589 		err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_STS, reg);  in mv88e6xxx_port_set_cmode()
657 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);  in mv88e6393x_port_set_cmode()
752 	return mv88e6xxx_port_write(chip, port, MV88E6097_PORT_JAM_CTL,  in mv88e6097_port_pause_limit()
761 	err = mv88e6xxx_port_write(chip, port, MV88E6390_PORT_FLOW_CTL,  in mv88e6390_port_pause_limit()
767 	return mv88e6xxx_port_write(chip, port, MV88E6390_PORT_FLOW_CTL,  in mv88e6390_port_pause_limit()
812 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6xxx_port_set_state()
851 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6xxx_port_set_egress_mode()
877 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6085_port_set_frame_mode()
909 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6351_port_set_frame_mode()
927 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6185_port_set_forward_unknown()
945 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6352_port_set_ucast_flood()
963 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6352_port_set_mcast_flood()
983 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL1, val);  in mv88e6xxx_port_set_message_port()
1004 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL1, val);  in mv88e6xxx_port_set_trunk()
1022 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_BASE_VLAN, reg);  in mv88e6xxx_port_set_vlan_map()
1074 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_BASE_VLAN, reg);  in mv88e6xxx_port_set_fid()
1088 		err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL1,  in mv88e6xxx_port_set_fid()
1129 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_DEFAULT_VLAN,  in mv88e6xxx_port_set_pvid()
1163 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);  in mv88e6185_port_set_default_forward()
1179 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);  in mv88e6095_port_set_upstream_port()
1212 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);  in mv88e6xxx_port_set_mirror()
1233 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);  in mv88e6xxx_port_set_lock()
1245 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR, reg);  in mv88e6xxx_port_set_lock()
1261 	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);  in mv88e6xxx_port_set_8021q_mode()
1289 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, new);  in mv88e6xxx_port_drop_untagged()
1306 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);  in mv88e6xxx_port_set_map_da()
1332 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);  in mv88e6165_port_set_jumbo_size()
1339 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_EGRESS_RATE_CTL1,  in mv88e6095_port_egress_rate_limiting()
1345 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_EGRESS_RATE_CTL1,  in mv88e6097_port_egress_rate_limiting()
1366 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR,  in mv88e6xxx_port_set_assoc_vector()
1374 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ATU_CTL, 0);  in mv88e6xxx_port_disable_learn_limit()
1381 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_PRI_OVERRIDE, 0);  in mv88e6xxx_port_disable_pri_override()
1392 	err = mv88e6xxx_port_write(chip, port, MV88E6393X_PORT_POLICY_MGMT_CTL,  in mv88e6393x_port_policy_read()
1414 	return mv88e6xxx_port_write(chip, port, MV88E6393X_PORT_POLICY_MGMT_CTL,  in mv88e6393x_port_policy_write()
1523 	err = mv88e6xxx_port_write(chip, port, MV88E6393X_PORT_EPC_DATA, etype);  in mv88e6393x_port_set_ether_type()
1531 	return mv88e6xxx_port_write(chip, port, MV88E6393X_PORT_EPC_CMD, val);  in mv88e6393x_port_set_ether_type()
1539 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ETH_TYPE, etype);  in mv88e6351_port_set_ether_type()
1551 	err = mv88e6xxx_port_write(chip, port,  in mv88e6095_port_tag_remap()
1557 	return mv88e6xxx_port_write(chip, port,  in mv88e6095_port_tag_remap()
1571 	return mv88e6xxx_port_write(chip, port,  in mv88e6xxx_port_ieeepmt_write()
1690 	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_POLICY_CTL, reg);  in mv88e6352_port_set_policy()