Lines Matching +full:mdio +full:- +full:parent +full:- +full:bus
1 // SPDX-License-Identifier: GPL-2.0-or-later
25 struct mdio_device mdio; member
43 mutex_lock(&mpcs->mdio.bus->mdio_lock); in marvell_c22_pcs_set_fiber_page()
45 err = __mdiodev_read(&mpcs->mdio, MII_MARVELL_PHY_PAGE); in marvell_c22_pcs_set_fiber_page()
47 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_set_fiber_page()
49 mpcs->name, ERR_PTR(err)); in marvell_c22_pcs_set_fiber_page()
55 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE, in marvell_c22_pcs_set_fiber_page()
58 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_set_fiber_page()
60 mpcs->name, ERR_PTR(err)); in marvell_c22_pcs_set_fiber_page()
73 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE, in marvell_c22_pcs_restore_page()
76 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_restore_page()
78 mpcs->name, ERR_PTR(err)); in marvell_c22_pcs_restore_page()
84 mutex_unlock(&mpcs->mdio.bus->mdio_lock); in marvell_c22_pcs_restore_page()
99 err = __mdiodev_read(&mpcs->mdio, MII_M1011_IEVENT); in marvell_c22_pcs_handle_irq()
101 phylink_pcs_change(&mpcs->phylink_pcs, true); in marvell_c22_pcs_handle_irq()
118 err = __mdiodev_modify(&mpcs->mdio, reg, mask, val); in marvell_c22_pcs_modify()
149 return marvell_c22_pcs_control_irq(mpcs, !!mpcs->irq); in marvell_c22_pcs_enable()
166 state->link = false; in marvell_c22_pcs_get_state()
168 if (mpcs->link_check && !mpcs->link_check(mpcs)) in marvell_c22_pcs_get_state()
173 bmsr = __mdiodev_read(&mpcs->mdio, MII_BMSR); in marvell_c22_pcs_get_state()
174 lpa = __mdiodev_read(&mpcs->mdio, MII_LPA); in marvell_c22_pcs_get_state()
175 status = __mdiodev_read(&mpcs->mdio, MII_M1011_PHY_STATUS); in marvell_c22_pcs_get_state()
180 mv88e6xxx_pcs_decode_state(mpcs->mdio.dev.parent, bmsr, lpa, in marvell_c22_pcs_get_state()
204 err = __mdiodev_modify_changed(&mpcs->mdio, MII_ADVERTISE, 0xffff, adv); in marvell_c22_pcs_config()
209 err = __mdiodev_modify_changed(&mpcs->mdio, MII_BMCR, BMCR_ANENABLE, in marvell_c22_pcs_config()
249 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_link_up()
250 "%s: failed to configure mpcs: %pe\n", mpcs->name, in marvell_c22_pcs_link_up()
264 struct mii_bus *bus, in marvell_c22_pcs_alloc() argument
273 mpcs->mdio.dev.parent = dev; in marvell_c22_pcs_alloc()
274 mpcs->mdio.bus = bus; in marvell_c22_pcs_alloc()
275 mpcs->mdio.addr = addr; in marvell_c22_pcs_alloc()
276 mpcs->phylink_pcs.ops = &marvell_c22_pcs_ops; in marvell_c22_pcs_alloc()
277 mpcs->phylink_pcs.neg_mode = true; in marvell_c22_pcs_alloc()
287 mpcs->phylink_pcs.poll = !irq; in marvell_c22_pcs_setup_irq()
288 mpcs->irq = irq; in marvell_c22_pcs_setup_irq()
293 IRQF_ONESHOT, mpcs->name, mpcs); in marvell_c22_pcs_setup_irq()
305 struct mv88e6xxx_port *port = mpcs->port; in mv88e6352_pcs_link_check()
306 struct mv88e6xxx_chip *chip = port->chip; in mv88e6352_pcs_link_check()
309 /* Port 4 can be in auto-media mode. Check that the port is in mv88e6352_pcs_link_check()
313 chip->info->ops->port_get_cmode(chip, port->port, &cmode); in mv88e6352_pcs_link_check()
324 struct mii_bus *bus; in mv88e6352_pcs_init() local
336 bus = mv88e6xxx_default_mdio_bus(chip); in mv88e6352_pcs_init()
337 dev = chip->dev; in mv88e6352_pcs_init()
339 mpcs = marvell_c22_pcs_alloc(dev, bus, MV88E6352_ADDR_SERDES); in mv88e6352_pcs_init()
341 return -ENOMEM; in mv88e6352_pcs_init()
343 snprintf(mpcs->name, sizeof(mpcs->name), in mv88e6352_pcs_init()
344 "mv88e6xxx-%s-serdes-%d", dev_name(dev), port); in mv88e6352_pcs_init()
346 mpcs->link_check = mv88e6352_pcs_link_check; in mv88e6352_pcs_init()
347 mpcs->port = &chip->ports[port]; in mv88e6352_pcs_init()
355 chip->ports[port].pcs_private = &mpcs->phylink_pcs; in mv88e6352_pcs_init()
365 pcs = chip->ports[port].pcs_private; in mv88e6352_pcs_teardown()
371 if (mpcs->irq) in mv88e6352_pcs_teardown()
372 free_irq(mpcs->irq, mpcs); in mv88e6352_pcs_teardown()
376 chip->ports[port].pcs_private = NULL; in mv88e6352_pcs_teardown()
383 return chip->ports[port].pcs_private; in mv88e6352_pcs_select()