Lines Matching +full:x1000 +full:- +full:mac

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7  * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
21 #define MV88E6XXX_G2_INT_SRC_WAKE_EVENT		0x1000
33 #define MV88E6XXX_G2_INT_MASK_WAKE_EVENT	0x1000
41 /* Offset 0x02: MAC LINK change IRQ Register for MV88E6393X */
47 /* Offset 0x03: MAC LINK change IRQ Mask Register for MV88E6393X */
86 #define MV88E6352_G2_IRL_CMD_OP_INIT_ALL	0x1000
104 /* Offset 0x0B: Cross-chip Port VLAN Register */
108 #define MV88E6XXX_G2_PVT_ADDR_OP_INIT_ONES	0x1000
114 /* Offset 0x0C: Cross-chip Port VLAN Data Register */
118 /* Offset 0x0D: Switch MAC/WoL/WoF Register */
139 #define MV88E6XXX_G2_PRIO_OVERRIDE_FPRISET	0x1000
199 #define MV88E6XXX_G2_SMI_PHY_CMD_MODE_MASK		0x1000
201 #define MV88E6XXX_G2_SMI_PHY_CMD_MODE_22		0x1000
250 #define MV88E6390_G2_WDOG_CTL_PTR_INT_STS		0x1000
277 /* Offset 0x60-0x61: GPIO Configuration */
280 /* Offset 0x62-0x63: GPIO Direction */
285 /* Offset 0x64-0x65: GPIO Data */
288 /* Offset 0x68-0x6F: GPIO Pin Control */