Lines Matching full:atu
3 * Marvell 88E6xxx Address Translation Unit (ATU) support
18 /* Offset 0x01: ATU FID Register */
25 /* Offset 0x0A: ATU Control Register */
110 /* Offset 0x0B: ATU Operation Register */
144 /* ATU DBNum[7:4] are located in ATU Control 15:12 */ in mv88e6xxx_g1_atu_op()
156 /* ATU DBNum[5:4] are located in ATU Operation 9:8 */ in mv88e6xxx_g1_atu_op()
160 /* ATU DBNum[3:0] are located in ATU Operation 3:0 */ in mv88e6xxx_g1_atu_op()
192 /* ATU DBNum[7:4] are located in ATU Control 15:12 */ in mv88e6xxx_g1_atu_fid_read()
200 /* ATU DBNum[5:4] are located in ATU Operation 9:8 */ in mv88e6xxx_g1_atu_fid_read()
204 /* ATU DBNum[3:0] are located in ATU Operation 3:0 */ in mv88e6xxx_g1_atu_fid_read()
212 /* Offset 0x0C: ATU Data Register */
248 /* Offset 0x0D: ATU MAC Address Register Bytes 0 & 1
249 * Offset 0x0E: ATU MAC Address Register Bytes 2 & 3
250 * Offset 0x0F: ATU MAC Address Register Bytes 4 & 5
470 dev_err(chip->dev, "ATU problem: error %d while handling interrupt\n", in mv88e6xxx_g1_atu_prob_irq_thread_fn()
485 "mv88e6xxx-%s-g1-atu-prob", dev_name(chip->dev)); in mv88e6xxx_g1_atu_prob_irq_setup()