Lines Matching +full:chip +full:- +full:to +full:- +full:chip
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Marvell 88E6xxx Ethernet switch single-chip definition
28 /* PVT limits for 4-bit port and 5-bit switch */
110 * enum mv88e6xxx_edsa_support - Ethertype DSA tag support level
149 * ports 2-4 are not routet to pins.
152 /* Multi-chip Addressing Mode.
153 * Some chips respond to only 2 registers of its own SMI device address
154 * when it is non-zero, and use indirect access to internal registers.
157 /* Dual-chip Addressing Mode
158 * Some chips respond to only half of the 32 SMI addresses,
159 * allowing two to coexist on the same SMI interface.
213 struct irq_chip chip; member
277 struct mv88e6xxx_chip *chip; member
339 /* The dsa_switch this private structure is related to */
342 /* The device this structure is associated to */
345 /* This mutex protects the access to the switch registers */
348 /* The MII bus and the address on the bus that is used to
355 /* Handles automatic disabling and re-enabling of the PHY
364 /* This mutex serialises access to the statistics unit.
369 /* A switch may have a GPIO line tied to its reset pin. Parse
375 /* set to size of eeprom if supported by the switch */
426 /* Per-port timestamping resources. */
435 /* Bridge MST to SID mappings */
440 int (*read)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val);
441 int (*write)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val);
442 int (*init)(struct mv88e6xxx_chip *chip);
447 struct mv88e6xxx_chip *chip; member
453 /* Switch Setup Errata, called early in the switch setup to
454 * allow any errata actions to be performed
456 int (*setup_errata)(struct mv88e6xxx_chip *chip);
458 int (*ieee_pri_map)(struct mv88e6xxx_chip *chip);
459 int (*ip_pri_map)(struct mv88e6xxx_chip *chip);
462 int (*irl_init_all)(struct mv88e6xxx_chip *chip, int port);
464 int (*get_eeprom)(struct mv88e6xxx_chip *chip,
466 int (*set_eeprom)(struct mv88e6xxx_chip *chip,
469 int (*set_switch_mac)(struct mv88e6xxx_chip *chip, u8 *addr);
471 int (*phy_read)(struct mv88e6xxx_chip *chip,
474 int (*phy_write)(struct mv88e6xxx_chip *chip,
478 int (*phy_read_c45)(struct mv88e6xxx_chip *chip,
481 int (*phy_write_c45)(struct mv88e6xxx_chip *chip,
486 int (*pot_clear)(struct mv88e6xxx_chip *chip);
489 int (*ppu_enable)(struct mv88e6xxx_chip *chip);
490 int (*ppu_disable)(struct mv88e6xxx_chip *chip);
492 /* Additional handlers to run before and after hard reset, to make sure
495 int (*hardware_reset_pre)(struct mv88e6xxx_chip *chip);
496 int (*hardware_reset_post)(struct mv88e6xxx_chip *chip);
499 int (*reset)(struct mv88e6xxx_chip *chip);
504 int (*port_set_rgmii_delay)(struct mv88e6xxx_chip *chip, int port,
509 #define LINK_UNFORCED -2
512 * Use LINK_FORCED_UP or LINK_FORCED_DOWN to force link up or down,
515 int (*port_set_link)(struct mv88e6xxx_chip *chip, int port, int link);
519 int (*port_sync_link)(struct mv88e6xxx_chip *chip, int port, unsigned int mode, bool isup);
525 int (*port_set_pause)(struct mv88e6xxx_chip *chip, int port,
528 #define SPEED_UNFORCED -2
529 #define DUPLEX_UNFORCED -2
533 * Depending on the chip, 10, 100, 200, 1000, 2500, 10000 are valid.
536 * Use DUPLEX_HALF or DUPLEX_FULL to force half or full duplex,
539 int (*port_set_speed_duplex)(struct mv88e6xxx_chip *chip, int port,
543 phy_interface_t (*port_max_speed_mode)(struct mv88e6xxx_chip *chip,
546 int (*port_tag_remap)(struct mv88e6xxx_chip *chip, int port);
548 int (*port_set_policy)(struct mv88e6xxx_chip *chip, int port,
552 int (*port_set_frame_mode)(struct mv88e6xxx_chip *chip, int port,
554 int (*port_set_ucast_flood)(struct mv88e6xxx_chip *chip, int port,
556 int (*port_set_mcast_flood)(struct mv88e6xxx_chip *chip, int port,
558 int (*port_set_ether_type)(struct mv88e6xxx_chip *chip, int port,
560 int (*port_set_jumbo_size)(struct mv88e6xxx_chip *chip, int port,
563 int (*port_egress_rate_limiting)(struct mv88e6xxx_chip *chip, int port);
564 int (*port_pause_limit)(struct mv88e6xxx_chip *chip, int port, u8 in,
566 int (*port_disable_learn_limit)(struct mv88e6xxx_chip *chip, int port);
567 int (*port_disable_pri_override)(struct mv88e6xxx_chip *chip, int port);
568 int (*port_setup_message_port)(struct mv88e6xxx_chip *chip, int port);
571 * Some chips allow this to be configured on specific ports.
573 int (*port_set_cmode)(struct mv88e6xxx_chip *chip, int port,
575 int (*port_get_cmode)(struct mv88e6xxx_chip *chip, int port, u8 *cmode);
578 * the upstream port this port should forward to.
580 int (*port_set_upstream_port)(struct mv88e6xxx_chip *chip, int port,
586 int (*stats_snapshot)(struct mv88e6xxx_chip *chip, int port);
591 int (*stats_set_histogram)(struct mv88e6xxx_chip *chip);
594 int (*stats_get_sset_count)(struct mv88e6xxx_chip *chip);
595 int (*stats_get_strings)(struct mv88e6xxx_chip *chip, uint8_t *data);
596 size_t (*stats_get_stat)(struct mv88e6xxx_chip *chip, int port,
599 int (*set_cpu_port)(struct mv88e6xxx_chip *chip, int port);
600 int (*set_egress_port)(struct mv88e6xxx_chip *chip,
607 int (*set_cascade_port)(struct mv88e6xxx_chip *chip, int port);
611 int (*mgmt_rsvd2cpu)(struct mv88e6xxx_chip *chip);
614 int (*serdes_get_lane)(struct mv88e6xxx_chip *chip, int port);
617 unsigned int (*serdes_irq_mapping)(struct mv88e6xxx_chip *chip,
621 int (*serdes_get_sset_count)(struct mv88e6xxx_chip *chip, int port);
622 int (*serdes_get_strings)(struct mv88e6xxx_chip *chip, int port,
624 size_t (*serdes_get_stats)(struct mv88e6xxx_chip *chip, int port,
628 int (*serdes_get_regs_len)(struct mv88e6xxx_chip *chip, int port);
629 void (*serdes_get_regs)(struct mv88e6xxx_chip *chip, int port,
633 int (*serdes_set_tx_amplitude)(struct mv88e6xxx_chip *chip, int port,
637 int (*atu_get_hash)(struct mv88e6xxx_chip *chip, u8 *hash);
638 int (*atu_set_hash)(struct mv88e6xxx_chip *chip, u8 hash);
641 int (*vtu_getnext)(struct mv88e6xxx_chip *chip,
643 int (*vtu_loadpurge)(struct mv88e6xxx_chip *chip,
647 int (*stu_getnext)(struct mv88e6xxx_chip *chip,
649 int (*stu_loadpurge)(struct mv88e6xxx_chip *chip,
655 /* Interface to the AVB/PTP registers */
659 int (*rmu_disable)(struct mv88e6xxx_chip *chip);
665 void (*phylink_get_caps)(struct mv88e6xxx_chip *chip, int port,
671 int (*set_max_frame_size)(struct mv88e6xxx_chip *chip, int mtu);
675 /* Action to be performed when the interrupt happens */
676 int (*irq_action)(struct mv88e6xxx_chip *chip, int irq);
677 /* Setup the hardware to generate the interrupt */
678 int (*irq_setup)(struct mv88e6xxx_chip *chip);
679 /* Reset the hardware to stop generating the interrupt */
680 void (*irq_free)(struct mv88e6xxx_chip *chip);
685 int (*get_data)(struct mv88e6xxx_chip *chip, unsigned int pin);
686 int (*set_data)(struct mv88e6xxx_chip *chip, unsigned int pin,
690 int (*get_dir)(struct mv88e6xxx_chip *chip, unsigned int pin);
691 int (*set_dir)(struct mv88e6xxx_chip *chip, unsigned int pin,
695 int (*get_pctl)(struct mv88e6xxx_chip *chip, unsigned int pin,
697 int (*set_pctl)(struct mv88e6xxx_chip *chip, unsigned int pin,
702 /* Access port-scoped Precision Time Protocol registers */
703 int (*port_ptp_read)(struct mv88e6xxx_chip *chip, int port, int addr,
705 int (*port_ptp_write)(struct mv88e6xxx_chip *chip, int port, int addr,
709 int (*ptp_read)(struct mv88e6xxx_chip *chip, int addr, u16 *data,
711 int (*ptp_write)(struct mv88e6xxx_chip *chip, int addr, u16 data);
714 int (*tai_read)(struct mv88e6xxx_chip *chip, int addr, u16 *data,
716 int (*tai_write)(struct mv88e6xxx_chip *chip, int addr, u16 data);
726 int (*port_enable)(struct mv88e6xxx_chip *chip, int port);
727 int (*port_disable)(struct mv88e6xxx_chip *chip, int port);
728 int (*global_enable)(struct mv88e6xxx_chip *chip);
729 int (*global_disable)(struct mv88e6xxx_chip *chip);
730 int (*set_ptp_cpu_port)(struct mv88e6xxx_chip *chip, int port);
739 int (*pcs_init)(struct mv88e6xxx_chip *chip, int port);
740 void (*pcs_teardown)(struct mv88e6xxx_chip *chip, int port);
741 struct phylink_pcs *(*pcs_select)(struct mv88e6xxx_chip *chip, int port,
746 static inline bool mv88e6xxx_has_stu(struct mv88e6xxx_chip *chip) in mv88e6xxx_has_stu() argument
748 return chip->info->max_sid > 0 && in mv88e6xxx_has_stu()
749 chip->info->ops->stu_loadpurge && in mv88e6xxx_has_stu()
750 chip->info->ops->stu_getnext; in mv88e6xxx_has_stu()
753 static inline bool mv88e6xxx_has_pvt(struct mv88e6xxx_chip *chip) in mv88e6xxx_has_pvt() argument
755 return chip->info->pvt; in mv88e6xxx_has_pvt()
758 static inline bool mv88e6xxx_has_lag(struct mv88e6xxx_chip *chip) in mv88e6xxx_has_lag() argument
760 return !!chip->info->global2_addr; in mv88e6xxx_has_lag()
763 static inline unsigned int mv88e6xxx_num_databases(struct mv88e6xxx_chip *chip) in mv88e6xxx_num_databases() argument
765 return chip->info->num_databases; in mv88e6xxx_num_databases()
768 static inline unsigned int mv88e6xxx_num_macs(struct mv88e6xxx_chip *chip) in mv88e6xxx_num_macs() argument
770 return chip->info->num_macs; in mv88e6xxx_num_macs()
773 static inline unsigned int mv88e6xxx_num_ports(struct mv88e6xxx_chip *chip) in mv88e6xxx_num_ports() argument
775 return chip->info->num_ports; in mv88e6xxx_num_ports()
778 static inline unsigned int mv88e6xxx_max_vid(struct mv88e6xxx_chip *chip) in mv88e6xxx_max_vid() argument
780 return chip->info->max_vid; in mv88e6xxx_max_vid()
783 static inline unsigned int mv88e6xxx_max_sid(struct mv88e6xxx_chip *chip) in mv88e6xxx_max_sid() argument
785 return chip->info->max_sid; in mv88e6xxx_max_sid()
788 static inline u16 mv88e6xxx_port_mask(struct mv88e6xxx_chip *chip) in mv88e6xxx_port_mask() argument
790 return GENMASK((s32)mv88e6xxx_num_ports(chip) - 1, 0); in mv88e6xxx_port_mask()
793 static inline unsigned int mv88e6xxx_num_gpio(struct mv88e6xxx_chip *chip) in mv88e6xxx_num_gpio() argument
795 return chip->info->num_gpio; in mv88e6xxx_num_gpio()
798 static inline bool mv88e6xxx_is_invalid_port(struct mv88e6xxx_chip *chip, int port) in mv88e6xxx_is_invalid_port() argument
800 return (chip->info->invalid_port_mask & BIT(port)) != 0; in mv88e6xxx_is_invalid_port()
803 static inline void mv88e6xxx_port_set_mab(struct mv88e6xxx_chip *chip, in mv88e6xxx_port_set_mab() argument
806 chip->ports[port].mab = mab; in mv88e6xxx_port_set_mab()
809 int mv88e6xxx_read(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val);
810 int mv88e6xxx_write(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val);
811 int mv88e6xxx_wait_mask(struct mv88e6xxx_chip *chip, int addr, int reg,
813 int mv88e6xxx_wait_bit(struct mv88e6xxx_chip *chip, int addr, int reg,
815 struct mii_bus *mv88e6xxx_default_mdio_bus(struct mv88e6xxx_chip *chip);
817 static inline void mv88e6xxx_reg_lock(struct mv88e6xxx_chip *chip) in mv88e6xxx_reg_lock() argument
819 mutex_lock(&chip->reg_lock); in mv88e6xxx_reg_lock()
822 static inline void mv88e6xxx_reg_unlock(struct mv88e6xxx_chip *chip) in mv88e6xxx_reg_unlock() argument
824 mutex_unlock(&chip->reg_lock); in mv88e6xxx_reg_unlock()
827 int mv88e6xxx_vtu_walk(struct mv88e6xxx_chip *chip,
828 int (*cb)(struct mv88e6xxx_chip *chip,
833 int mv88e6xxx_fid_map(struct mv88e6xxx_chip *chip, unsigned long *bitmap);