1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
42 static void b53_serdes_set_lane(struct b53_device *dev, u8 lane)  in b53_serdes_set_lane()  argument
44 	if (dev->serdes_lane == lane)  in b53_serdes_set_lane()
47 	WARN_ON(lane > 1);  in b53_serdes_set_lane()
50 			     SERDES_XGXSBLK0_BLOCKADDRESS, lane);  in b53_serdes_set_lane()
51 	dev->serdes_lane = lane;  in b53_serdes_set_lane()
54 static void b53_serdes_write(struct b53_device *dev, u8 lane,  in b53_serdes_write()  argument
57 	b53_serdes_set_lane(dev, lane);  in b53_serdes_write()
61 static u16 b53_serdes_read(struct b53_device *dev, u8 lane,  in b53_serdes_read()  argument
64 	b53_serdes_set_lane(dev, lane);  in b53_serdes_read()
73 	struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev;  in b53_serdes_config()
74 	u8 lane = pcs_to_b53_pcs(pcs)->lane;  in b53_serdes_config()  local
77 	reg = b53_serdes_read(dev, lane, B53_SERDES_DIGITAL_CONTROL(1),  in b53_serdes_config()
83 	b53_serdes_write(dev, lane, B53_SERDES_DIGITAL_CONTROL(1),  in b53_serdes_config()
91 	struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev;  in b53_serdes_an_restart()
92 	u8 lane = pcs_to_b53_pcs(pcs)->lane;  in b53_serdes_an_restart()  local
95 	reg = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMCR),  in b53_serdes_an_restart()
98 	b53_serdes_write(dev, lane, B53_SERDES_MII_REG(MII_BMCR),  in b53_serdes_an_restart()
105 	struct b53_device *dev = pcs_to_b53_pcs(pcs)->dev;  in b53_serdes_get_state()
106 	u8 lane = pcs_to_b53_pcs(pcs)->lane;  in b53_serdes_get_state()  local
109 	dig = b53_serdes_read(dev, lane, B53_SERDES_DIGITAL_STATUS,  in b53_serdes_get_state()
111 	bmsr = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMSR),  in b53_serdes_get_state()
116 		state->speed = SPEED_10;  in b53_serdes_get_state()
119 		state->speed = SPEED_100;  in b53_serdes_get_state()
122 		state->speed = SPEED_1000;  in b53_serdes_get_state()
126 		state->speed = SPEED_2500;  in b53_serdes_get_state()
130 	state->duplex = dig & DUPLEX_STATUS ? DUPLEX_FULL : DUPLEX_HALF;  in b53_serdes_get_state()
131 	state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);  in b53_serdes_get_state()
132 	state->link = !!(dig & LINK_STATUS);  in b53_serdes_get_state()
134 		state->pause |= MLO_PAUSE_RX;  in b53_serdes_get_state()
136 		state->pause |= MLO_PAUSE_TX;  in b53_serdes_get_state()
142 	u8 lane = b53_serdes_map_lane(dev, port);  in b53_serdes_link_set()  local
145 	if (lane == B53_INVALID_LANE)  in b53_serdes_link_set()
148 	reg = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMCR),  in b53_serdes_link_set()
154 	b53_serdes_write(dev, lane, B53_SERDES_MII_REG(MII_BMCR),  in b53_serdes_link_set()
168 	u8 lane = b53_serdes_map_lane(dev, port);  in b53_serdes_phylink_get_caps()  local
170 	if (lane == B53_INVALID_LANE)  in b53_serdes_phylink_get_caps()
173 	switch (lane) {  in b53_serdes_phylink_get_caps()
175 		/* It appears lane 0 supports 2500base-X and 1000base-X */  in b53_serdes_phylink_get_caps()
177 			  config->supported_interfaces);  in b53_serdes_phylink_get_caps()
178 		config->mac_capabilities |= MAC_2500FD;  in b53_serdes_phylink_get_caps()
181 		/* It appears lane 1 only supports 1000base-X and SGMII */  in b53_serdes_phylink_get_caps()
183 			  config->supported_interfaces);  in b53_serdes_phylink_get_caps()
185 			  config->supported_interfaces);  in b53_serdes_phylink_get_caps()
186 		config->mac_capabilities |= MAC_1000FD;  in b53_serdes_phylink_get_caps()
198 	u8 lane = b53_serdes_map_lane(dev, port);  in b53_serdes_phylink_mac_select_pcs()  local
200 	if (lane == B53_INVALID_LANE || lane >= B53_N_PCS ||  in b53_serdes_phylink_mac_select_pcs()
201 	    !dev->pcs[lane].dev)  in b53_serdes_phylink_mac_select_pcs()
208 	return &dev->pcs[lane].pcs;  in b53_serdes_phylink_mac_select_pcs()
214 	u8 lane = b53_serdes_map_lane(dev, port);  in b53_serdes_init()  local
218 	if (lane == B53_INVALID_LANE)  in b53_serdes_init()
219 		return -EINVAL;  in b53_serdes_init()
221 	id0 = b53_serdes_read(dev, lane, B53_SERDES_ID0, SERDES_ID0);  in b53_serdes_init()
222 	msb = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_PHYSID1),  in b53_serdes_init()
224 	lsb = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_PHYSID2),  in b53_serdes_init()
227 		dev_err(dev->dev, "SerDes not initialized, check settings\n");  in b53_serdes_init()
228 		return -ENODEV;  in b53_serdes_init()
231 	dev_info(dev->dev,  in b53_serdes_init()
232 		 "SerDes lane %d, model: %d, rev %c%d (OUI: 0x%08x)\n",  in b53_serdes_init()
233 		 lane, id0 & SERDES_ID0_MODEL_MASK,  in b53_serdes_init()
238 	pcs = &dev->pcs[lane];  in b53_serdes_init()
239 	pcs->dev = dev;  in b53_serdes_init()
240 	pcs->lane = lane;  in b53_serdes_init()
241 	pcs->pcs.ops = &b53_pcs_ops;  in b53_serdes_init()
242 	pcs->pcs.neg_mode = true;  in b53_serdes_init()
250 MODULE_LICENSE("Dual BSD/GPL");