61 	u32 txctrl;	/* 0x200 */  member
486 	grcan_clear_bits(&regs->txctrl, GRCAN_TXCTRL_ENABLE);  in grcan_stop_hardware()
545 	if (unlikely(grcan_read_bits(&regs->txctrl, GRCAN_TXCTRL_ENABLE))) {  in grcan_lost_one_shot_frame()
565 			grcan_set_bits(&regs->txctrl, GRCAN_TXCTRL_ENABLE);  in grcan_lost_one_shot_frame()
855 		grcan_write_reg(&regs->txctrl, GRCAN_TXCTRL_ENABLE  in grcan_running_reset()
915 		grcan_clear_bits(&regs->txctrl, GRCAN_TXCTRL_ENABLE);  in grcan_initiate_running_reset()
979 	u32 confop, txctrl;  in grcan_start()  local
1005 	txctrl = GRCAN_TXCTRL_ENABLE  in grcan_start()
1008 	grcan_write_reg(&regs->txctrl, txctrl);  in grcan_start()
1283 		if (!grcan_read_bits(&regs->txctrl, GRCAN_TXCTRL_ONGOING) ||  in grcan_txbug_workaround()
1341 	u32 id, txwr, txrd, space, txctrl;  in grcan_start_xmit()  local
1407 	txctrl = grcan_read_reg(&regs->txctrl);  in grcan_start_xmit()
1408 	if (!(txctrl & GRCAN_TXCTRL_ENABLE))  in grcan_start_xmit()
1411 	if (oneshotmode && !(txctrl & GRCAN_TXCTRL_SINGLE))  in grcan_start_xmit()