Lines Matching +full:clock +full:- +full:detection +full:- +full:disable
1 /* SPDX-License-Identifier: GPL-2.0
2 * flexcan.c - FLEXCAN CAN controller driver
4 * Copyright (c) 2005-2006 Varma Electronics Oy
6 * Copyright (c) 2010-2017 Pengutronix, Marc Kleine-Budde <kernel@pengutronix.de>
10 * Based on code originally by Andrey Volkov <avolkov@varma-el.com>
17 #include <linux/can/rx-offload.h>
22 * SOC Version IP-Version Glitch- [TR]WRN_INT IRQ Err Memory err RTR rece- FD Mode MB
23 * Filter? connected? Passive detection ption in MB Supported?
41 /* Disable RX FIFO Global mask */
45 /* Disable non-correctable errors interrupt and freeze mode */
55 /* Support CAN-FD mode */
57 /* support memory detection and correction */
95 u8 clk_src; /* clock source of CAN Protocol Engine */
124 const u32 quirks = priv->devtype_data.quirks; in flexcan_supports_rx_mailbox()
132 const u32 quirks = priv->devtype_data.quirks; in flexcan_supports_rx_mailbox_rtr()
143 const u32 quirks = priv->devtype_data.quirks; in flexcan_supports_rx_fifo()
151 const u32 quirks = priv->devtype_data.quirks; in flexcan_active_rx_rtr()
157 /* RX-FIFO is always RTR capable */ in flexcan_active_rx_rtr()