Lines Matching full:eraseblocks
20 erase counter value and the lowest erase counter value of eraseblocks
23 counter to eraseblocks with high erase counter.
32 int "Maximum expected bad eraseblock count per 1024 eraseblocks"
36 This option specifies the maximum bad physical eraseblocks UBI
37 expects on the MTD device (per 1024 eraseblocks). If the underlying
38 flash does not admit of bad eraseblocks (e.g. NOR flash), this value
43 expected bad eraseblocks per 1024 eraseblocks then can be calculated
45 (MaxNVB is basically the total count of eraseblocks on the chip).
48 about 1.9% of physical eraseblocks for bad blocks handling. And that
49 will be 1.9% of eraseblocks on the entire NAND chip, not just the MTD
51 flash chip admits maximum 40 bad eraseblocks, and it is split on two
52 MTD partitions of the same size, UBI will reserve 40 eraseblocks when
98 UBI driver will transparently handle things like bad eraseblocks and