Lines Matching +full:stm32mp1 +full:- +full:fmc2 +full:- +full:ebi
1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/dma-mapping.h>
55 /* FMC2 Controller Registers */
294 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_timings_init()
296 struct stm32_fmc2_timings *timings = &nand->timings; in stm32_fmc2_nfc_timings_init()
300 regmap_update_bits(nfc->regmap, FMC2_PCR, in stm32_fmc2_nfc_timings_init()
302 FIELD_PREP(FMC2_PCR_TCLR, timings->tclr) | in stm32_fmc2_nfc_timings_init()
303 FIELD_PREP(FMC2_PCR_TAR, timings->tar)); in stm32_fmc2_nfc_timings_init()
306 pmem = FIELD_PREP(FMC2_PMEM_MEMSET, timings->tset_mem); in stm32_fmc2_nfc_timings_init()
307 pmem |= FIELD_PREP(FMC2_PMEM_MEMWAIT, timings->twait); in stm32_fmc2_nfc_timings_init()
308 pmem |= FIELD_PREP(FMC2_PMEM_MEMHOLD, timings->thold_mem); in stm32_fmc2_nfc_timings_init()
309 pmem |= FIELD_PREP(FMC2_PMEM_MEMHIZ, timings->thiz); in stm32_fmc2_nfc_timings_init()
310 regmap_write(nfc->regmap, FMC2_PMEM, pmem); in stm32_fmc2_nfc_timings_init()
313 patt = FIELD_PREP(FMC2_PATT_ATTSET, timings->tset_att); in stm32_fmc2_nfc_timings_init()
314 patt |= FIELD_PREP(FMC2_PATT_ATTWAIT, timings->twait); in stm32_fmc2_nfc_timings_init()
315 patt |= FIELD_PREP(FMC2_PATT_ATTHOLD, timings->thold_att); in stm32_fmc2_nfc_timings_init()
316 patt |= FIELD_PREP(FMC2_PATT_ATTHIZ, timings->thiz); in stm32_fmc2_nfc_timings_init()
317 regmap_write(nfc->regmap, FMC2_PATT, patt); in stm32_fmc2_nfc_timings_init()
322 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_setup()
328 if (chip->ecc.strength == FMC2_ECC_BCH8) { in stm32_fmc2_nfc_setup()
331 } else if (chip->ecc.strength == FMC2_ECC_BCH4) { in stm32_fmc2_nfc_setup()
337 if (chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_setup()
344 regmap_update_bits(nfc->regmap, FMC2_PCR, pcr_mask, pcr); in stm32_fmc2_nfc_setup()
349 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_select_chip()
354 if (nand->cs_used[chipnr] == nfc->cs_sel) in stm32_fmc2_nfc_select_chip()
357 nfc->cs_sel = nand->cs_used[chipnr]; in stm32_fmc2_nfc_select_chip()
361 if (nfc->dma_tx_ch) { in stm32_fmc2_nfc_select_chip()
363 dma_cfg.dst_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
365 dma_cfg.dst_maxburst = nfc->tx_dma_max_burst / in stm32_fmc2_nfc_select_chip()
368 ret = dmaengine_slave_config(nfc->dma_tx_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
370 dev_err(nfc->dev, "tx DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
375 if (nfc->dma_rx_ch) { in stm32_fmc2_nfc_select_chip()
377 dma_cfg.src_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
379 dma_cfg.src_maxburst = nfc->rx_dma_max_burst / in stm32_fmc2_nfc_select_chip()
382 ret = dmaengine_slave_config(nfc->dma_rx_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
384 dev_err(nfc->dev, "rx DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
389 if (nfc->dma_ecc_ch) { in stm32_fmc2_nfc_select_chip()
395 dma_cfg.src_addr = nfc->io_phys_addr; in stm32_fmc2_nfc_select_chip()
396 dma_cfg.src_addr += chip->ecc.strength == FMC2_ECC_HAM ? in stm32_fmc2_nfc_select_chip()
400 ret = dmaengine_slave_config(nfc->dma_ecc_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
402 dev_err(nfc->dev, "ECC DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
407 nfc->dma_ecc_len = chip->ecc.strength == FMC2_ECC_HAM ? in stm32_fmc2_nfc_select_chip()
421 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_PWID, pcr); in stm32_fmc2_nfc_set_buswidth_16()
426 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_ECCEN, in stm32_fmc2_nfc_set_ecc()
432 nfc->irq_state = FMC2_IRQ_SEQ; in stm32_fmc2_nfc_enable_seq_irq()
434 regmap_update_bits(nfc->regmap, FMC2_CSQIER, in stm32_fmc2_nfc_enable_seq_irq()
440 regmap_update_bits(nfc->regmap, FMC2_CSQIER, FMC2_CSQIER_TCIE, 0); in stm32_fmc2_nfc_disable_seq_irq()
442 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_seq_irq()
447 regmap_write(nfc->regmap, FMC2_CSQICR, FMC2_CSQICR_CLEAR_IRQ); in stm32_fmc2_nfc_clear_seq_irq()
452 nfc->irq_state = FMC2_IRQ_BCH; in stm32_fmc2_nfc_enable_bch_irq()
455 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_enable_bch_irq()
458 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_enable_bch_irq()
464 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_disable_bch_irq()
467 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_bch_irq()
472 regmap_write(nfc->regmap, FMC2_BCHICR, FMC2_BCHICR_CLEAR_IRQ); in stm32_fmc2_nfc_clear_bch_irq()
481 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_hwctl()
485 if (chip->ecc.strength != FMC2_ECC_HAM) { in stm32_fmc2_nfc_hwctl()
486 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_WEN, in stm32_fmc2_nfc_hwctl()
489 reinit_completion(&nfc->complete); in stm32_fmc2_nfc_hwctl()
500 * max of 1-bit)
512 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_ham_calculate()
516 ret = regmap_read_poll_timeout(nfc->regmap, FMC2_SR, sr, in stm32_fmc2_nfc_ham_calculate()
520 dev_err(nfc->dev, "ham timeout\n"); in stm32_fmc2_nfc_ham_calculate()
524 regmap_read(nfc->regmap, FMC2_HECCR, &heccr); in stm32_fmc2_nfc_ham_calculate()
557 return -EBADMSG; in stm32_fmc2_nfc_ham_correct()
573 return -EBADMSG; in stm32_fmc2_nfc_ham_correct()
588 * max of 4-bit/8-bit)
593 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_bch_calculate()
597 if (!wait_for_completion_timeout(&nfc->complete, in stm32_fmc2_nfc_bch_calculate()
599 dev_err(nfc->dev, "bch timeout\n"); in stm32_fmc2_nfc_bch_calculate()
601 return -ETIMEDOUT; in stm32_fmc2_nfc_bch_calculate()
605 regmap_read(nfc->regmap, FMC2_BCHPBR1, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
611 regmap_read(nfc->regmap, FMC2_BCHPBR2, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
616 if (chip->ecc.strength == FMC2_ECC_BCH8) { in stm32_fmc2_nfc_bch_calculate()
619 regmap_read(nfc->regmap, FMC2_BCHPBR3, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
625 regmap_read(nfc->regmap, FMC2_BCHPBR4, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
651 return -EBADMSG; in stm32_fmc2_nfc_bch_decode()
676 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_bch_correct()
680 if (!wait_for_completion_timeout(&nfc->complete, in stm32_fmc2_nfc_bch_correct()
682 dev_err(nfc->dev, "bch timeout\n"); in stm32_fmc2_nfc_bch_correct()
684 return -ETIMEDOUT; in stm32_fmc2_nfc_bch_correct()
687 regmap_bulk_read(nfc->regmap, FMC2_BCHDSR0, ecc_sta, 5); in stm32_fmc2_nfc_bch_correct()
691 return stm32_fmc2_nfc_bch_decode(chip->ecc.size, dat, ecc_sta); in stm32_fmc2_nfc_bch_correct()
698 int ret, i, s, stat, eccsize = chip->ecc.size; in stm32_fmc2_nfc_read_page()
699 int eccbytes = chip->ecc.bytes; in stm32_fmc2_nfc_read_page()
700 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_read_page()
701 int eccstrength = chip->ecc.strength; in stm32_fmc2_nfc_read_page()
703 u8 *ecc_calc = chip->ecc.calc_buf; in stm32_fmc2_nfc_read_page()
704 u8 *ecc_code = chip->ecc.code_buf; in stm32_fmc2_nfc_read_page()
711 for (i = mtd->writesize + FMC2_BBM_LEN, s = 0; s < eccsteps; in stm32_fmc2_nfc_read_page()
713 chip->ecc.hwctl(chip, NAND_ECC_READ); in stm32_fmc2_nfc_read_page()
728 stat = chip->ecc.correct(chip, p, ecc_code, ecc_calc); in stm32_fmc2_nfc_read_page()
729 if (stat == -EBADMSG) in stm32_fmc2_nfc_read_page()
737 mtd->ecc_stats.failed++; in stm32_fmc2_nfc_read_page()
739 mtd->ecc_stats.corrected += stat; in stm32_fmc2_nfc_read_page()
746 ret = nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_read_page()
747 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_read_page()
760 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_rw_page_init()
762 u32 ecc_offset = mtd->writesize + FMC2_BBM_LEN; in stm32_fmc2_nfc_rw_page_init()
769 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_WEN, in stm32_fmc2_nfc_rw_page_init()
773 * - Set Program Page/Page Read command in stm32_fmc2_nfc_rw_page_init()
774 * - Enable DMA request data in stm32_fmc2_nfc_rw_page_init()
775 * - Set timings in stm32_fmc2_nfc_rw_page_init()
787 * - Set Random Data Input/Random Data Read command in stm32_fmc2_nfc_rw_page_init()
788 * - Enable the sequencer to access the Spare data area in stm32_fmc2_nfc_rw_page_init()
789 * - Enable DMA request status decoding for read in stm32_fmc2_nfc_rw_page_init()
790 * - Set timings in stm32_fmc2_nfc_rw_page_init()
806 * - Set the number of sectors to be written in stm32_fmc2_nfc_rw_page_init()
807 * - Set timings in stm32_fmc2_nfc_rw_page_init()
809 cfg[2] = FIELD_PREP(FMC2_CSQCFGR3_SNBR, chip->ecc.steps - 1); in stm32_fmc2_nfc_rw_page_init()
812 if (chip->options & NAND_ROW_ADDR_3) in stm32_fmc2_nfc_rw_page_init()
827 * - Set chip enable number in stm32_fmc2_nfc_rw_page_init()
828 * - Set ECC byte offset in the spare area in stm32_fmc2_nfc_rw_page_init()
829 * - Calculate the number of address cycles to be issued in stm32_fmc2_nfc_rw_page_init()
830 * - Set byte 5 of address cycle if needed in stm32_fmc2_nfc_rw_page_init()
832 cfg[4] = FIELD_PREP(FMC2_CSQCAR2_NANDCEN, nfc->cs_sel); in stm32_fmc2_nfc_rw_page_init()
833 if (chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_rw_page_init()
837 if (chip->options & NAND_ROW_ADDR_3) { in stm32_fmc2_nfc_rw_page_init()
844 regmap_bulk_write(nfc->regmap, FMC2_CSQCFGR1, cfg, 5); in stm32_fmc2_nfc_rw_page_init()
856 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_xfer()
859 struct dma_chan *dma_ch = nfc->dma_rx_ch; in stm32_fmc2_nfc_xfer()
862 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_xfer()
863 int eccsize = chip->ecc.size; in stm32_fmc2_nfc_xfer()
872 dma_ch = nfc->dma_tx_ch; in stm32_fmc2_nfc_xfer()
875 for_each_sg(nfc->dma_data_sg.sgl, sg, eccsteps, s) { in stm32_fmc2_nfc_xfer()
880 ret = dma_map_sg(nfc->dev, nfc->dma_data_sg.sgl, in stm32_fmc2_nfc_xfer()
883 return -EIO; in stm32_fmc2_nfc_xfer()
885 desc_data = dmaengine_prep_slave_sg(dma_ch, nfc->dma_data_sg.sgl, in stm32_fmc2_nfc_xfer()
889 ret = -ENOMEM; in stm32_fmc2_nfc_xfer()
893 reinit_completion(&nfc->dma_data_complete); in stm32_fmc2_nfc_xfer()
894 reinit_completion(&nfc->complete); in stm32_fmc2_nfc_xfer()
895 desc_data->callback = stm32_fmc2_nfc_dma_callback; in stm32_fmc2_nfc_xfer()
896 desc_data->callback_param = &nfc->dma_data_complete; in stm32_fmc2_nfc_xfer()
905 p = nfc->ecc_buf; in stm32_fmc2_nfc_xfer()
906 for_each_sg(nfc->dma_ecc_sg.sgl, sg, eccsteps, s) { in stm32_fmc2_nfc_xfer()
907 sg_set_buf(sg, p, nfc->dma_ecc_len); in stm32_fmc2_nfc_xfer()
908 p += nfc->dma_ecc_len; in stm32_fmc2_nfc_xfer()
911 ret = dma_map_sg(nfc->dev, nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
914 ret = -EIO; in stm32_fmc2_nfc_xfer()
918 desc_ecc = dmaengine_prep_slave_sg(nfc->dma_ecc_ch, in stm32_fmc2_nfc_xfer()
919 nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
923 ret = -ENOMEM; in stm32_fmc2_nfc_xfer()
927 reinit_completion(&nfc->dma_ecc_complete); in stm32_fmc2_nfc_xfer()
928 desc_ecc->callback = stm32_fmc2_nfc_dma_callback; in stm32_fmc2_nfc_xfer()
929 desc_ecc->callback_param = &nfc->dma_ecc_complete; in stm32_fmc2_nfc_xfer()
934 dma_async_issue_pending(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
941 regmap_update_bits(nfc->regmap, FMC2_CSQCR, in stm32_fmc2_nfc_xfer()
945 if (!wait_for_completion_timeout(&nfc->complete, timeout)) { in stm32_fmc2_nfc_xfer()
946 dev_err(nfc->dev, "seq timeout\n"); in stm32_fmc2_nfc_xfer()
950 dmaengine_terminate_all(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
951 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
956 if (!wait_for_completion_timeout(&nfc->dma_data_complete, timeout)) { in stm32_fmc2_nfc_xfer()
957 dev_err(nfc->dev, "data DMA timeout\n"); in stm32_fmc2_nfc_xfer()
959 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
964 if (!wait_for_completion_timeout(&nfc->dma_ecc_complete, in stm32_fmc2_nfc_xfer()
966 dev_err(nfc->dev, "ECC DMA timeout\n"); in stm32_fmc2_nfc_xfer()
967 dmaengine_terminate_all(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
968 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
974 dma_unmap_sg(nfc->dev, nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
978 dma_unmap_sg(nfc->dev, nfc->dma_data_sg.sgl, eccsteps, dma_data_dir); in stm32_fmc2_nfc_xfer()
999 ret = nand_change_write_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_write()
1000 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_seq_write()
1014 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_write_page()
1027 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_write_page_raw()
1039 regmap_read(nfc->regmap, FMC2_CSQEMSR, &csqemsr); in stm32_fmc2_nfc_get_mapping_status()
1048 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_seq_correct()
1049 int eccbytes = chip->ecc.bytes; in stm32_fmc2_nfc_seq_correct()
1050 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_seq_correct()
1051 int eccstrength = chip->ecc.strength; in stm32_fmc2_nfc_seq_correct()
1052 int i, s, eccsize = chip->ecc.size; in stm32_fmc2_nfc_seq_correct()
1053 u32 *ecc_sta = (u32 *)nfc->ecc_buf; in stm32_fmc2_nfc_seq_correct()
1084 if (stat == -EBADMSG) in stm32_fmc2_nfc_seq_correct()
1093 mtd->ecc_stats.failed++; in stm32_fmc2_nfc_seq_correct()
1095 mtd->ecc_stats.corrected += stat; in stm32_fmc2_nfc_seq_correct()
1107 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_seq_read_page()
1108 u8 *ecc_calc = chip->ecc.calc_buf; in stm32_fmc2_nfc_seq_read_page()
1109 u8 *ecc_code = chip->ecc.code_buf; in stm32_fmc2_nfc_seq_read_page()
1113 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_read_page()
1130 return nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page()
1131 chip->oob_poi, in stm32_fmc2_nfc_seq_read_page()
1132 mtd->oobsize, false); in stm32_fmc2_nfc_seq_read_page()
1138 ret = nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page()
1139 chip->oob_poi, mtd->oobsize, false); in stm32_fmc2_nfc_seq_read_page()
1143 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in stm32_fmc2_nfc_seq_read_page()
1144 chip->ecc.total); in stm32_fmc2_nfc_seq_read_page()
1149 return chip->ecc.correct(chip, buf, ecc_code, ecc_calc); in stm32_fmc2_nfc_seq_read_page()
1158 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_read_page_raw()
1172 return nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page_raw()
1173 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_seq_read_page_raw()
1183 if (nfc->irq_state == FMC2_IRQ_SEQ) in stm32_fmc2_nfc_irq()
1186 else if (nfc->irq_state == FMC2_IRQ_BCH) in stm32_fmc2_nfc_irq()
1190 complete(&nfc->complete); in stm32_fmc2_nfc_irq()
1198 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_read_data()
1199 void __iomem *io_addr_r = nfc->data_base[nfc->cs_sel]; in stm32_fmc2_nfc_read_data()
1201 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_read_data()
1202 /* Reconfigure bus width to 8-bit */ in stm32_fmc2_nfc_read_data()
1209 len -= sizeof(u8); in stm32_fmc2_nfc_read_data()
1216 len -= sizeof(u16); in stm32_fmc2_nfc_read_data()
1224 len -= sizeof(u32); in stm32_fmc2_nfc_read_data()
1231 len -= sizeof(u16); in stm32_fmc2_nfc_read_data()
1237 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_read_data()
1238 /* Reconfigure bus width to 16-bit */ in stm32_fmc2_nfc_read_data()
1245 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_write_data()
1246 void __iomem *io_addr_w = nfc->data_base[nfc->cs_sel]; in stm32_fmc2_nfc_write_data()
1248 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_write_data()
1249 /* Reconfigure bus width to 8-bit */ in stm32_fmc2_nfc_write_data()
1256 len -= sizeof(u8); in stm32_fmc2_nfc_write_data()
1263 len -= sizeof(u16); in stm32_fmc2_nfc_write_data()
1271 len -= sizeof(u32); in stm32_fmc2_nfc_write_data()
1278 len -= sizeof(u16); in stm32_fmc2_nfc_write_data()
1284 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_write_data()
1285 /* Reconfigure bus width to 16-bit */ in stm32_fmc2_nfc_write_data()
1292 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_waitrdy()
1297 if (regmap_read_poll_timeout(nfc->regmap, FMC2_SR, sr, in stm32_fmc2_nfc_waitrdy()
1300 dev_warn(nfc->dev, "Waitrdy timeout\n"); in stm32_fmc2_nfc_waitrdy()
1304 ndelay(PSEC_TO_NSEC(timings->tWB_max)); in stm32_fmc2_nfc_waitrdy()
1307 regmap_write(nfc->regmap, FMC2_ICR, FMC2_ICR_CIHLF); in stm32_fmc2_nfc_waitrdy()
1310 return regmap_read_poll_timeout(nfc->regmap, FMC2_ISR, isr, in stm32_fmc2_nfc_waitrdy()
1319 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_exec_op()
1327 ret = stm32_fmc2_nfc_select_chip(chip, op->cs); in stm32_fmc2_nfc_exec_op()
1331 for (op_id = 0; op_id < op->ninstrs; op_id++) { in stm32_fmc2_nfc_exec_op()
1332 instr = &op->instrs[op_id]; in stm32_fmc2_nfc_exec_op()
1334 switch (instr->type) { in stm32_fmc2_nfc_exec_op()
1336 writeb_relaxed(instr->ctx.cmd.opcode, in stm32_fmc2_nfc_exec_op()
1337 nfc->cmd_base[nfc->cs_sel]); in stm32_fmc2_nfc_exec_op()
1341 for (i = 0; i < instr->ctx.addr.naddrs; i++) in stm32_fmc2_nfc_exec_op()
1342 writeb_relaxed(instr->ctx.addr.addrs[i], in stm32_fmc2_nfc_exec_op()
1343 nfc->addr_base[nfc->cs_sel]); in stm32_fmc2_nfc_exec_op()
1347 stm32_fmc2_nfc_read_data(chip, instr->ctx.data.buf.in, in stm32_fmc2_nfc_exec_op()
1348 instr->ctx.data.len, in stm32_fmc2_nfc_exec_op()
1349 instr->ctx.data.force_8bit); in stm32_fmc2_nfc_exec_op()
1353 stm32_fmc2_nfc_write_data(chip, instr->ctx.data.buf.out, in stm32_fmc2_nfc_exec_op()
1354 instr->ctx.data.len, in stm32_fmc2_nfc_exec_op()
1355 instr->ctx.data.force_8bit); in stm32_fmc2_nfc_exec_op()
1359 timeout = instr->ctx.waitrdy.timeout_ms; in stm32_fmc2_nfc_exec_op()
1372 regmap_read(nfc->regmap, FMC2_PCR, &pcr); in stm32_fmc2_nfc_init()
1375 nfc->cs_sel = -1; in stm32_fmc2_nfc_init()
1402 /* Enable FMC2 controller */ in stm32_fmc2_nfc_init()
1403 if (nfc->dev == nfc->cdev) in stm32_fmc2_nfc_init()
1404 regmap_update_bits(nfc->regmap, FMC2_BCR1, in stm32_fmc2_nfc_init()
1407 regmap_write(nfc->regmap, FMC2_PCR, pcr); in stm32_fmc2_nfc_init()
1408 regmap_write(nfc->regmap, FMC2_PMEM, FMC2_PMEM_DEFAULT); in stm32_fmc2_nfc_init()
1409 regmap_write(nfc->regmap, FMC2_PATT, FMC2_PATT_DEFAULT); in stm32_fmc2_nfc_init()
1415 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_calc_timings()
1417 struct stm32_fmc2_timings *tims = &nand->timings; in stm32_fmc2_nfc_calc_timings()
1418 unsigned long hclk = clk_get_rate(nfc->clk); in stm32_fmc2_nfc_calc_timings()
1423 tar = max_t(unsigned long, hclkp, sdrt->tAR_min); in stm32_fmc2_nfc_calc_timings()
1424 timing = DIV_ROUND_UP(tar, hclkp) - 1; in stm32_fmc2_nfc_calc_timings()
1425 tims->tar = min_t(unsigned long, timing, FMC2_PCR_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1427 tclr = max_t(unsigned long, hclkp, sdrt->tCLR_min); in stm32_fmc2_nfc_calc_timings()
1428 timing = DIV_ROUND_UP(tclr, hclkp) - 1; in stm32_fmc2_nfc_calc_timings()
1429 tims->tclr = min_t(unsigned long, timing, FMC2_PCR_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1431 tims->thiz = FMC2_THIZ; in stm32_fmc2_nfc_calc_timings()
1432 thiz = (tims->thiz + 1) * hclkp; in stm32_fmc2_nfc_calc_timings()
1439 twait = max_t(unsigned long, hclkp, sdrt->tRP_min); in stm32_fmc2_nfc_calc_timings()
1440 twait = max_t(unsigned long, twait, sdrt->tWP_min); in stm32_fmc2_nfc_calc_timings()
1441 twait = max_t(unsigned long, twait, sdrt->tREA_max + FMC2_TIO); in stm32_fmc2_nfc_calc_timings()
1443 tims->twait = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1446 * tSETUP_MEM > tCS - tWAIT in stm32_fmc2_nfc_calc_timings()
1447 * tSETUP_MEM > tALS - tWAIT in stm32_fmc2_nfc_calc_timings()
1448 * tSETUP_MEM > tDS - (tWAIT - tHIZ) in stm32_fmc2_nfc_calc_timings()
1451 if (sdrt->tCS_min > twait && (tset_mem < sdrt->tCS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1452 tset_mem = sdrt->tCS_min - twait; in stm32_fmc2_nfc_calc_timings()
1453 if (sdrt->tALS_min > twait && (tset_mem < sdrt->tALS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1454 tset_mem = sdrt->tALS_min - twait; in stm32_fmc2_nfc_calc_timings()
1455 if (twait > thiz && (sdrt->tDS_min > twait - thiz) && in stm32_fmc2_nfc_calc_timings()
1456 (tset_mem < sdrt->tDS_min - (twait - thiz))) in stm32_fmc2_nfc_calc_timings()
1457 tset_mem = sdrt->tDS_min - (twait - thiz); in stm32_fmc2_nfc_calc_timings()
1459 tims->tset_mem = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1463 * tHOLD_MEM > tREH - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1464 * tHOLD_MEM > max(tRC, tWC) - (tSETUP_MEM + tWAIT) in stm32_fmc2_nfc_calc_timings()
1466 thold_mem = max_t(unsigned long, hclkp, sdrt->tCH_min); in stm32_fmc2_nfc_calc_timings()
1467 if (sdrt->tREH_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1468 (thold_mem < sdrt->tREH_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1469 thold_mem = sdrt->tREH_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1470 if ((sdrt->tRC_min > tset_mem + twait) && in stm32_fmc2_nfc_calc_timings()
1471 (thold_mem < sdrt->tRC_min - (tset_mem + twait))) in stm32_fmc2_nfc_calc_timings()
1472 thold_mem = sdrt->tRC_min - (tset_mem + twait); in stm32_fmc2_nfc_calc_timings()
1473 if ((sdrt->tWC_min > tset_mem + twait) && in stm32_fmc2_nfc_calc_timings()
1474 (thold_mem < sdrt->tWC_min - (tset_mem + twait))) in stm32_fmc2_nfc_calc_timings()
1475 thold_mem = sdrt->tWC_min - (tset_mem + twait); in stm32_fmc2_nfc_calc_timings()
1477 tims->thold_mem = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1480 * tSETUP_ATT > tCS - tWAIT in stm32_fmc2_nfc_calc_timings()
1481 * tSETUP_ATT > tCLS - tWAIT in stm32_fmc2_nfc_calc_timings()
1482 * tSETUP_ATT > tALS - tWAIT in stm32_fmc2_nfc_calc_timings()
1483 * tSETUP_ATT > tRHW - tHOLD_MEM in stm32_fmc2_nfc_calc_timings()
1484 * tSETUP_ATT > tDS - (tWAIT - tHIZ) in stm32_fmc2_nfc_calc_timings()
1487 if (sdrt->tCS_min > twait && (tset_att < sdrt->tCS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1488 tset_att = sdrt->tCS_min - twait; in stm32_fmc2_nfc_calc_timings()
1489 if (sdrt->tCLS_min > twait && (tset_att < sdrt->tCLS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1490 tset_att = sdrt->tCLS_min - twait; in stm32_fmc2_nfc_calc_timings()
1491 if (sdrt->tALS_min > twait && (tset_att < sdrt->tALS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1492 tset_att = sdrt->tALS_min - twait; in stm32_fmc2_nfc_calc_timings()
1493 if (sdrt->tRHW_min > thold_mem && in stm32_fmc2_nfc_calc_timings()
1494 (tset_att < sdrt->tRHW_min - thold_mem)) in stm32_fmc2_nfc_calc_timings()
1495 tset_att = sdrt->tRHW_min - thold_mem; in stm32_fmc2_nfc_calc_timings()
1496 if (twait > thiz && (sdrt->tDS_min > twait - thiz) && in stm32_fmc2_nfc_calc_timings()
1497 (tset_att < sdrt->tDS_min - (twait - thiz))) in stm32_fmc2_nfc_calc_timings()
1498 tset_att = sdrt->tDS_min - (twait - thiz); in stm32_fmc2_nfc_calc_timings()
1500 tims->tset_att = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1508 * tHOLD_ATT > tWB + tIO + tSYNC - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1509 * tHOLD_ATT > tADL - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1510 * tHOLD_ATT > tWH - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1511 * tHOLD_ATT > tWHR - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1512 * tHOLD_ATT > tRC - (tSETUP_ATT + tWAIT) in stm32_fmc2_nfc_calc_timings()
1513 * tHOLD_ATT > tWC - (tSETUP_ATT + tWAIT) in stm32_fmc2_nfc_calc_timings()
1515 thold_att = max_t(unsigned long, hclkp, sdrt->tALH_min); in stm32_fmc2_nfc_calc_timings()
1516 thold_att = max_t(unsigned long, thold_att, sdrt->tCH_min); in stm32_fmc2_nfc_calc_timings()
1517 thold_att = max_t(unsigned long, thold_att, sdrt->tCLH_min); in stm32_fmc2_nfc_calc_timings()
1518 thold_att = max_t(unsigned long, thold_att, sdrt->tCOH_min); in stm32_fmc2_nfc_calc_timings()
1519 thold_att = max_t(unsigned long, thold_att, sdrt->tDH_min); in stm32_fmc2_nfc_calc_timings()
1520 if ((sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC > tset_mem) && in stm32_fmc2_nfc_calc_timings()
1521 (thold_att < sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1522 thold_att = sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem; in stm32_fmc2_nfc_calc_timings()
1523 if (sdrt->tADL_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1524 (thold_att < sdrt->tADL_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1525 thold_att = sdrt->tADL_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1526 if (sdrt->tWH_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1527 (thold_att < sdrt->tWH_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1528 thold_att = sdrt->tWH_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1529 if (sdrt->tWHR_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1530 (thold_att < sdrt->tWHR_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1531 thold_att = sdrt->tWHR_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1532 if ((sdrt->tRC_min > tset_att + twait) && in stm32_fmc2_nfc_calc_timings()
1533 (thold_att < sdrt->tRC_min - (tset_att + twait))) in stm32_fmc2_nfc_calc_timings()
1534 thold_att = sdrt->tRC_min - (tset_att + twait); in stm32_fmc2_nfc_calc_timings()
1535 if ((sdrt->tWC_min > tset_att + twait) && in stm32_fmc2_nfc_calc_timings()
1536 (thold_att < sdrt->tWC_min - (tset_att + twait))) in stm32_fmc2_nfc_calc_timings()
1537 thold_att = sdrt->tWC_min - (tset_att + twait); in stm32_fmc2_nfc_calc_timings()
1539 tims->thold_att = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1551 if (conf->timings.mode > 3) in stm32_fmc2_nfc_setup_interface()
1552 return -EOPNOTSUPP; in stm32_fmc2_nfc_setup_interface()
1568 nfc->dma_tx_ch = dma_request_chan(nfc->dev, "tx"); in stm32_fmc2_nfc_dma_setup()
1569 if (IS_ERR(nfc->dma_tx_ch)) { in stm32_fmc2_nfc_dma_setup()
1570 ret = PTR_ERR(nfc->dma_tx_ch); in stm32_fmc2_nfc_dma_setup()
1571 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1572 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1574 nfc->dma_tx_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1578 ret = dma_get_slave_caps(nfc->dma_tx_ch, &caps); in stm32_fmc2_nfc_dma_setup()
1581 nfc->tx_dma_max_burst = caps.max_burst; in stm32_fmc2_nfc_dma_setup()
1583 nfc->dma_rx_ch = dma_request_chan(nfc->dev, "rx"); in stm32_fmc2_nfc_dma_setup()
1584 if (IS_ERR(nfc->dma_rx_ch)) { in stm32_fmc2_nfc_dma_setup()
1585 ret = PTR_ERR(nfc->dma_rx_ch); in stm32_fmc2_nfc_dma_setup()
1586 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1587 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1589 nfc->dma_rx_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1593 ret = dma_get_slave_caps(nfc->dma_rx_ch, &caps); in stm32_fmc2_nfc_dma_setup()
1596 nfc->rx_dma_max_burst = caps.max_burst; in stm32_fmc2_nfc_dma_setup()
1598 nfc->dma_ecc_ch = dma_request_chan(nfc->dev, "ecc"); in stm32_fmc2_nfc_dma_setup()
1599 if (IS_ERR(nfc->dma_ecc_ch)) { in stm32_fmc2_nfc_dma_setup()
1600 ret = PTR_ERR(nfc->dma_ecc_ch); in stm32_fmc2_nfc_dma_setup()
1601 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1602 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1604 nfc->dma_ecc_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1608 ret = sg_alloc_table(&nfc->dma_ecc_sg, FMC2_MAX_SG, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1613 nfc->ecc_buf = devm_kzalloc(nfc->dev, FMC2_MAX_ECC_BUF_LEN, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1614 if (!nfc->ecc_buf) in stm32_fmc2_nfc_dma_setup()
1615 return -ENOMEM; in stm32_fmc2_nfc_dma_setup()
1617 ret = sg_alloc_table(&nfc->dma_data_sg, FMC2_MAX_SG, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1621 init_completion(&nfc->dma_data_complete); in stm32_fmc2_nfc_dma_setup()
1622 init_completion(&nfc->dma_ecc_complete); in stm32_fmc2_nfc_dma_setup()
1627 if (ret == -ENODEV) { in stm32_fmc2_nfc_dma_setup()
1628 dev_warn(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1638 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_nand_callbacks_setup()
1644 if (nfc->dma_tx_ch && nfc->dma_rx_ch && nfc->dma_ecc_ch) { in stm32_fmc2_nfc_nand_callbacks_setup()
1646 chip->ecc.correct = stm32_fmc2_nfc_seq_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1647 chip->ecc.write_page = stm32_fmc2_nfc_seq_write_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1648 chip->ecc.read_page = stm32_fmc2_nfc_seq_read_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1649 chip->ecc.write_page_raw = stm32_fmc2_nfc_seq_write_page_raw; in stm32_fmc2_nfc_nand_callbacks_setup()
1650 chip->ecc.read_page_raw = stm32_fmc2_nfc_seq_read_page_raw; in stm32_fmc2_nfc_nand_callbacks_setup()
1653 chip->ecc.hwctl = stm32_fmc2_nfc_hwctl; in stm32_fmc2_nfc_nand_callbacks_setup()
1654 if (chip->ecc.strength == FMC2_ECC_HAM) { in stm32_fmc2_nfc_nand_callbacks_setup()
1656 chip->ecc.calculate = stm32_fmc2_nfc_ham_calculate; in stm32_fmc2_nfc_nand_callbacks_setup()
1657 chip->ecc.correct = stm32_fmc2_nfc_ham_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1658 chip->ecc.options |= NAND_ECC_GENERIC_ERASED_CHECK; in stm32_fmc2_nfc_nand_callbacks_setup()
1661 chip->ecc.calculate = stm32_fmc2_nfc_bch_calculate; in stm32_fmc2_nfc_nand_callbacks_setup()
1662 chip->ecc.correct = stm32_fmc2_nfc_bch_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1663 chip->ecc.read_page = stm32_fmc2_nfc_read_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1668 if (chip->ecc.strength == FMC2_ECC_HAM) in stm32_fmc2_nfc_nand_callbacks_setup()
1669 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 4 : 3; in stm32_fmc2_nfc_nand_callbacks_setup()
1670 else if (chip->ecc.strength == FMC2_ECC_BCH8) in stm32_fmc2_nfc_nand_callbacks_setup()
1671 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 14 : 13; in stm32_fmc2_nfc_nand_callbacks_setup()
1673 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 8 : 7; in stm32_fmc2_nfc_nand_callbacks_setup()
1680 struct nand_ecc_ctrl *ecc = &chip->ecc; in stm32_fmc2_nfc_ooblayout_ecc()
1683 return -ERANGE; in stm32_fmc2_nfc_ooblayout_ecc()
1685 oobregion->length = ecc->total; in stm32_fmc2_nfc_ooblayout_ecc()
1686 oobregion->offset = FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_ecc()
1695 struct nand_ecc_ctrl *ecc = &chip->ecc; in stm32_fmc2_nfc_ooblayout_free()
1698 return -ERANGE; in stm32_fmc2_nfc_ooblayout_free()
1700 oobregion->length = mtd->oobsize - ecc->total - FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_free()
1701 oobregion->offset = ecc->total + FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_free()
1731 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_attach_chip()
1742 if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) { in stm32_fmc2_nfc_attach_chip()
1743 dev_err(nfc->dev, in stm32_fmc2_nfc_attach_chip()
1745 return -EINVAL; in stm32_fmc2_nfc_attach_chip()
1749 if (!chip->ecc.size) in stm32_fmc2_nfc_attach_chip()
1750 chip->ecc.size = FMC2_ECC_STEP_SIZE; in stm32_fmc2_nfc_attach_chip()
1752 if (!chip->ecc.strength) in stm32_fmc2_nfc_attach_chip()
1753 chip->ecc.strength = FMC2_ECC_BCH8; in stm32_fmc2_nfc_attach_chip()
1756 mtd->oobsize - FMC2_BBM_LEN); in stm32_fmc2_nfc_attach_chip()
1758 dev_err(nfc->dev, "no valid ECC settings set\n"); in stm32_fmc2_nfc_attach_chip()
1762 if (mtd->writesize / chip->ecc.size > FMC2_MAX_SG) { in stm32_fmc2_nfc_attach_chip()
1763 dev_err(nfc->dev, "nand page size is not supported\n"); in stm32_fmc2_nfc_attach_chip()
1764 return -EINVAL; in stm32_fmc2_nfc_attach_chip()
1767 if (chip->bbt_options & NAND_BBT_USE_FLASH) in stm32_fmc2_nfc_attach_chip()
1768 chip->bbt_options |= NAND_BBT_NO_OOB; in stm32_fmc2_nfc_attach_chip()
1787 if (nand->wp_gpio) in stm32_fmc2_nfc_wp_enable()
1788 gpiod_set_value(nand->wp_gpio, 1); in stm32_fmc2_nfc_wp_enable()
1793 if (nand->wp_gpio) in stm32_fmc2_nfc_wp_disable()
1794 gpiod_set_value(nand->wp_gpio, 0); in stm32_fmc2_nfc_wp_disable()
1800 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_parse_child()
1804 if (!of_get_property(dn, "reg", &nand->ncs)) in stm32_fmc2_nfc_parse_child()
1805 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1807 nand->ncs /= sizeof(u32); in stm32_fmc2_nfc_parse_child()
1808 if (!nand->ncs) { in stm32_fmc2_nfc_parse_child()
1809 dev_err(nfc->dev, "invalid reg property size\n"); in stm32_fmc2_nfc_parse_child()
1810 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1813 for (i = 0; i < nand->ncs; i++) { in stm32_fmc2_nfc_parse_child()
1816 dev_err(nfc->dev, "could not retrieve reg property: %d\n", in stm32_fmc2_nfc_parse_child()
1821 if (cs >= nfc->data->max_ncs) { in stm32_fmc2_nfc_parse_child()
1822 dev_err(nfc->dev, "invalid reg value: %d\n", cs); in stm32_fmc2_nfc_parse_child()
1823 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1826 if (nfc->cs_assigned & BIT(cs)) { in stm32_fmc2_nfc_parse_child()
1827 dev_err(nfc->dev, "cs already assigned: %d\n", cs); in stm32_fmc2_nfc_parse_child()
1828 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1831 nfc->cs_assigned |= BIT(cs); in stm32_fmc2_nfc_parse_child()
1832 nand->cs_used[i] = cs; in stm32_fmc2_nfc_parse_child()
1835 nand->wp_gpio = devm_fwnode_gpiod_get(nfc->dev, of_fwnode_handle(dn), in stm32_fmc2_nfc_parse_child()
1837 if (IS_ERR(nand->wp_gpio)) { in stm32_fmc2_nfc_parse_child()
1838 ret = PTR_ERR(nand->wp_gpio); in stm32_fmc2_nfc_parse_child()
1839 if (ret != -ENOENT) in stm32_fmc2_nfc_parse_child()
1840 return dev_err_probe(nfc->dev, ret, in stm32_fmc2_nfc_parse_child()
1843 nand->wp_gpio = NULL; in stm32_fmc2_nfc_parse_child()
1846 nand_set_flash_node(&nand->chip, dn); in stm32_fmc2_nfc_parse_child()
1853 struct device_node *dn = nfc->dev->of_node; in stm32_fmc2_nfc_parse_dt()
1858 dev_err(nfc->dev, "NAND chip not defined\n"); in stm32_fmc2_nfc_parse_dt()
1859 return -EINVAL; in stm32_fmc2_nfc_parse_dt()
1863 dev_err(nfc->dev, "too many NAND chips defined\n"); in stm32_fmc2_nfc_parse_dt()
1864 return -EINVAL; in stm32_fmc2_nfc_parse_dt()
1878 struct device *dev = nfc->dev; in stm32_fmc2_nfc_set_cdev()
1881 if (dev->parent && of_device_is_compatible(dev->parent->of_node, in stm32_fmc2_nfc_set_cdev()
1882 "st,stm32mp1-fmc2-ebi")) in stm32_fmc2_nfc_set_cdev()
1885 if (of_device_is_compatible(dev->of_node, "st,stm32mp1-fmc2-nfc")) { in stm32_fmc2_nfc_set_cdev()
1887 nfc->cdev = dev->parent; in stm32_fmc2_nfc_set_cdev()
1892 return -EINVAL; in stm32_fmc2_nfc_set_cdev()
1896 return -EINVAL; in stm32_fmc2_nfc_set_cdev()
1898 nfc->cdev = dev; in stm32_fmc2_nfc_set_cdev()
1905 struct device *dev = &pdev->dev; in stm32_fmc2_nfc_probe()
1918 return -ENOMEM; in stm32_fmc2_nfc_probe()
1920 nfc->dev = dev; in stm32_fmc2_nfc_probe()
1921 nand_controller_init(&nfc->base); in stm32_fmc2_nfc_probe()
1922 nfc->base.ops = &stm32_fmc2_nfc_controller_ops; in stm32_fmc2_nfc_probe()
1924 nfc->data = of_device_get_match_data(dev); in stm32_fmc2_nfc_probe()
1925 if (!nfc->data) in stm32_fmc2_nfc_probe()
1926 return -EINVAL; in stm32_fmc2_nfc_probe()
1928 if (nfc->data->set_cdev) { in stm32_fmc2_nfc_probe()
1929 ret = nfc->data->set_cdev(nfc); in stm32_fmc2_nfc_probe()
1933 nfc->cdev = dev->parent; in stm32_fmc2_nfc_probe()
1940 ret = of_address_to_resource(nfc->cdev->of_node, 0, &cres); in stm32_fmc2_nfc_probe()
1944 nfc->io_phys_addr = cres.start; in stm32_fmc2_nfc_probe()
1946 nfc->regmap = device_node_to_regmap(nfc->cdev->of_node); in stm32_fmc2_nfc_probe()
1947 if (IS_ERR(nfc->regmap)) in stm32_fmc2_nfc_probe()
1948 return PTR_ERR(nfc->regmap); in stm32_fmc2_nfc_probe()
1950 if (nfc->dev == nfc->cdev) in stm32_fmc2_nfc_probe()
1953 for (chip_cs = 0, mem_region = start_region; chip_cs < nfc->data->max_ncs; in stm32_fmc2_nfc_probe()
1955 if (!(nfc->cs_assigned & BIT(chip_cs))) in stm32_fmc2_nfc_probe()
1958 nfc->data_base[chip_cs] = devm_platform_get_and_ioremap_resource(pdev, in stm32_fmc2_nfc_probe()
1960 if (IS_ERR(nfc->data_base[chip_cs])) in stm32_fmc2_nfc_probe()
1961 return PTR_ERR(nfc->data_base[chip_cs]); in stm32_fmc2_nfc_probe()
1963 nfc->data_phys_addr[chip_cs] = res->start; in stm32_fmc2_nfc_probe()
1965 nfc->cmd_base[chip_cs] = devm_platform_ioremap_resource(pdev, mem_region + 1); in stm32_fmc2_nfc_probe()
1966 if (IS_ERR(nfc->cmd_base[chip_cs])) in stm32_fmc2_nfc_probe()
1967 return PTR_ERR(nfc->cmd_base[chip_cs]); in stm32_fmc2_nfc_probe()
1969 nfc->addr_base[chip_cs] = devm_platform_ioremap_resource(pdev, mem_region + 2); in stm32_fmc2_nfc_probe()
1970 if (IS_ERR(nfc->addr_base[chip_cs])) in stm32_fmc2_nfc_probe()
1971 return PTR_ERR(nfc->addr_base[chip_cs]); in stm32_fmc2_nfc_probe()
1985 init_completion(&nfc->complete); in stm32_fmc2_nfc_probe()
1987 nfc->clk = devm_clk_get_enabled(nfc->cdev, NULL); in stm32_fmc2_nfc_probe()
1988 if (IS_ERR(nfc->clk)) { in stm32_fmc2_nfc_probe()
1990 return PTR_ERR(nfc->clk); in stm32_fmc2_nfc_probe()
1996 if (ret == -EPROBE_DEFER) in stm32_fmc2_nfc_probe()
2009 nand = &nfc->nand; in stm32_fmc2_nfc_probe()
2010 chip = &nand->chip; in stm32_fmc2_nfc_probe()
2012 mtd->dev.parent = dev; in stm32_fmc2_nfc_probe()
2014 chip->controller = &nfc->base; in stm32_fmc2_nfc_probe()
2015 chip->options |= NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE | in stm32_fmc2_nfc_probe()
2021 ret = nand_scan(chip, nand->ncs); in stm32_fmc2_nfc_probe()
2040 if (nfc->dma_ecc_ch) in stm32_fmc2_nfc_probe()
2041 dma_release_channel(nfc->dma_ecc_ch); in stm32_fmc2_nfc_probe()
2042 if (nfc->dma_tx_ch) in stm32_fmc2_nfc_probe()
2043 dma_release_channel(nfc->dma_tx_ch); in stm32_fmc2_nfc_probe()
2044 if (nfc->dma_rx_ch) in stm32_fmc2_nfc_probe()
2045 dma_release_channel(nfc->dma_rx_ch); in stm32_fmc2_nfc_probe()
2047 sg_free_table(&nfc->dma_data_sg); in stm32_fmc2_nfc_probe()
2048 sg_free_table(&nfc->dma_ecc_sg); in stm32_fmc2_nfc_probe()
2056 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_remove()
2057 struct nand_chip *chip = &nand->chip; in stm32_fmc2_nfc_remove()
2064 if (nfc->dma_ecc_ch) in stm32_fmc2_nfc_remove()
2065 dma_release_channel(nfc->dma_ecc_ch); in stm32_fmc2_nfc_remove()
2066 if (nfc->dma_tx_ch) in stm32_fmc2_nfc_remove()
2067 dma_release_channel(nfc->dma_tx_ch); in stm32_fmc2_nfc_remove()
2068 if (nfc->dma_rx_ch) in stm32_fmc2_nfc_remove()
2069 dma_release_channel(nfc->dma_rx_ch); in stm32_fmc2_nfc_remove()
2071 sg_free_table(&nfc->dma_data_sg); in stm32_fmc2_nfc_remove()
2072 sg_free_table(&nfc->dma_ecc_sg); in stm32_fmc2_nfc_remove()
2080 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_suspend()
2082 clk_disable_unprepare(nfc->clk); in stm32_fmc2_nfc_suspend()
2094 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_resume()
2099 ret = clk_prepare_enable(nfc->clk); in stm32_fmc2_nfc_resume()
2109 for (chip_cs = 0; chip_cs < nfc->data->max_ncs; chip_cs++) { in stm32_fmc2_nfc_resume()
2110 if (!(nfc->cs_assigned & BIT(chip_cs))) in stm32_fmc2_nfc_resume()
2113 nand_reset(&nand->chip, chip_cs); in stm32_fmc2_nfc_resume()
2133 .compatible = "st,stm32mp15-fmc2",
2137 .compatible = "st,stm32mp1-fmc2-nfc",
2141 .compatible = "st,stm32mp25-fmc2-nfc",
2161 MODULE_DESCRIPTION("STMicroelectronics STM32 FMC2 NFC driver");