17 /* ECC Status Read Command for BENAND */
20 /* ECC Status Mask for BENAND */
26 /* Max ECC Steps for BENAND */
40 			NAND_OP_8BIT_DATA_IN(chip->ecc.steps, ecc_status, 0),  in toshiba_nand_benand_read_eccstatus_op()
62 		for (i = 0; i < chip->ecc.steps; i++) {  in toshiba_nand_benand_eccstatus()
128 	 * The calculated ECC bytes are stored into other isolated  in toshiba_nand_benand_init()
130 	 * This is why chip->ecc.bytes = 0.  in toshiba_nand_benand_init()
132 	chip->ecc.bytes = 0;  in toshiba_nand_benand_init()
133 	chip->ecc.size = 512;  in toshiba_nand_benand_init()
134 	chip->ecc.strength = 8;  in toshiba_nand_benand_init()
135 	chip->ecc.read_page = toshiba_nand_read_page_benand;  in toshiba_nand_benand_init()
136 	chip->ecc.read_subpage = toshiba_nand_read_subpage_benand;  in toshiba_nand_benand_init()
137 	chip->ecc.write_page = nand_write_page_raw;  in toshiba_nand_benand_init()
138 	chip->ecc.read_page_raw = nand_read_page_raw_notsupp;  in toshiba_nand_benand_init()
139 	chip->ecc.write_page_raw = nand_write_page_raw_notsupp;  in toshiba_nand_benand_init()
173 	 * Extract ECC requirements from 6th id byte.  in toshiba_nand_decode_id()
174 	 * For Toshiba SLC, ecc requrements are as follows:  in toshiba_nand_decode_id()
175 	 *  - 43nm: 1 bit ECC for each 512Byte is required.  in toshiba_nand_decode_id()
176 	 *  - 32nm: 4 bit ECC for each 512Byte is required.  in toshiba_nand_decode_id()
177 	 *  - 24nm: 8 bit ECC for each 512Byte is required.  in toshiba_nand_decode_id()
192 			WARN(1, "Could not get ECC info");  in toshiba_nand_decode_id()
279 	/* Check that chip is BENAND and ECC mode is on-die */  in toshiba_nand_init()
281 	    chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_DIE &&  in toshiba_nand_init()