Lines Matching +full:chip +full:- +full:to +full:- +full:chip
1 // SPDX-License-Identifier: GPL-2.0-only
8 * http://www.linux-mtd.infradead.org/doc/nand.html
11 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
21 * Check, if mtd->ecctype should be set to MTD_ECC_HW
23 * BBT table is not serialized, has to be fixed
38 #include <linux/mtd/nand-ecc-sw-hamming.h>
39 #include <linux/mtd/nand-ecc-sw-bch.h>
52 int lastpage = (mtd->erasesize / mtd->writesize) - 1; in nand_pairing_dist3_get_info()
59 info->group = 0; in nand_pairing_dist3_get_info()
60 info->pair = (page + 1) / 2; in nand_pairing_dist3_get_info()
62 info->group = 1; in nand_pairing_dist3_get_info()
63 info->pair = (page + 1 - dist) / 2; in nand_pairing_dist3_get_info()
72 int lastpair = ((mtd->erasesize / mtd->writesize) - 1) / 2; in nand_pairing_dist3_get_wunit()
73 int page = info->pair * 2; in nand_pairing_dist3_get_wunit()
76 if (!info->group && !info->pair) in nand_pairing_dist3_get_wunit()
79 if (info->pair == lastpair && info->group) in nand_pairing_dist3_get_wunit()
82 if (!info->group) in nand_pairing_dist3_get_wunit()
83 page--; in nand_pairing_dist3_get_wunit()
84 else if (info->pair) in nand_pairing_dist3_get_wunit()
85 page += dist - 1; in nand_pairing_dist3_get_wunit()
87 if (page >= mtd->erasesize / mtd->writesize) in nand_pairing_dist3_get_wunit()
88 return -EINVAL; in nand_pairing_dist3_get_wunit()
99 static int check_offs_len(struct nand_chip *chip, loff_t ofs, uint64_t len) in check_offs_len() argument
104 if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
106 ret = -EINVAL; in check_offs_len()
110 if (len & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
112 ret = -EINVAL; in check_offs_len()
119 * nand_extract_bits - Copy unaligned bits from one buffer to another one
124 * @nbits: number of bits to copy from @src to @dst
126 * Copy bits from one memory region to another (overlap authorized).
139 n = min3(8 - dst_off, 8 - src_off, nbits); in nand_extract_bits()
141 tmp = (*src >> src_off) & GENMASK(n - 1, 0); in nand_extract_bits()
142 *dst &= ~GENMASK(n - 1 + dst_off, dst_off); in nand_extract_bits()
148 dst_off -= 8; in nand_extract_bits()
154 src_off -= 8; in nand_extract_bits()
157 nbits -= n; in nand_extract_bits()
163 * nand_select_target() - Select a NAND target (A.K.A. die)
164 * @chip: NAND chip object
165 * @cs: the CS line to select. Note that this CS id is always from the chip
168 * Select a NAND target so that further operations executed on @chip go to the
171 void nand_select_target(struct nand_chip *chip, unsigned int cs) in nand_select_target() argument
177 if (WARN_ON(cs > nanddev_ntargets(&chip->base))) in nand_select_target()
180 chip->cur_cs = cs; in nand_select_target()
182 if (chip->legacy.select_chip) in nand_select_target()
183 chip->legacy.select_chip(chip, cs); in nand_select_target()
188 * nand_deselect_target() - Deselect the currently selected target
189 * @chip: NAND chip object
192 * executed on @chip after the target has been deselected is undefined.
194 void nand_deselect_target(struct nand_chip *chip) in nand_deselect_target() argument
196 if (chip->legacy.select_chip) in nand_deselect_target()
197 chip->legacy.select_chip(chip, -1); in nand_deselect_target()
199 chip->cur_cs = -1; in nand_deselect_target()
204 * nand_release_device - [GENERIC] release chip
205 * @chip: NAND chip object
207 * Release chip lock and wake up anyone waiting on the device.
209 static void nand_release_device(struct nand_chip *chip) in nand_release_device() argument
211 /* Release the controller and the chip */ in nand_release_device()
212 mutex_unlock(&chip->controller->lock); in nand_release_device()
213 mutex_unlock(&chip->lock); in nand_release_device()
217 * nand_bbm_get_next_page - Get the next page for bad block markers
218 * @chip: NAND chip object
219 * @page: First page to start checking for bad block marker usage
221 * Returns an integer that corresponds to the page offset within a block, for
222 * a page that is used to store bad block markers. If no more pages are
223 * available, -EINVAL is returned.
225 int nand_bbm_get_next_page(struct nand_chip *chip, int page) in nand_bbm_get_next_page() argument
227 struct mtd_info *mtd = nand_to_mtd(chip); in nand_bbm_get_next_page()
228 int last_page = ((mtd->erasesize - mtd->writesize) >> in nand_bbm_get_next_page()
229 chip->page_shift) & chip->pagemask; in nand_bbm_get_next_page()
233 if (page == 0 && !(chip->options & bbm_flags)) in nand_bbm_get_next_page()
235 if (page == 0 && chip->options & NAND_BBM_FIRSTPAGE) in nand_bbm_get_next_page()
237 if (page <= 1 && chip->options & NAND_BBM_SECONDPAGE) in nand_bbm_get_next_page()
239 if (page <= last_page && chip->options & NAND_BBM_LASTPAGE) in nand_bbm_get_next_page()
242 return -EINVAL; in nand_bbm_get_next_page()
246 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
247 * @chip: NAND chip object
252 static int nand_block_bad(struct nand_chip *chip, loff_t ofs) in nand_block_bad() argument
258 first_page = (int)(ofs >> chip->page_shift) & chip->pagemask; in nand_block_bad()
259 page_offset = nand_bbm_get_next_page(chip, 0); in nand_block_bad()
262 res = chip->ecc.read_oob(chip, first_page + page_offset); in nand_block_bad()
266 bad = chip->oob_poi[chip->badblockpos]; in nand_block_bad()
268 if (likely(chip->badblockbits == 8)) in nand_block_bad()
271 res = hweight8(bad) < chip->badblockbits; in nand_block_bad()
275 page_offset = nand_bbm_get_next_page(chip, page_offset + 1); in nand_block_bad()
282 * nand_region_is_secured() - Check if the region is secured
283 * @chip: NAND chip object
284 * @offset: Offset of the region to check
285 * @size: Size of the region to check
291 static bool nand_region_is_secured(struct nand_chip *chip, loff_t offset, u64 size) in nand_region_is_secured() argument
296 for (i = 0; i < chip->nr_secure_regions; i++) { in nand_region_is_secured()
297 const struct nand_secure_region *region = &chip->secure_regions[i]; in nand_region_is_secured()
299 if (offset + size <= region->offset || in nand_region_is_secured()
300 offset >= region->offset + region->size) in nand_region_is_secured()
303 pr_debug("%s: Region 0x%llx - 0x%llx is secured!", in nand_region_is_secured()
312 static int nand_isbad_bbm(struct nand_chip *chip, loff_t ofs) in nand_isbad_bbm() argument
314 struct mtd_info *mtd = nand_to_mtd(chip); in nand_isbad_bbm()
316 if (chip->options & NAND_NO_BBM_QUIRK) in nand_isbad_bbm()
320 if (nand_region_is_secured(chip, ofs, mtd->erasesize)) in nand_isbad_bbm()
321 return -EIO; in nand_isbad_bbm()
326 if (chip->legacy.block_bad) in nand_isbad_bbm()
327 return chip->legacy.block_bad(chip, ofs); in nand_isbad_bbm()
329 return nand_block_bad(chip, ofs); in nand_isbad_bbm()
333 * nand_get_device - [GENERIC] Get chip for selected access
334 * @chip: NAND chip structure
338 static void nand_get_device(struct nand_chip *chip) in nand_get_device() argument
342 mutex_lock(&chip->lock); in nand_get_device()
343 if (!chip->suspended) { in nand_get_device()
344 mutex_lock(&chip->controller->lock); in nand_get_device()
347 mutex_unlock(&chip->lock); in nand_get_device()
349 wait_event(chip->resume_wq, !chip->suspended); in nand_get_device()
354 * nand_check_wp - [GENERIC] check if the chip is write protected
355 * @chip: NAND chip object
360 static int nand_check_wp(struct nand_chip *chip) in nand_check_wp() argument
366 if (chip->options & NAND_BROKEN_XD) in nand_check_wp()
370 if (chip->controller->controller_wp) in nand_check_wp()
374 ret = nand_status_op(chip, &status); in nand_check_wp()
382 * nand_fill_oob - [INTERN] Transfer client buffer to oob
383 * @chip: NAND chip object
388 static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob, size_t len, in nand_fill_oob() argument
391 struct mtd_info *mtd = nand_to_mtd(chip); in nand_fill_oob()
395 * Initialise to all 0xFF, to avoid the possibility of left over OOB in nand_fill_oob()
398 memset(chip->oob_poi, 0xff, mtd->oobsize); in nand_fill_oob()
400 switch (ops->mode) { in nand_fill_oob()
404 memcpy(chip->oob_poi + ops->ooboffs, oob, len); in nand_fill_oob()
408 ret = mtd_ooblayout_set_databytes(mtd, oob, chip->oob_poi, in nand_fill_oob()
409 ops->ooboffs, len); in nand_fill_oob()
420 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
421 * @chip: NAND chip object
422 * @to: offset to write to
425 * NAND write out-of-band.
427 static int nand_do_write_oob(struct nand_chip *chip, loff_t to, in nand_do_write_oob() argument
430 struct mtd_info *mtd = nand_to_mtd(chip); in nand_do_write_oob()
433 pr_debug("%s: to = 0x%08x, len = %i\n", in nand_do_write_oob()
434 __func__, (unsigned int)to, (int)ops->ooblen); in nand_do_write_oob()
439 if ((ops->ooboffs + ops->ooblen) > len) { in nand_do_write_oob()
440 pr_debug("%s: attempt to write past end of page\n", in nand_do_write_oob()
442 return -EINVAL; in nand_do_write_oob()
446 if (nand_region_is_secured(chip, to, ops->ooblen)) in nand_do_write_oob()
447 return -EIO; in nand_do_write_oob()
449 chipnr = (int)(to >> chip->chip_shift); in nand_do_write_oob()
452 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one in nand_do_write_oob()
454 * if we don't do this. I have no clue why, but I seem to have 'fixed' in nand_do_write_oob()
457 ret = nand_reset(chip, chipnr); in nand_do_write_oob()
461 nand_select_target(chip, chipnr); in nand_do_write_oob()
463 /* Shift to get page */ in nand_do_write_oob()
464 page = (int)(to >> chip->page_shift); in nand_do_write_oob()
467 if (nand_check_wp(chip)) { in nand_do_write_oob()
468 nand_deselect_target(chip); in nand_do_write_oob()
469 return -EROFS; in nand_do_write_oob()
472 /* Invalidate the page cache, if we write to the cached page */ in nand_do_write_oob()
473 if (page == chip->pagecache.page) in nand_do_write_oob()
474 chip->pagecache.page = -1; in nand_do_write_oob()
476 nand_fill_oob(chip, ops->oobbuf, ops->ooblen, ops); in nand_do_write_oob()
478 if (ops->mode == MTD_OPS_RAW) in nand_do_write_oob()
479 status = chip->ecc.write_oob_raw(chip, page & chip->pagemask); in nand_do_write_oob()
481 status = chip->ecc.write_oob(chip, page & chip->pagemask); in nand_do_write_oob()
483 nand_deselect_target(chip); in nand_do_write_oob()
488 ops->oobretlen = ops->ooblen; in nand_do_write_oob()
494 * nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker
495 * @chip: NAND chip object
499 * specific driver. It provides the details for writing a bad block marker to a
502 static int nand_default_block_markbad(struct nand_chip *chip, loff_t ofs) in nand_default_block_markbad() argument
504 struct mtd_info *mtd = nand_to_mtd(chip); in nand_default_block_markbad()
511 ops.ooboffs = chip->badblockpos; in nand_default_block_markbad()
512 if (chip->options & NAND_BUSWIDTH_16) { in nand_default_block_markbad()
520 page_offset = nand_bbm_get_next_page(chip, 0); in nand_default_block_markbad()
523 res = nand_do_write_oob(chip, in nand_default_block_markbad()
524 ofs + (page_offset * mtd->writesize), in nand_default_block_markbad()
530 page_offset = nand_bbm_get_next_page(chip, page_offset + 1); in nand_default_block_markbad()
537 * nand_markbad_bbm - mark a block by updating the BBM
538 * @chip: NAND chip object
539 * @ofs: offset of the block to mark bad
541 int nand_markbad_bbm(struct nand_chip *chip, loff_t ofs) in nand_markbad_bbm() argument
543 if (chip->legacy.block_markbad) in nand_markbad_bbm()
544 return chip->legacy.block_markbad(chip, ofs); in nand_markbad_bbm()
546 return nand_default_block_markbad(chip, ofs); in nand_markbad_bbm()
550 * nand_block_markbad_lowlevel - mark a block bad
551 * @chip: NAND chip object
555 * block table(s) and/or marker(s)). We only allow the hardware driver to
556 * specify how to write bad block markers to OOB (chip->legacy.block_markbad).
560 * (1) erase the affected block, to allow OOB marker to be written cleanly
561 * (2) write bad block marker to OOB area of affected block (unless flag
568 static int nand_block_markbad_lowlevel(struct nand_chip *chip, loff_t ofs) in nand_block_markbad_lowlevel() argument
570 struct mtd_info *mtd = nand_to_mtd(chip); in nand_block_markbad_lowlevel()
573 if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) { in nand_block_markbad_lowlevel()
579 einfo.len = 1ULL << chip->phys_erase_shift; in nand_block_markbad_lowlevel()
580 nand_erase_nand(chip, &einfo, 0); in nand_block_markbad_lowlevel()
582 /* Write bad block marker to OOB */ in nand_block_markbad_lowlevel()
583 nand_get_device(chip); in nand_block_markbad_lowlevel()
585 ret = nand_markbad_bbm(chip, ofs); in nand_block_markbad_lowlevel()
586 nand_release_device(chip); in nand_block_markbad_lowlevel()
590 if (chip->bbt) { in nand_block_markbad_lowlevel()
591 res = nand_markbad_bbt(chip, ofs); in nand_block_markbad_lowlevel()
597 mtd->ecc_stats.badblocks++; in nand_block_markbad_lowlevel()
603 * nand_block_isreserved - [GENERIC] Check if a block is marked reserved.
611 struct nand_chip *chip = mtd_to_nand(mtd); in nand_block_isreserved() local
613 if (!chip->bbt) in nand_block_isreserved()
616 return nand_isreserved_bbt(chip, ofs); in nand_block_isreserved()
620 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
621 * @chip: NAND chip object
623 * @allowbbt: 1, if its allowed to access the bbt area
628 static int nand_block_checkbad(struct nand_chip *chip, loff_t ofs, int allowbbt) in nand_block_checkbad() argument
631 if (chip->bbt) in nand_block_checkbad()
632 return nand_isbad_bbt(chip, ofs, allowbbt); in nand_block_checkbad()
634 return nand_isbad_bbm(chip, ofs); in nand_block_checkbad()
638 * nand_soft_waitrdy - Poll STATUS reg until RDY bit is set to 1
639 * @chip: NAND chip structure
642 * Poll the STATUS register using ->exec_op() until the RDY bit becomes 1.
643 * If that does not happen whitin the specified timeout, -ETIMEDOUT is
646 * This helper is intended to be used when the controller does not have access
647 * to the NAND R/B pin.
649 * Be aware that calling this helper from an ->exec_op() implementation means
650 * ->exec_op() must be re-entrant.
652 * Return 0 if the NAND chip is ready, a negative error otherwise.
654 int nand_soft_waitrdy(struct nand_chip *chip, unsigned long timeout_ms) in nand_soft_waitrdy() argument
660 if (!nand_has_exec_op(chip)) in nand_soft_waitrdy()
661 return -ENOTSUPP; in nand_soft_waitrdy()
664 conf = nand_get_interface_config(chip); in nand_soft_waitrdy()
667 ret = nand_status_op(chip, NULL); in nand_soft_waitrdy()
674 * small jiffy fraction - possibly leading to false timeout in nand_soft_waitrdy()
678 ret = nand_read_data_op(chip, &status, sizeof(status), true, in nand_soft_waitrdy()
695 * We have to exit READ_STATUS mode in order to read real data on the in nand_soft_waitrdy()
699 nand_exit_status_op(chip); in nand_soft_waitrdy()
704 return status & NAND_STATUS_READY ? 0 : -ETIMEDOUT; in nand_soft_waitrdy()
709 * nand_gpio_waitrdy - Poll R/B GPIO pin until ready
710 * @chip: NAND chip structure
715 * whitin the specified timeout, -ETIMEDOUT is returned.
717 * This helper is intended to be used when the controller has access to the
720 * Return 0 if the R/B pin indicates chip is ready, a negative error otherwise.
722 int nand_gpio_waitrdy(struct nand_chip *chip, struct gpio_desc *gpiod, in nand_gpio_waitrdy() argument
727 * Wait until R/B pin indicates chip is ready or timeout occurs. in nand_gpio_waitrdy()
730 * small jiffy fraction - possibly leading to false timeout. in nand_gpio_waitrdy()
740 return gpiod_get_value_cansleep(gpiod) ? 0 : -ETIMEDOUT; in nand_gpio_waitrdy()
745 * panic_nand_wait - [GENERIC] wait until the command is done
746 * @chip: NAND chip structure
750 * we are in interrupt context. May happen when in panic and trying to write
753 void panic_nand_wait(struct nand_chip *chip, unsigned long timeo) in panic_nand_wait() argument
757 if (chip->legacy.dev_ready) { in panic_nand_wait()
758 if (chip->legacy.dev_ready(chip)) in panic_nand_wait()
764 ret = nand_read_data_op(chip, &status, sizeof(status), in panic_nand_wait()
776 static bool nand_supports_get_features(struct nand_chip *chip, int addr) in nand_supports_get_features() argument
778 return (chip->parameters.supports_set_get_features && in nand_supports_get_features()
779 test_bit(addr, chip->parameters.get_feature_list)); in nand_supports_get_features()
782 static bool nand_supports_set_features(struct nand_chip *chip, int addr) in nand_supports_set_features() argument
784 return (chip->parameters.supports_set_get_features && in nand_supports_set_features()
785 test_bit(addr, chip->parameters.set_feature_list)); in nand_supports_set_features()
789 * nand_reset_interface - Reset data interface and timings
790 * @chip: The NAND chip
793 * Reset the Data interface and timings to ONFI mode 0.
797 static int nand_reset_interface(struct nand_chip *chip, int chipnr) in nand_reset_interface() argument
799 const struct nand_controller_ops *ops = chip->controller->ops; in nand_reset_interface()
802 if (!nand_controller_can_setup_interface(chip)) in nand_reset_interface()
808 * To transition from NV-DDR or NV-DDR2 to the SDR data in nand_reset_interface()
811 * required to recognize Reset (FFh) command issued in SDR in nand_reset_interface()
816 * timings to timing mode 0. in nand_reset_interface()
819 chip->current_interface_config = nand_get_reset_interface_config(); in nand_reset_interface()
820 ret = ops->setup_interface(chip, chipnr, in nand_reset_interface()
821 chip->current_interface_config); in nand_reset_interface()
823 pr_err("Failed to configure data interface to SDR timing mode 0\n"); in nand_reset_interface()
829 * nand_setup_interface - Setup the best data interface and timings
830 * @chip: The NAND chip
833 * Configure what has been reported to be the best data interface and NAND
834 * timings supported by the chip and the driver.
838 static int nand_setup_interface(struct nand_chip *chip, int chipnr) in nand_setup_interface() argument
840 const struct nand_controller_ops *ops = chip->controller->ops; in nand_setup_interface()
844 if (!nand_controller_can_setup_interface(chip)) in nand_setup_interface()
848 * A nand_reset_interface() put both the NAND chip and the NAND in nand_setup_interface()
849 * controller in timings mode 0. If the default mode for this chip is in nand_setup_interface()
850 * also 0, no need to proceed to the change again. Plus, at probe time, in nand_setup_interface()
851 * nand_setup_interface() uses ->set/get_features() which would in nand_setup_interface()
854 if (!chip->best_interface_config) in nand_setup_interface()
857 request = chip->best_interface_config->timings.mode; in nand_setup_interface()
858 if (nand_interface_is_sdr(chip->best_interface_config)) in nand_setup_interface()
864 /* Change the mode on the chip side (if supported by the NAND chip) */ in nand_setup_interface()
865 if (nand_supports_set_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE)) { in nand_setup_interface()
866 nand_select_target(chip, chipnr); in nand_setup_interface()
867 ret = nand_set_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE, in nand_setup_interface()
869 nand_deselect_target(chip); in nand_setup_interface()
875 ret = ops->setup_interface(chip, chipnr, chip->best_interface_config); in nand_setup_interface()
879 /* Check the mode has been accepted by the chip, if supported */ in nand_setup_interface()
880 if (!nand_supports_get_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE)) in nand_setup_interface()
884 nand_select_target(chip, chipnr); in nand_setup_interface()
885 ret = nand_get_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE, in nand_setup_interface()
887 nand_deselect_target(chip); in nand_setup_interface()
892 pr_warn("%s timing mode %d not acknowledged by the NAND chip\n", in nand_setup_interface()
893 nand_interface_is_nvddr(chip->best_interface_config) ? "NV-DDR" : "SDR", in nand_setup_interface()
894 chip->best_interface_config->timings.mode); in nand_setup_interface()
895 pr_debug("NAND chip would work in %s timing mode %d\n", in nand_setup_interface()
896 tmode_param[0] & ONFI_DATA_INTERFACE_NVDDR ? "NV-DDR" : "SDR", in nand_setup_interface()
902 chip->current_interface_config = chip->best_interface_config; in nand_setup_interface()
908 * Fallback to mode 0 if the chip explicitly did not ack the chosen in nand_setup_interface()
911 nand_reset_interface(chip, chipnr); in nand_setup_interface()
912 nand_select_target(chip, chipnr); in nand_setup_interface()
913 nand_reset_op(chip); in nand_setup_interface()
914 nand_deselect_target(chip); in nand_setup_interface()
920 * nand_choose_best_sdr_timings - Pick up the best SDR timings that both the
921 * NAND controller and the NAND chip support
922 * @chip: the NAND chip
929 int nand_choose_best_sdr_timings(struct nand_chip *chip, in nand_choose_best_sdr_timings() argument
933 const struct nand_controller_ops *ops = chip->controller->ops; in nand_choose_best_sdr_timings()
934 int best_mode = 0, mode, ret = -EOPNOTSUPP; in nand_choose_best_sdr_timings()
936 iface->type = NAND_SDR_IFACE; in nand_choose_best_sdr_timings()
939 iface->timings.sdr = *spec_timings; in nand_choose_best_sdr_timings()
940 iface->timings.mode = onfi_find_closest_sdr_mode(spec_timings); in nand_choose_best_sdr_timings()
943 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY, in nand_choose_best_sdr_timings()
946 chip->best_interface_config = iface; in nand_choose_best_sdr_timings()
950 /* Fallback to slower modes */ in nand_choose_best_sdr_timings()
951 best_mode = iface->timings.mode; in nand_choose_best_sdr_timings()
952 } else if (chip->parameters.onfi) { in nand_choose_best_sdr_timings()
953 best_mode = fls(chip->parameters.onfi->sdr_timing_modes) - 1; in nand_choose_best_sdr_timings()
956 for (mode = best_mode; mode >= 0; mode--) { in nand_choose_best_sdr_timings()
957 onfi_fill_interface_config(chip, iface, NAND_SDR_IFACE, mode); in nand_choose_best_sdr_timings()
959 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY, in nand_choose_best_sdr_timings()
962 chip->best_interface_config = iface; in nand_choose_best_sdr_timings()
971 * nand_choose_best_nvddr_timings - Pick up the best NVDDR timings that both the
972 * NAND controller and the NAND chip support
973 * @chip: the NAND chip
980 int nand_choose_best_nvddr_timings(struct nand_chip *chip, in nand_choose_best_nvddr_timings() argument
984 const struct nand_controller_ops *ops = chip->controller->ops; in nand_choose_best_nvddr_timings()
985 int best_mode = 0, mode, ret = -EOPNOTSUPP; in nand_choose_best_nvddr_timings()
987 iface->type = NAND_NVDDR_IFACE; in nand_choose_best_nvddr_timings()
990 iface->timings.nvddr = *spec_timings; in nand_choose_best_nvddr_timings()
991 iface->timings.mode = onfi_find_closest_nvddr_mode(spec_timings); in nand_choose_best_nvddr_timings()
994 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY, in nand_choose_best_nvddr_timings()
997 chip->best_interface_config = iface; in nand_choose_best_nvddr_timings()
1001 /* Fallback to slower modes */ in nand_choose_best_nvddr_timings()
1002 best_mode = iface->timings.mode; in nand_choose_best_nvddr_timings()
1003 } else if (chip->parameters.onfi) { in nand_choose_best_nvddr_timings()
1004 best_mode = fls(chip->parameters.onfi->nvddr_timing_modes) - 1; in nand_choose_best_nvddr_timings()
1007 for (mode = best_mode; mode >= 0; mode--) { in nand_choose_best_nvddr_timings()
1008 onfi_fill_interface_config(chip, iface, NAND_NVDDR_IFACE, mode); in nand_choose_best_nvddr_timings()
1010 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY, in nand_choose_best_nvddr_timings()
1013 chip->best_interface_config = iface; in nand_choose_best_nvddr_timings()
1022 * nand_choose_best_timings - Pick up the best NVDDR or SDR timings that both
1023 * NAND controller and the NAND chip support
1024 * @chip: the NAND chip
1030 static int nand_choose_best_timings(struct nand_chip *chip, in nand_choose_best_timings() argument
1035 /* Try the fastest timings: NV-DDR */ in nand_choose_best_timings()
1036 ret = nand_choose_best_nvddr_timings(chip, iface, NULL); in nand_choose_best_timings()
1040 /* Fallback to SDR timings otherwise */ in nand_choose_best_timings()
1041 return nand_choose_best_sdr_timings(chip, iface, NULL); in nand_choose_best_timings()
1045 * nand_choose_interface_config - find the best data interface and timings
1046 * @chip: The NAND chip
1048 * Find the best data interface and NAND timings supported by the chip
1052 * After this function nand_chip->interface_config is initialized with the best
1057 static int nand_choose_interface_config(struct nand_chip *chip) in nand_choose_interface_config() argument
1062 if (!nand_controller_can_setup_interface(chip)) in nand_choose_interface_config()
1067 return -ENOMEM; in nand_choose_interface_config()
1069 if (chip->ops.choose_interface_config) in nand_choose_interface_config()
1070 ret = chip->ops.choose_interface_config(chip, iface); in nand_choose_interface_config()
1072 ret = nand_choose_best_timings(chip, iface); in nand_choose_interface_config()
1081 * nand_fill_column_cycles - fill the column cycles of an address
1082 * @chip: The NAND chip
1083 * @addrs: Array of address cycles to fill
1089 * Returns the number of cycles needed to encode the column, or a negative
1092 static int nand_fill_column_cycles(struct nand_chip *chip, u8 *addrs, in nand_fill_column_cycles() argument
1095 struct mtd_info *mtd = nand_to_mtd(chip); in nand_fill_column_cycles()
1096 bool ident_stage = !mtd->writesize; in nand_fill_column_cycles()
1101 if (offset_in_page > mtd->writesize + mtd->oobsize) in nand_fill_column_cycles()
1102 return -EINVAL; in nand_fill_column_cycles()
1105 * On small page NANDs, there's a dedicated command to access the OOB in nand_fill_column_cycles()
1106 * area, and the column address is relative to the start of the OOB in nand_fill_column_cycles()
1109 if (mtd->writesize <= 512 && offset_in_page >= mtd->writesize) in nand_fill_column_cycles()
1110 offset_in_page -= mtd->writesize; in nand_fill_column_cycles()
1113 * The offset in page is expressed in bytes, if the NAND bus is 16-bit in nand_fill_column_cycles()
1116 if (chip->options & NAND_BUSWIDTH_16) { in nand_fill_column_cycles()
1118 return -EINVAL; in nand_fill_column_cycles()
1130 if (!ident_stage && mtd->writesize <= 512) in nand_fill_column_cycles()
1138 static int nand_sp_exec_read_page_op(struct nand_chip *chip, unsigned int page, in nand_sp_exec_read_page_op() argument
1143 nand_get_interface_config(chip); in nand_sp_exec_read_page_op()
1144 struct mtd_info *mtd = nand_to_mtd(chip); in nand_sp_exec_read_page_op()
1153 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_sp_exec_read_page_op()
1156 /* Drop the DATA_IN instruction if len is set to 0. */ in nand_sp_exec_read_page_op()
1158 op.ninstrs--; in nand_sp_exec_read_page_op()
1160 if (offset_in_page >= mtd->writesize) in nand_sp_exec_read_page_op()
1163 !(chip->options & NAND_BUSWIDTH_16)) in nand_sp_exec_read_page_op()
1166 ret = nand_fill_column_cycles(chip, addrs, offset_in_page); in nand_sp_exec_read_page_op()
1173 if (chip->options & NAND_ROW_ADDR_3) { in nand_sp_exec_read_page_op()
1178 return nand_exec_op(chip, &op); in nand_sp_exec_read_page_op()
1181 static int nand_lp_exec_read_page_op(struct nand_chip *chip, unsigned int page, in nand_lp_exec_read_page_op() argument
1186 nand_get_interface_config(chip); in nand_lp_exec_read_page_op()
1196 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_lp_exec_read_page_op()
1199 /* Drop the DATA_IN instruction if len is set to 0. */ in nand_lp_exec_read_page_op()
1201 op.ninstrs--; in nand_lp_exec_read_page_op()
1203 ret = nand_fill_column_cycles(chip, addrs, offset_in_page); in nand_lp_exec_read_page_op()
1210 if (chip->options & NAND_ROW_ADDR_3) { in nand_lp_exec_read_page_op()
1215 return nand_exec_op(chip, &op); in nand_lp_exec_read_page_op()
1220 /* lun is expected to be very small */ in rawnand_last_page_of_lun()
1221 return (lun * pages_per_lun) + pages_per_lun - 1; in rawnand_last_page_of_lun()
1224 static void rawnand_cap_cont_reads(struct nand_chip *chip) in rawnand_cap_cont_reads() argument
1229 memorg = nanddev_get_memorg(&chip->base); in rawnand_cap_cont_reads()
1230 ppl = memorg->pages_per_eraseblock * memorg->eraseblocks_per_lun; in rawnand_cap_cont_reads()
1231 first_lun = chip->cont_read.first_page / ppl; in rawnand_cap_cont_reads()
1232 last_lun = chip->cont_read.last_page / ppl; in rawnand_cap_cont_reads()
1236 chip->cont_read.pause_page = rawnand_last_page_of_lun(ppl, first_lun); in rawnand_cap_cont_reads()
1238 chip->cont_read.pause_page = chip->cont_read.last_page; in rawnand_cap_cont_reads()
1240 if (chip->cont_read.first_page == chip->cont_read.pause_page) { in rawnand_cap_cont_reads()
1241 chip->cont_read.first_page++; in rawnand_cap_cont_reads()
1242 chip->cont_read.pause_page = min(chip->cont_read.last_page, in rawnand_cap_cont_reads()
1246 if (chip->cont_read.first_page >= chip->cont_read.last_page) in rawnand_cap_cont_reads()
1247 chip->cont_read.ongoing = false; in rawnand_cap_cont_reads()
1250 static int nand_lp_exec_cont_read_page_op(struct nand_chip *chip, unsigned int page, in nand_lp_exec_cont_read_page_op() argument
1255 nand_get_interface_config(chip); in nand_lp_exec_cont_read_page_op()
1268 NAND_OP_CMD(page == chip->cont_read.pause_page ? in nand_lp_exec_cont_read_page_op()
1275 struct nand_operation start_op = NAND_OPERATION(chip->cur_cs, start_instrs); in nand_lp_exec_cont_read_page_op()
1276 struct nand_operation cont_op = NAND_OPERATION(chip->cur_cs, cont_instrs); in nand_lp_exec_cont_read_page_op()
1280 start_op.ninstrs--; in nand_lp_exec_cont_read_page_op()
1281 cont_op.ninstrs--; in nand_lp_exec_cont_read_page_op()
1284 ret = nand_fill_column_cycles(chip, addrs, offset_in_page); in nand_lp_exec_cont_read_page_op()
1291 if (chip->options & NAND_ROW_ADDR_3) { in nand_lp_exec_cont_read_page_op()
1298 if (nand_check_op(chip, &start_op) || nand_check_op(chip, &cont_op)) in nand_lp_exec_cont_read_page_op()
1299 return -EOPNOTSUPP; in nand_lp_exec_cont_read_page_op()
1304 if (page == chip->cont_read.first_page) in nand_lp_exec_cont_read_page_op()
1305 ret = nand_exec_op(chip, &start_op); in nand_lp_exec_cont_read_page_op()
1307 ret = nand_exec_op(chip, &cont_op); in nand_lp_exec_cont_read_page_op()
1311 if (!chip->cont_read.ongoing) in nand_lp_exec_cont_read_page_op()
1314 if (page == chip->cont_read.last_page) { in nand_lp_exec_cont_read_page_op()
1315 chip->cont_read.ongoing = false; in nand_lp_exec_cont_read_page_op()
1316 } else if (page == chip->cont_read.pause_page) { in nand_lp_exec_cont_read_page_op()
1317 chip->cont_read.first_page++; in nand_lp_exec_cont_read_page_op()
1318 rawnand_cap_cont_reads(chip); in nand_lp_exec_cont_read_page_op()
1324 static bool rawnand_cont_read_ongoing(struct nand_chip *chip, unsigned int page) in rawnand_cont_read_ongoing() argument
1326 return chip->cont_read.ongoing && page >= chip->cont_read.first_page; in rawnand_cont_read_ongoing()
1330 * nand_read_page_op - Do a READ PAGE operation
1331 * @chip: The NAND chip
1332 * @page: page to read
1334 * @buf: buffer used to store the data
1342 int nand_read_page_op(struct nand_chip *chip, unsigned int page, in nand_read_page_op() argument
1345 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_op()
1348 return -EINVAL; in nand_read_page_op()
1350 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_read_page_op()
1351 return -EINVAL; in nand_read_page_op()
1353 if (nand_has_exec_op(chip)) { in nand_read_page_op()
1354 if (mtd->writesize > 512) { in nand_read_page_op()
1355 if (rawnand_cont_read_ongoing(chip, page)) in nand_read_page_op()
1356 return nand_lp_exec_cont_read_page_op(chip, page, in nand_read_page_op()
1360 return nand_lp_exec_read_page_op(chip, page, in nand_read_page_op()
1365 return nand_sp_exec_read_page_op(chip, page, offset_in_page, in nand_read_page_op()
1369 chip->legacy.cmdfunc(chip, NAND_CMD_READ0, offset_in_page, page); in nand_read_page_op()
1371 chip->legacy.read_buf(chip, buf, len); in nand_read_page_op()
1378 * nand_read_param_page_op - Do a READ PARAMETER PAGE operation
1379 * @chip: The NAND chip
1380 * @page: parameter page to read
1381 * @buf: buffer used to store the data
1389 int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf, in nand_read_param_page_op() argument
1396 return -EINVAL; in nand_read_param_page_op()
1398 if (nand_has_exec_op(chip)) { in nand_read_param_page_op()
1400 nand_get_interface_config(chip); in nand_read_param_page_op()
1409 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_read_param_page_op()
1411 /* Drop the DATA_IN instruction if len is set to 0. */ in nand_read_param_page_op()
1413 op.ninstrs--; in nand_read_param_page_op()
1415 return nand_exec_op(chip, &op); in nand_read_param_page_op()
1418 chip->legacy.cmdfunc(chip, NAND_CMD_PARAM, page, -1); in nand_read_param_page_op()
1420 p[i] = chip->legacy.read_byte(chip); in nand_read_param_page_op()
1426 * nand_change_read_column_op - Do a CHANGE READ COLUMN operation
1427 * @chip: The NAND chip
1429 * @buf: buffer used to store the data
1431 * @force_8bit: force 8-bit bus access
1438 int nand_change_read_column_op(struct nand_chip *chip, in nand_change_read_column_op() argument
1442 struct mtd_info *mtd = nand_to_mtd(chip); in nand_change_read_column_op()
1443 bool ident_stage = !mtd->writesize; in nand_change_read_column_op()
1446 return -EINVAL; in nand_change_read_column_op()
1449 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_change_read_column_op()
1450 return -EINVAL; in nand_change_read_column_op()
1453 if (mtd->writesize <= 512) in nand_change_read_column_op()
1454 return -ENOTSUPP; in nand_change_read_column_op()
1457 if (nand_has_exec_op(chip)) { in nand_change_read_column_op()
1459 nand_get_interface_config(chip); in nand_change_read_column_op()
1468 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_change_read_column_op()
1471 ret = nand_fill_column_cycles(chip, addrs, offset_in_page); in nand_change_read_column_op()
1475 /* Drop the DATA_IN instruction if len is set to 0. */ in nand_change_read_column_op()
1477 op.ninstrs--; in nand_change_read_column_op()
1481 return nand_exec_op(chip, &op); in nand_change_read_column_op()
1484 chip->legacy.cmdfunc(chip, NAND_CMD_RNDOUT, offset_in_page, -1); in nand_change_read_column_op()
1486 chip->legacy.read_buf(chip, buf, len); in nand_change_read_column_op()
1493 * nand_read_oob_op - Do a READ OOB operation
1494 * @chip: The NAND chip
1495 * @page: page to read
1497 * @buf: buffer used to store the data
1505 int nand_read_oob_op(struct nand_chip *chip, unsigned int page, in nand_read_oob_op() argument
1508 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_oob_op()
1511 return -EINVAL; in nand_read_oob_op()
1513 if (offset_in_oob + len > mtd->oobsize) in nand_read_oob_op()
1514 return -EINVAL; in nand_read_oob_op()
1516 if (nand_has_exec_op(chip)) in nand_read_oob_op()
1517 return nand_read_page_op(chip, page, in nand_read_oob_op()
1518 mtd->writesize + offset_in_oob, in nand_read_oob_op()
1521 chip->legacy.cmdfunc(chip, NAND_CMD_READOOB, offset_in_oob, page); in nand_read_oob_op()
1523 chip->legacy.read_buf(chip, buf, len); in nand_read_oob_op()
1529 static int nand_exec_prog_page_op(struct nand_chip *chip, unsigned int page, in nand_exec_prog_page_op() argument
1534 nand_get_interface_config(chip); in nand_exec_prog_page_op()
1535 struct mtd_info *mtd = nand_to_mtd(chip); in nand_exec_prog_page_op()
1551 struct nand_operation op = NAND_DESTRUCTIVE_OPERATION(chip->cur_cs, in nand_exec_prog_page_op()
1553 int naddrs = nand_fill_column_cycles(chip, addrs, offset_in_page); in nand_exec_prog_page_op()
1560 if (chip->options & NAND_ROW_ADDR_3) in nand_exec_prog_page_op()
1567 op.ninstrs -= 2; in nand_exec_prog_page_op()
1570 op.ninstrs--; in nand_exec_prog_page_op()
1573 if (mtd->writesize <= 512) { in nand_exec_prog_page_op()
1575 * Small pages need some more tweaking: we have to adjust the in nand_exec_prog_page_op()
1577 * to access. in nand_exec_prog_page_op()
1579 if (offset_in_page >= mtd->writesize) in nand_exec_prog_page_op()
1582 !(chip->options & NAND_BUSWIDTH_16)) in nand_exec_prog_page_op()
1590 op.ninstrs--; in nand_exec_prog_page_op()
1593 return nand_exec_op(chip, &op); in nand_exec_prog_page_op()
1597 * nand_prog_page_begin_op - starts a PROG PAGE operation
1598 * @chip: The NAND chip
1599 * @page: page to write
1601 * @buf: buffer containing the data to write to the page
1609 int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page, in nand_prog_page_begin_op() argument
1613 struct mtd_info *mtd = nand_to_mtd(chip); in nand_prog_page_begin_op()
1616 return -EINVAL; in nand_prog_page_begin_op()
1618 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_prog_page_begin_op()
1619 return -EINVAL; in nand_prog_page_begin_op()
1621 if (nand_has_exec_op(chip)) in nand_prog_page_begin_op()
1622 return nand_exec_prog_page_op(chip, page, offset_in_page, buf, in nand_prog_page_begin_op()
1625 chip->legacy.cmdfunc(chip, NAND_CMD_SEQIN, offset_in_page, page); in nand_prog_page_begin_op()
1628 chip->legacy.write_buf(chip, buf, len); in nand_prog_page_begin_op()
1635 * nand_prog_page_end_op - ends a PROG PAGE operation
1636 * @chip: The NAND chip
1643 int nand_prog_page_end_op(struct nand_chip *chip) in nand_prog_page_end_op() argument
1648 if (nand_has_exec_op(chip)) { in nand_prog_page_end_op()
1650 nand_get_interface_config(chip); in nand_prog_page_end_op()
1657 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_prog_page_end_op()
1659 ret = nand_exec_op(chip, &op); in nand_prog_page_end_op()
1663 ret = nand_status_op(chip, &status); in nand_prog_page_end_op()
1667 chip->legacy.cmdfunc(chip, NAND_CMD_PAGEPROG, -1, -1); in nand_prog_page_end_op()
1668 ret = chip->legacy.waitfunc(chip); in nand_prog_page_end_op()
1676 return -EIO; in nand_prog_page_end_op()
1683 * nand_prog_page_op - Do a full PROG PAGE operation
1684 * @chip: The NAND chip
1685 * @page: page to write
1687 * @buf: buffer containing the data to write to the page
1695 int nand_prog_page_op(struct nand_chip *chip, unsigned int page, in nand_prog_page_op() argument
1699 struct mtd_info *mtd = nand_to_mtd(chip); in nand_prog_page_op()
1704 return -EINVAL; in nand_prog_page_op()
1706 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_prog_page_op()
1707 return -EINVAL; in nand_prog_page_op()
1709 if (nand_has_exec_op(chip)) { in nand_prog_page_op()
1710 ret = nand_exec_prog_page_op(chip, page, offset_in_page, buf, in nand_prog_page_op()
1715 ret = nand_status_op(chip, &status); in nand_prog_page_op()
1719 chip->legacy.cmdfunc(chip, NAND_CMD_SEQIN, offset_in_page, in nand_prog_page_op()
1721 chip->legacy.write_buf(chip, buf, len); in nand_prog_page_op()
1722 chip->legacy.cmdfunc(chip, NAND_CMD_PAGEPROG, -1, -1); in nand_prog_page_op()
1723 ret = chip->legacy.waitfunc(chip); in nand_prog_page_op()
1731 return -EIO; in nand_prog_page_op()
1738 * nand_change_write_column_op - Do a CHANGE WRITE COLUMN operation
1739 * @chip: The NAND chip
1741 * @buf: buffer containing the data to send to the NAND
1743 * @force_8bit: force 8-bit bus access
1750 int nand_change_write_column_op(struct nand_chip *chip, in nand_change_write_column_op() argument
1755 struct mtd_info *mtd = nand_to_mtd(chip); in nand_change_write_column_op()
1758 return -EINVAL; in nand_change_write_column_op()
1760 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_change_write_column_op()
1761 return -EINVAL; in nand_change_write_column_op()
1764 if (mtd->writesize <= 512) in nand_change_write_column_op()
1765 return -ENOTSUPP; in nand_change_write_column_op()
1767 if (nand_has_exec_op(chip)) { in nand_change_write_column_op()
1769 nand_get_interface_config(chip); in nand_change_write_column_op()
1776 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_change_write_column_op()
1779 ret = nand_fill_column_cycles(chip, addrs, offset_in_page); in nand_change_write_column_op()
1785 /* Drop the DATA_OUT instruction if len is set to 0. */ in nand_change_write_column_op()
1787 op.ninstrs--; in nand_change_write_column_op()
1789 return nand_exec_op(chip, &op); in nand_change_write_column_op()
1792 chip->legacy.cmdfunc(chip, NAND_CMD_RNDIN, offset_in_page, -1); in nand_change_write_column_op()
1794 chip->legacy.write_buf(chip, buf, len); in nand_change_write_column_op()
1801 * nand_readid_op - Do a READID operation
1802 * @chip: The NAND chip
1803 * @addr: address cycle to pass after the READID command
1804 * @buf: buffer used to store the ID
1813 int nand_readid_op(struct nand_chip *chip, u8 addr, void *buf, in nand_readid_op() argument
1820 return -EINVAL; in nand_readid_op()
1822 if (nand_has_exec_op(chip)) { in nand_readid_op()
1824 nand_get_interface_config(chip); in nand_readid_op()
1831 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_readid_op()
1834 /* READ_ID data bytes are received twice in NV-DDR mode */ in nand_readid_op()
1838 return -ENOMEM; in nand_readid_op()
1844 /* Drop the DATA_IN instruction if len is set to 0. */ in nand_readid_op()
1846 op.ninstrs--; in nand_readid_op()
1848 ret = nand_exec_op(chip, &op); in nand_readid_op()
1859 chip->legacy.cmdfunc(chip, NAND_CMD_READID, addr, -1); in nand_readid_op()
1862 id[i] = chip->legacy.read_byte(chip); in nand_readid_op()
1869 * nand_status_op - Do a STATUS operation
1870 * @chip: The NAND chip
1871 * @status: out variable to store the NAND status
1879 int nand_status_op(struct nand_chip *chip, u8 *status) in nand_status_op() argument
1881 if (nand_has_exec_op(chip)) { in nand_status_op()
1883 nand_get_interface_config(chip); in nand_status_op()
1890 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_status_op()
1893 /* The status data byte will be received twice in NV-DDR mode */ in nand_status_op()
1900 op.ninstrs--; in nand_status_op()
1902 ret = nand_exec_op(chip, &op); in nand_status_op()
1909 chip->legacy.cmdfunc(chip, NAND_CMD_STATUS, -1, -1); in nand_status_op()
1911 *status = chip->legacy.read_byte(chip); in nand_status_op()
1918 * nand_exit_status_op - Exit a STATUS operation
1919 * @chip: The NAND chip
1921 * This function sends a READ0 command to cancel the effect of the STATUS
1922 * command to avoid reading only the status until a new read command is sent.
1928 int nand_exit_status_op(struct nand_chip *chip) in nand_exit_status_op() argument
1930 if (nand_has_exec_op(chip)) { in nand_exit_status_op()
1934 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_exit_status_op()
1936 return nand_exec_op(chip, &op); in nand_exit_status_op()
1939 chip->legacy.cmdfunc(chip, NAND_CMD_READ0, -1, -1); in nand_exit_status_op()
1946 * nand_erase_op - Do an erase operation
1947 * @chip: The NAND chip
1948 * @eraseblock: block to erase
1950 * This function sends an ERASE command and waits for the NAND to be ready
1956 int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock) in nand_erase_op() argument
1959 (chip->phys_erase_shift - chip->page_shift); in nand_erase_op()
1963 if (nand_has_exec_op(chip)) { in nand_erase_op()
1965 nand_get_interface_config(chip); in nand_erase_op()
1975 struct nand_operation op = NAND_DESTRUCTIVE_OPERATION(chip->cur_cs, in nand_erase_op()
1978 if (chip->options & NAND_ROW_ADDR_3) in nand_erase_op()
1981 ret = nand_exec_op(chip, &op); in nand_erase_op()
1985 ret = nand_status_op(chip, &status); in nand_erase_op()
1989 chip->legacy.cmdfunc(chip, NAND_CMD_ERASE1, -1, page); in nand_erase_op()
1990 chip->legacy.cmdfunc(chip, NAND_CMD_ERASE2, -1, -1); in nand_erase_op()
1992 ret = chip->legacy.waitfunc(chip); in nand_erase_op()
2000 return -EIO; in nand_erase_op()
2007 * nand_set_features_op - Do a SET FEATURES operation
2008 * @chip: The NAND chip
2012 * This function sends a SET FEATURES command and waits for the NAND to be
2018 static int nand_set_features_op(struct nand_chip *chip, u8 feature, in nand_set_features_op() argument
2024 if (nand_has_exec_op(chip)) { in nand_set_features_op()
2026 nand_get_interface_config(chip); in nand_set_features_op()
2037 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_set_features_op()
2039 return nand_exec_op(chip, &op); in nand_set_features_op()
2042 chip->legacy.cmdfunc(chip, NAND_CMD_SET_FEATURES, feature, -1); in nand_set_features_op()
2044 chip->legacy.write_byte(chip, params[i]); in nand_set_features_op()
2046 ret = chip->legacy.waitfunc(chip); in nand_set_features_op()
2051 return -EIO; in nand_set_features_op()
2057 * nand_get_features_op - Do a GET FEATURES operation
2058 * @chip: The NAND chip
2062 * This function sends a GET FEATURES command and waits for the NAND to be
2068 static int nand_get_features_op(struct nand_chip *chip, u8 feature, in nand_get_features_op() argument
2074 if (nand_has_exec_op(chip)) { in nand_get_features_op()
2076 nand_get_interface_config(chip); in nand_get_features_op()
2086 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_get_features_op()
2089 /* GET_FEATURE data bytes are received twice in NV-DDR mode */ in nand_get_features_op()
2095 ret = nand_exec_op(chip, &op); in nand_get_features_op()
2104 chip->legacy.cmdfunc(chip, NAND_CMD_GET_FEATURES, feature, -1); in nand_get_features_op()
2106 params[i] = chip->legacy.read_byte(chip); in nand_get_features_op()
2111 static int nand_wait_rdy_op(struct nand_chip *chip, unsigned int timeout_ms, in nand_wait_rdy_op() argument
2114 if (nand_has_exec_op(chip)) { in nand_wait_rdy_op()
2119 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_wait_rdy_op()
2121 return nand_exec_op(chip, &op); in nand_wait_rdy_op()
2125 if (!chip->legacy.dev_ready) in nand_wait_rdy_op()
2126 udelay(chip->legacy.chip_delay); in nand_wait_rdy_op()
2128 nand_wait_ready(chip); in nand_wait_rdy_op()
2134 * nand_reset_op - Do a reset operation
2135 * @chip: The NAND chip
2137 * This function sends a RESET command and waits for the NAND to be ready
2143 int nand_reset_op(struct nand_chip *chip) in nand_reset_op() argument
2145 if (nand_has_exec_op(chip)) { in nand_reset_op()
2147 nand_get_interface_config(chip); in nand_reset_op()
2154 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_reset_op()
2156 return nand_exec_op(chip, &op); in nand_reset_op()
2159 chip->legacy.cmdfunc(chip, NAND_CMD_RESET, -1, -1); in nand_reset_op()
2166 * nand_read_data_op - Read data from the NAND
2167 * @chip: The NAND chip
2168 * @buf: buffer used to store the data
2170 * @force_8bit: force 8-bit bus access
2180 int nand_read_data_op(struct nand_chip *chip, void *buf, unsigned int len, in nand_read_data_op() argument
2184 return -EINVAL; in nand_read_data_op()
2186 if (nand_has_exec_op(chip)) { in nand_read_data_op()
2188 nand_get_interface_config(chip); in nand_read_data_op()
2192 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_read_data_op()
2202 * case NV-DDR timings are being used the data will be received in nand_read_data_op()
2208 return -ENOMEM; in nand_read_data_op()
2215 ret = nand_check_op(chip, &op); in nand_read_data_op()
2220 ret = nand_exec_op(chip, &op); in nand_read_data_op()
2241 p[i] = chip->legacy.read_byte(chip); in nand_read_data_op()
2243 chip->legacy.read_buf(chip, buf, len); in nand_read_data_op()
2251 * nand_write_data_op - Write data from the NAND
2252 * @chip: The NAND chip
2253 * @buf: buffer containing the data to send on the bus
2255 * @force_8bit: force 8-bit bus access
2263 int nand_write_data_op(struct nand_chip *chip, const void *buf, in nand_write_data_op() argument
2267 return -EINVAL; in nand_write_data_op()
2269 if (nand_has_exec_op(chip)) { in nand_write_data_op()
2273 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_write_data_op()
2277 return nand_exec_op(chip, &op); in nand_write_data_op()
2285 chip->legacy.write_byte(chip, p[i]); in nand_write_data_op()
2287 chip->legacy.write_buf(chip, buf, len); in nand_write_data_op()
2295 * struct nand_op_parser_ctx - Context used by the parser
2298 * @subop: Sub-operation to be passed to the NAND controller
2300 * This structure is used by the core to split NAND operations into
2301 * sub-operations that can be handled by the NAND controller.
2310 * nand_op_parser_must_split_instr - Checks if an instruction must be split
2312 * @instr: pointer to the instruction to check
2314 * split, then @start_offset is the offset from which to start
2317 * split), this parameter is updated to point to the first
2323 * controller-operation into two or more chunks.
2326 * The @start_offset parameter is also updated to the offset at which the next
2334 switch (pat->type) { in nand_op_parser_must_split_instr()
2336 if (!pat->ctx.addr.maxcycles) in nand_op_parser_must_split_instr()
2339 if (instr->ctx.addr.naddrs - *start_offset > in nand_op_parser_must_split_instr()
2340 pat->ctx.addr.maxcycles) { in nand_op_parser_must_split_instr()
2341 *start_offset += pat->ctx.addr.maxcycles; in nand_op_parser_must_split_instr()
2348 if (!pat->ctx.data.maxlen) in nand_op_parser_must_split_instr()
2351 if (instr->ctx.data.len - *start_offset > in nand_op_parser_must_split_instr()
2352 pat->ctx.data.maxlen) { in nand_op_parser_must_split_instr()
2353 *start_offset += pat->ctx.data.maxlen; in nand_op_parser_must_split_instr()
2366 * nand_op_parser_match_pat - Checks if a pattern matches the instructions
2368 * @pat: the pattern to test
2369 * @ctx: the parser context structure to match with the pattern @pat
2371 * Check if @pat matches the set or a sub-set of instructions remaining in @ctx.
2373 * @ctx->subop is updated with the set of instructions to be passed to the
2380 unsigned int instr_offset = ctx->subop.first_instr_start_off; in nand_op_parser_match_pat()
2381 const struct nand_op_instr *end = ctx->instrs + ctx->ninstrs; in nand_op_parser_match_pat()
2382 const struct nand_op_instr *instr = ctx->subop.instrs; in nand_op_parser_match_pat()
2385 for (i = 0, ninstrs = 0; i < pat->nelems && instr < end; i++) { in nand_op_parser_match_pat()
2390 * to the next one. If the element is mandatory, there's no in nand_op_parser_match_pat()
2393 if (instr->type != pat->elems[i].type) { in nand_op_parser_match_pat()
2394 if (!pat->elems[i].optional) in nand_op_parser_match_pat()
2402 * not able to handle the whole instruction in a single step, in nand_op_parser_match_pat()
2403 * we have to split it. in nand_op_parser_match_pat()
2404 * The last_instr_end_off value comes back updated to point to in nand_op_parser_match_pat()
2405 * the position where we have to split the instruction (the in nand_op_parser_match_pat()
2408 if (nand_op_parser_must_split_instr(&pat->elems[i], instr, in nand_op_parser_match_pat()
2431 * than the instructions we're asked to execute. We need to make sure in nand_op_parser_match_pat()
2434 for (; i < pat->nelems; i++) { in nand_op_parser_match_pat()
2435 if (!pat->elems[i].optional) in nand_op_parser_match_pat()
2443 ctx->subop.ninstrs = ninstrs; in nand_op_parser_match_pat()
2444 ctx->subop.last_instr_end_off = instr_offset; in nand_op_parser_match_pat()
2456 pr_debug("executing subop (CS%d):\n", ctx->subop.cs); in nand_op_parser_trace()
2458 for (i = 0; i < ctx->ninstrs; i++) { in nand_op_parser_trace()
2459 instr = &ctx->instrs[i]; in nand_op_parser_trace()
2461 if (instr == &ctx->subop.instrs[0]) in nand_op_parser_trace()
2462 prefix = " ->"; in nand_op_parser_trace()
2466 if (instr == &ctx->subop.instrs[ctx->subop.ninstrs - 1]) in nand_op_parser_trace()
2480 if (a->subop.ninstrs < b->subop.ninstrs) in nand_op_parser_cmp_ctx()
2481 return -1; in nand_op_parser_cmp_ctx()
2482 else if (a->subop.ninstrs > b->subop.ninstrs) in nand_op_parser_cmp_ctx()
2485 if (a->subop.last_instr_end_off < b->subop.last_instr_end_off) in nand_op_parser_cmp_ctx()
2486 return -1; in nand_op_parser_cmp_ctx()
2487 else if (a->subop.last_instr_end_off > b->subop.last_instr_end_off) in nand_op_parser_cmp_ctx()
2494 * nand_op_parser_exec_op - exec_op parser
2495 * @chip: the NAND chip
2497 * @op: the NAND operation to address
2501 * Helper function designed to ease integration of NAND controller drivers that
2504 * multiple sub-operations (if required) and pass them back to the ->exec()
2505 * callback of the matching pattern if @check_only is set to false.
2507 * NAND controller drivers should call this function from their own ->exec_op()
2512 * to handle the requested operation), or an error returned by one of the
2513 * matching pattern->exec() hook.
2515 int nand_op_parser_exec_op(struct nand_chip *chip, in nand_op_parser_exec_op() argument
2520 .subop.cs = op->cs, in nand_op_parser_exec_op()
2521 .subop.instrs = op->instrs, in nand_op_parser_exec_op()
2522 .instrs = op->instrs, in nand_op_parser_exec_op()
2523 .ninstrs = op->ninstrs, in nand_op_parser_exec_op()
2527 while (ctx.subop.instrs < op->instrs + op->ninstrs) { in nand_op_parser_exec_op()
2530 int ret, best_pattern = -1; in nand_op_parser_exec_op()
2532 for (i = 0; i < parser->npatterns; i++) { in nand_op_parser_exec_op()
2535 pattern = &parser->patterns[i]; in nand_op_parser_exec_op()
2548 pr_debug("->exec_op() parser: pattern not found!\n"); in nand_op_parser_exec_op()
2549 return -ENOTSUPP; in nand_op_parser_exec_op()
2556 pattern = &parser->patterns[best_pattern]; in nand_op_parser_exec_op()
2557 ret = pattern->exec(chip, &ctx.subop); in nand_op_parser_exec_op()
2563 * Update the context structure by pointing to the start of the in nand_op_parser_exec_op()
2568 ctx.subop.instrs -= 1; in nand_op_parser_exec_op()
2579 return instr && (instr->type == NAND_OP_DATA_IN_INSTR || in nand_instr_is_data()
2580 instr->type == NAND_OP_DATA_OUT_INSTR); in nand_instr_is_data()
2586 return subop && instr_idx < subop->ninstrs; in nand_subop_instr_is_valid()
2595 return subop->first_instr_start_off; in nand_subop_get_start_off()
2599 * nand_subop_get_addr_start_off - Get the start offset in an address array
2600 * @subop: The entire sub-operation
2601 * @instr_idx: Index of the instruction inside the sub-operation
2603 * During driver development, one could be tempted to directly use the
2604 * ->addr.addrs field of address instructions. This is wrong as address
2607 * Given an address instruction, returns the offset of the first cycle to issue.
2613 subop->instrs[instr_idx].type != NAND_OP_ADDR_INSTR)) in nand_subop_get_addr_start_off()
2621 * nand_subop_get_num_addr_cyc - Get the remaining address cycles to assert
2622 * @subop: The entire sub-operation
2623 * @instr_idx: Index of the instruction inside the sub-operation
2625 * During driver development, one could be tempted to directly use the
2626 * ->addr->naddrs field of a data instruction. This is wrong as instructions
2629 * Given an address instruction, returns the number of address cycle to issue.
2637 subop->instrs[instr_idx].type != NAND_OP_ADDR_INSTR)) in nand_subop_get_num_addr_cyc()
2642 if (instr_idx == subop->ninstrs - 1 && in nand_subop_get_num_addr_cyc()
2643 subop->last_instr_end_off) in nand_subop_get_num_addr_cyc()
2644 end_off = subop->last_instr_end_off; in nand_subop_get_num_addr_cyc()
2646 end_off = subop->instrs[instr_idx].ctx.addr.naddrs; in nand_subop_get_num_addr_cyc()
2648 return end_off - start_off; in nand_subop_get_num_addr_cyc()
2653 * nand_subop_get_data_start_off - Get the start offset in a data array
2654 * @subop: The entire sub-operation
2655 * @instr_idx: Index of the instruction inside the sub-operation
2657 * During driver development, one could be tempted to directly use the
2658 * ->data->buf.{in,out} field of data instructions. This is wrong as data
2661 * Given a data instruction, returns the offset to start from.
2667 !nand_instr_is_data(&subop->instrs[instr_idx]))) in nand_subop_get_data_start_off()
2675 * nand_subop_get_data_len - Get the number of bytes to retrieve
2676 * @subop: The entire sub-operation
2677 * @instr_idx: Index of the instruction inside the sub-operation
2679 * During driver development, one could be tempted to directly use the
2680 * ->data->len field of a data instruction. This is wrong as data instructions
2683 * Returns the length of the chunk of data to send/receive.
2691 !nand_instr_is_data(&subop->instrs[instr_idx]))) in nand_subop_get_data_len()
2696 if (instr_idx == subop->ninstrs - 1 && in nand_subop_get_data_len()
2697 subop->last_instr_end_off) in nand_subop_get_data_len()
2698 end_off = subop->last_instr_end_off; in nand_subop_get_data_len()
2700 end_off = subop->instrs[instr_idx].ctx.data.len; in nand_subop_get_data_len()
2702 return end_off - start_off; in nand_subop_get_data_len()
2707 * nand_reset - Reset and initialize a NAND device
2708 * @chip: The NAND chip
2717 int nand_reset(struct nand_chip *chip, int chipnr) in nand_reset() argument
2721 ret = nand_reset_interface(chip, chipnr); in nand_reset()
2726 * The CS line has to be released before we can apply the new NAND in nand_reset()
2730 nand_select_target(chip, chipnr); in nand_reset()
2731 ret = nand_reset_op(chip); in nand_reset()
2732 nand_deselect_target(chip); in nand_reset()
2736 ret = nand_setup_interface(chip, chipnr); in nand_reset()
2745 * nand_get_features - wrapper to perform a GET_FEATURE
2746 * @chip: NAND chip info structure
2750 * Returns 0 for success, a negative error otherwise. Returns -ENOTSUPP if the
2753 int nand_get_features(struct nand_chip *chip, int addr, in nand_get_features() argument
2756 if (!nand_supports_get_features(chip, addr)) in nand_get_features()
2757 return -ENOTSUPP; in nand_get_features()
2759 if (chip->legacy.get_features) in nand_get_features()
2760 return chip->legacy.get_features(chip, addr, subfeature_param); in nand_get_features()
2762 return nand_get_features_op(chip, addr, subfeature_param); in nand_get_features()
2766 * nand_set_features - wrapper to perform a SET_FEATURE
2767 * @chip: NAND chip info structure
2771 * Returns 0 for success, a negative error otherwise. Returns -ENOTSUPP if the
2774 int nand_set_features(struct nand_chip *chip, int addr, in nand_set_features() argument
2777 if (!nand_supports_set_features(chip, addr)) in nand_set_features()
2778 return -ENOTSUPP; in nand_set_features()
2780 if (chip->legacy.set_features) in nand_set_features()
2781 return chip->legacy.set_features(chip, addr, subfeature_param); in nand_set_features()
2783 return nand_set_features_op(chip, addr, subfeature_param); in nand_set_features()
2787 * nand_check_erased_buf - check if a buffer contains (almost) only 0xff data
2788 * @buf: buffer to test
2793 * has been erased and is ready to be programmed.
2801 * Returns a positive number of bitflips less than or equal to
2802 * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
2812 len--, bitmap++) { in nand_check_erased_buf()
2814 bitflips += BITS_PER_BYTE - weight; in nand_check_erased_buf()
2816 return -EBADMSG; in nand_check_erased_buf()
2820 len -= sizeof(long), bitmap += sizeof(long)) { in nand_check_erased_buf()
2825 bitflips += BITS_PER_LONG - weight; in nand_check_erased_buf()
2827 return -EBADMSG; in nand_check_erased_buf()
2830 for (; len > 0; len--, bitmap++) { in nand_check_erased_buf()
2832 bitflips += BITS_PER_BYTE - weight; in nand_check_erased_buf()
2834 return -EBADMSG; in nand_check_erased_buf()
2841 * nand_check_erased_ecc_chunk - check if an ECC chunk contains (almost) only
2843 * @data: data buffer to test
2853 * ready to be programmed.
2858 * 1/ ECC algorithms are working on pre-defined block sizes which are usually
2861 * expect you to return the maximum number of bitflips for the whole page.
2867 * have programmed almost all bits to 1 but a few. In this case, we
2872 * It could also be used if you support subpages and want to attach some
2873 * extra OOB data to an ECC chunk.
2875 * Returns a positive number of bitflips less than or equal to
2876 * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
2891 bitflips_threshold -= data_bitflips; in nand_check_erased_ecc_chunk()
2897 bitflips_threshold -= ecc_bitflips; in nand_check_erased_ecc_chunk()
2918 * nand_read_page_raw_notsupp - dummy read raw page function
2919 * @chip: nand chip info structure
2920 * @buf: buffer to store read data
2921 * @oob_required: caller requires OOB data read to chip->oob_poi
2922 * @page: page number to read
2924 * Returns -ENOTSUPP unconditionally.
2926 int nand_read_page_raw_notsupp(struct nand_chip *chip, u8 *buf, in nand_read_page_raw_notsupp() argument
2929 return -ENOTSUPP; in nand_read_page_raw_notsupp()
2933 * nand_read_page_raw - [INTERN] read raw page data without ecc
2934 * @chip: nand chip info structure
2935 * @buf: buffer to store read data
2936 * @oob_required: caller requires OOB data read to chip->oob_poi
2937 * @page: page number to read
2941 int nand_read_page_raw(struct nand_chip *chip, uint8_t *buf, int oob_required, in nand_read_page_raw() argument
2944 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_raw()
2947 ret = nand_read_page_op(chip, page, 0, buf, mtd->writesize); in nand_read_page_raw()
2952 ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, in nand_read_page_raw()
2963 * nand_monolithic_read_page_raw - Monolithic page read in raw mode
2964 * @chip: NAND chip info structure
2965 * @buf: buffer to store read data
2966 * @oob_required: caller requires OOB data read to chip->oob_poi
2967 * @page: page number to read
2971 * eventually OOB) to be loaded in the NAND cache and sent over the
2972 * bus (from the NAND chip to the NAND controller) in a single
2973 * operation. This is an alternative to nand_read_page_raw(), which
2977 int nand_monolithic_read_page_raw(struct nand_chip *chip, u8 *buf, in nand_monolithic_read_page_raw() argument
2980 struct mtd_info *mtd = nand_to_mtd(chip); in nand_monolithic_read_page_raw()
2981 unsigned int size = mtd->writesize; in nand_monolithic_read_page_raw()
2986 size += mtd->oobsize; in nand_monolithic_read_page_raw()
2988 if (buf != chip->data_buf) in nand_monolithic_read_page_raw()
2989 read_buf = nand_get_data_buf(chip); in nand_monolithic_read_page_raw()
2992 ret = nand_read_page_op(chip, page, 0, read_buf, size); in nand_monolithic_read_page_raw()
2996 if (buf != chip->data_buf) in nand_monolithic_read_page_raw()
2997 memcpy(buf, read_buf, mtd->writesize); in nand_monolithic_read_page_raw()
3004 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
3005 * @chip: nand chip info structure
3006 * @buf: buffer to store read data
3007 * @oob_required: caller requires OOB data read to chip->oob_poi
3008 * @page: page number to read
3012 static int nand_read_page_raw_syndrome(struct nand_chip *chip, uint8_t *buf, in nand_read_page_raw_syndrome() argument
3015 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_raw_syndrome()
3016 int eccsize = chip->ecc.size; in nand_read_page_raw_syndrome()
3017 int eccbytes = chip->ecc.bytes; in nand_read_page_raw_syndrome()
3018 uint8_t *oob = chip->oob_poi; in nand_read_page_raw_syndrome()
3021 ret = nand_read_page_op(chip, page, 0, NULL, 0); in nand_read_page_raw_syndrome()
3025 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_read_page_raw_syndrome()
3026 ret = nand_read_data_op(chip, buf, eccsize, false, false); in nand_read_page_raw_syndrome()
3032 if (chip->ecc.prepad) { in nand_read_page_raw_syndrome()
3033 ret = nand_read_data_op(chip, oob, chip->ecc.prepad, in nand_read_page_raw_syndrome()
3038 oob += chip->ecc.prepad; in nand_read_page_raw_syndrome()
3041 ret = nand_read_data_op(chip, oob, eccbytes, false, false); in nand_read_page_raw_syndrome()
3047 if (chip->ecc.postpad) { in nand_read_page_raw_syndrome()
3048 ret = nand_read_data_op(chip, oob, chip->ecc.postpad, in nand_read_page_raw_syndrome()
3053 oob += chip->ecc.postpad; in nand_read_page_raw_syndrome()
3057 size = mtd->oobsize - (oob - chip->oob_poi); in nand_read_page_raw_syndrome()
3059 ret = nand_read_data_op(chip, oob, size, false, false); in nand_read_page_raw_syndrome()
3068 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
3069 * @chip: nand chip info structure
3070 * @buf: buffer to store read data
3071 * @oob_required: caller requires OOB data read to chip->oob_poi
3072 * @page: page number to read
3074 static int nand_read_page_swecc(struct nand_chip *chip, uint8_t *buf, in nand_read_page_swecc() argument
3077 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_swecc()
3078 int i, eccsize = chip->ecc.size, ret; in nand_read_page_swecc()
3079 int eccbytes = chip->ecc.bytes; in nand_read_page_swecc()
3080 int eccsteps = chip->ecc.steps; in nand_read_page_swecc()
3082 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_read_page_swecc()
3083 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_swecc()
3086 chip->ecc.read_page_raw(chip, buf, 1, page); in nand_read_page_swecc()
3088 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) in nand_read_page_swecc()
3089 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_read_page_swecc()
3091 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in nand_read_page_swecc()
3092 chip->ecc.total); in nand_read_page_swecc()
3096 eccsteps = chip->ecc.steps; in nand_read_page_swecc()
3099 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_swecc()
3102 stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_swecc()
3104 mtd->ecc_stats.failed++; in nand_read_page_swecc()
3106 mtd->ecc_stats.corrected += stat; in nand_read_page_swecc()
3114 * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
3115 * @chip: nand chip info structure
3118 * @bufpoi: buffer to store read data
3119 * @page: page number to read
3121 static int nand_read_subpage(struct nand_chip *chip, uint32_t data_offs, in nand_read_subpage() argument
3124 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_subpage()
3129 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1; in nand_read_subpage()
3134 /* Column address within the page aligned to ECC size (256bytes) */ in nand_read_subpage()
3135 start_step = data_offs / chip->ecc.size; in nand_read_subpage()
3136 end_step = (data_offs + readlen - 1) / chip->ecc.size; in nand_read_subpage()
3137 num_steps = end_step - start_step + 1; in nand_read_subpage()
3138 index = start_step * chip->ecc.bytes; in nand_read_subpage()
3140 /* Data size aligned to ECC ecc.size */ in nand_read_subpage()
3141 datafrag_len = num_steps * chip->ecc.size; in nand_read_subpage()
3142 eccfrag_len = num_steps * chip->ecc.bytes; in nand_read_subpage()
3144 data_col_addr = start_step * chip->ecc.size; in nand_read_subpage()
3147 ret = nand_read_page_op(chip, page, data_col_addr, p, datafrag_len); in nand_read_subpage()
3152 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) in nand_read_subpage()
3153 chip->ecc.calculate(chip, p, &chip->ecc.calc_buf[i]); in nand_read_subpage()
3156 * The performance is faster if we position offsets according to in nand_read_subpage()
3167 ret = nand_change_read_column_op(chip, mtd->writesize, in nand_read_subpage()
3168 chip->oob_poi, mtd->oobsize, in nand_read_subpage()
3174 * Send the command to read the particular ECC bytes take care in nand_read_subpage()
3177 aligned_pos = oobregion.offset & ~(busw - 1); in nand_read_subpage()
3179 if (oobregion.offset & (busw - 1)) in nand_read_subpage()
3181 if ((oobregion.offset + (num_steps * chip->ecc.bytes)) & in nand_read_subpage()
3182 (busw - 1)) in nand_read_subpage()
3185 ret = nand_change_read_column_op(chip, in nand_read_subpage()
3186 mtd->writesize + aligned_pos, in nand_read_subpage()
3187 &chip->oob_poi[aligned_pos], in nand_read_subpage()
3193 ret = mtd_ooblayout_get_eccbytes(mtd, chip->ecc.code_buf, in nand_read_subpage()
3194 chip->oob_poi, index, eccfrag_len); in nand_read_subpage()
3199 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { in nand_read_subpage()
3202 stat = chip->ecc.correct(chip, p, &chip->ecc.code_buf[i], in nand_read_subpage()
3203 &chip->ecc.calc_buf[i]); in nand_read_subpage()
3204 if (stat == -EBADMSG && in nand_read_subpage()
3205 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_subpage()
3207 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, in nand_read_subpage()
3208 &chip->ecc.code_buf[i], in nand_read_subpage()
3209 chip->ecc.bytes, in nand_read_subpage()
3211 chip->ecc.strength); in nand_read_subpage()
3215 mtd->ecc_stats.failed++; in nand_read_subpage()
3217 mtd->ecc_stats.corrected += stat; in nand_read_subpage()
3225 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
3226 * @chip: nand chip info structure
3227 * @buf: buffer to store read data
3228 * @oob_required: caller requires OOB data read to chip->oob_poi
3229 * @page: page number to read
3233 static int nand_read_page_hwecc(struct nand_chip *chip, uint8_t *buf, in nand_read_page_hwecc() argument
3236 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_hwecc()
3237 int i, eccsize = chip->ecc.size, ret; in nand_read_page_hwecc()
3238 int eccbytes = chip->ecc.bytes; in nand_read_page_hwecc()
3239 int eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
3241 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_read_page_hwecc()
3242 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_hwecc()
3245 ret = nand_read_page_op(chip, page, 0, NULL, 0); in nand_read_page_hwecc()
3249 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc()
3250 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_hwecc()
3252 ret = nand_read_data_op(chip, p, eccsize, false, false); in nand_read_page_hwecc()
3256 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_read_page_hwecc()
3259 ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, false, in nand_read_page_hwecc()
3264 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in nand_read_page_hwecc()
3265 chip->ecc.total); in nand_read_page_hwecc()
3269 eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
3272 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc()
3275 stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_hwecc()
3276 if (stat == -EBADMSG && in nand_read_page_hwecc()
3277 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_hwecc()
3282 chip->ecc.strength); in nand_read_page_hwecc()
3286 mtd->ecc_stats.failed++; in nand_read_page_hwecc()
3288 mtd->ecc_stats.corrected += stat; in nand_read_page_hwecc()
3296 * nand_read_page_hwecc_oob_first - Hardware ECC page read with ECC
3298 * @chip: nand chip info structure
3299 * @buf: buffer to store read data
3300 * @oob_required: caller requires OOB data read to chip->oob_poi
3301 * @page: page number to read
3303 * Hardware ECC for large page chips, which requires the ECC data to be
3306 int nand_read_page_hwecc_oob_first(struct nand_chip *chip, uint8_t *buf, in nand_read_page_hwecc_oob_first() argument
3309 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_hwecc_oob_first()
3310 int i, eccsize = chip->ecc.size, ret; in nand_read_page_hwecc_oob_first()
3311 int eccbytes = chip->ecc.bytes; in nand_read_page_hwecc_oob_first()
3312 int eccsteps = chip->ecc.steps; in nand_read_page_hwecc_oob_first()
3314 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_hwecc_oob_first()
3318 ret = nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize); in nand_read_page_hwecc_oob_first()
3322 /* Move read cursor to start of page */ in nand_read_page_hwecc_oob_first()
3323 ret = nand_change_read_column_op(chip, 0, NULL, 0, false); in nand_read_page_hwecc_oob_first()
3327 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in nand_read_page_hwecc_oob_first()
3328 chip->ecc.total); in nand_read_page_hwecc_oob_first()
3332 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc_oob_first()
3335 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_hwecc_oob_first()
3337 ret = nand_read_data_op(chip, p, eccsize, false, false); in nand_read_page_hwecc_oob_first()
3341 stat = chip->ecc.correct(chip, p, &ecc_code[i], NULL); in nand_read_page_hwecc_oob_first()
3342 if (stat == -EBADMSG && in nand_read_page_hwecc_oob_first()
3343 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_hwecc_oob_first()
3348 chip->ecc.strength); in nand_read_page_hwecc_oob_first()
3352 mtd->ecc_stats.failed++; in nand_read_page_hwecc_oob_first()
3354 mtd->ecc_stats.corrected += stat; in nand_read_page_hwecc_oob_first()
3363 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
3364 * @chip: nand chip info structure
3365 * @buf: buffer to store read data
3366 * @oob_required: caller requires OOB data read to chip->oob_poi
3367 * @page: page number to read
3372 static int nand_read_page_syndrome(struct nand_chip *chip, uint8_t *buf, in nand_read_page_syndrome() argument
3375 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_syndrome()
3376 int ret, i, eccsize = chip->ecc.size; in nand_read_page_syndrome()
3377 int eccbytes = chip->ecc.bytes; in nand_read_page_syndrome()
3378 int eccsteps = chip->ecc.steps; in nand_read_page_syndrome()
3379 int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad; in nand_read_page_syndrome()
3381 uint8_t *oob = chip->oob_poi; in nand_read_page_syndrome()
3384 ret = nand_read_page_op(chip, page, 0, NULL, 0); in nand_read_page_syndrome()
3388 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_syndrome()
3391 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_syndrome()
3393 ret = nand_read_data_op(chip, p, eccsize, false, false); in nand_read_page_syndrome()
3397 if (chip->ecc.prepad) { in nand_read_page_syndrome()
3398 ret = nand_read_data_op(chip, oob, chip->ecc.prepad, in nand_read_page_syndrome()
3403 oob += chip->ecc.prepad; in nand_read_page_syndrome()
3406 chip->ecc.hwctl(chip, NAND_ECC_READSYN); in nand_read_page_syndrome()
3408 ret = nand_read_data_op(chip, oob, eccbytes, false, false); in nand_read_page_syndrome()
3412 stat = chip->ecc.correct(chip, p, oob, NULL); in nand_read_page_syndrome()
3416 if (chip->ecc.postpad) { in nand_read_page_syndrome()
3417 ret = nand_read_data_op(chip, oob, chip->ecc.postpad, in nand_read_page_syndrome()
3422 oob += chip->ecc.postpad; in nand_read_page_syndrome()
3425 if (stat == -EBADMSG && in nand_read_page_syndrome()
3426 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_syndrome()
3428 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, in nand_read_page_syndrome()
3429 oob - eccpadbytes, in nand_read_page_syndrome()
3432 chip->ecc.strength); in nand_read_page_syndrome()
3436 mtd->ecc_stats.failed++; in nand_read_page_syndrome()
3438 mtd->ecc_stats.corrected += stat; in nand_read_page_syndrome()
3444 i = mtd->oobsize - (oob - chip->oob_poi); in nand_read_page_syndrome()
3446 ret = nand_read_data_op(chip, oob, i, false, false); in nand_read_page_syndrome()
3455 * nand_transfer_oob - [INTERN] Transfer oob to client buffer
3456 * @chip: NAND chip object
3459 * @len: size of oob to transfer
3461 static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob, in nand_transfer_oob() argument
3464 struct mtd_info *mtd = nand_to_mtd(chip); in nand_transfer_oob()
3467 switch (ops->mode) { in nand_transfer_oob()
3471 memcpy(oob, chip->oob_poi + ops->ooboffs, len); in nand_transfer_oob()
3475 ret = mtd_ooblayout_get_databytes(mtd, oob, chip->oob_poi, in nand_transfer_oob()
3476 ops->ooboffs, len); in nand_transfer_oob()
3486 static void rawnand_enable_cont_reads(struct nand_chip *chip, unsigned int page, in rawnand_enable_cont_reads() argument
3489 struct mtd_info *mtd = nand_to_mtd(chip); in rawnand_enable_cont_reads()
3492 chip->cont_read.ongoing = false; in rawnand_enable_cont_reads()
3494 if (!chip->controller->supported_op.cont_read) in rawnand_enable_cont_reads()
3501 if (readlen < (2 * mtd->writesize)) in rawnand_enable_cont_reads()
3510 last_page = page + ((col + readlen) / mtd->writesize) - 1; in rawnand_enable_cont_reads()
3514 chip->cont_read.first_page = first_page; in rawnand_enable_cont_reads()
3515 chip->cont_read.last_page = last_page; in rawnand_enable_cont_reads()
3516 chip->cont_read.ongoing = true; in rawnand_enable_cont_reads()
3518 rawnand_cap_cont_reads(chip); in rawnand_enable_cont_reads()
3522 static void rawnand_cont_read_skip_first_page(struct nand_chip *chip, unsigned int page) in rawnand_cont_read_skip_first_page() argument
3524 if (!chip->cont_read.ongoing || page != chip->cont_read.first_page) in rawnand_cont_read_skip_first_page()
3527 chip->cont_read.first_page++; in rawnand_cont_read_skip_first_page()
3528 rawnand_cap_cont_reads(chip); in rawnand_cont_read_skip_first_page()
3532 * nand_setup_read_retry - [INTERN] Set the READ RETRY mode
3533 * @chip: NAND chip object
3534 * @retry_mode: the retry mode to use
3536 * Some vendors supply a special command to shift the Vt threshold, to be used
3540 static int nand_setup_read_retry(struct nand_chip *chip, int retry_mode) in nand_setup_read_retry() argument
3544 if (retry_mode >= chip->read_retries) in nand_setup_read_retry()
3545 return -EINVAL; in nand_setup_read_retry()
3547 if (!chip->ops.setup_read_retry) in nand_setup_read_retry()
3548 return -EOPNOTSUPP; in nand_setup_read_retry()
3550 return chip->ops.setup_read_retry(chip, retry_mode); in nand_setup_read_retry()
3553 static void nand_wait_readrdy(struct nand_chip *chip) in nand_wait_readrdy() argument
3557 if (!(chip->options & NAND_NEED_READRDY)) in nand_wait_readrdy()
3560 conf = nand_get_interface_config(chip); in nand_wait_readrdy()
3561 WARN_ON(nand_wait_rdy_op(chip, NAND_COMMON_TIMING_MS(conf, tR_max), 0)); in nand_wait_readrdy()
3565 * nand_do_read_ops - [INTERN] Read data with ECC
3566 * @chip: NAND chip object
3567 * @from: offset to read from
3570 * Internal function. Called with chip held.
3572 static int nand_do_read_ops(struct nand_chip *chip, loff_t from, in nand_do_read_ops() argument
3576 struct mtd_info *mtd = nand_to_mtd(chip); in nand_do_read_ops()
3578 uint32_t readlen = ops->len; in nand_do_read_ops()
3579 uint32_t oobreadlen = ops->ooblen; in nand_do_read_ops()
3589 if (nand_region_is_secured(chip, from, readlen)) in nand_do_read_ops()
3590 return -EIO; in nand_do_read_ops()
3592 chipnr = (int)(from >> chip->chip_shift); in nand_do_read_ops()
3593 nand_select_target(chip, chipnr); in nand_do_read_ops()
3595 realpage = (int)(from >> chip->page_shift); in nand_do_read_ops()
3596 page = realpage & chip->pagemask; in nand_do_read_ops()
3598 col = (int)(from & (mtd->writesize - 1)); in nand_do_read_ops()
3600 buf = ops->datbuf; in nand_do_read_ops()
3601 oob = ops->oobbuf; in nand_do_read_ops()
3604 if (likely(ops->mode != MTD_OPS_RAW)) in nand_do_read_ops()
3605 rawnand_enable_cont_reads(chip, page, readlen, col); in nand_do_read_ops()
3608 struct mtd_ecc_stats ecc_stats = mtd->ecc_stats; in nand_do_read_ops()
3610 bytes = min(mtd->writesize - col, readlen); in nand_do_read_ops()
3611 aligned = (bytes == mtd->writesize); in nand_do_read_ops()
3615 else if (chip->options & NAND_USES_DMA) in nand_do_read_ops()
3618 chip->buf_align); in nand_do_read_ops()
3623 if (realpage != chip->pagecache.page || oob) { in nand_do_read_ops()
3624 bufpoi = use_bounce_buf ? chip->data_buf : buf; in nand_do_read_ops()
3635 if (unlikely(ops->mode == MTD_OPS_RAW)) in nand_do_read_ops()
3636 ret = chip->ecc.read_page_raw(chip, bufpoi, in nand_do_read_ops()
3639 else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) && in nand_do_read_ops()
3641 ret = chip->ecc.read_subpage(chip, col, bytes, in nand_do_read_ops()
3644 ret = chip->ecc.read_page(chip, bufpoi, in nand_do_read_ops()
3649 chip->pagecache.page = -1; in nand_do_read_ops()
3658 if (!NAND_HAS_SUBPAGE_READ(chip) && !oob && in nand_do_read_ops()
3659 !(mtd->ecc_stats.failed - ecc_stats.failed) && in nand_do_read_ops()
3660 (ops->mode != MTD_OPS_RAW)) { in nand_do_read_ops()
3661 chip->pagecache.page = realpage; in nand_do_read_ops()
3662 chip->pagecache.bitflips = ret; in nand_do_read_ops()
3665 chip->pagecache.page = -1; in nand_do_read_ops()
3674 oob = nand_transfer_oob(chip, oob, ops, in nand_do_read_ops()
3676 oobreadlen -= toread; in nand_do_read_ops()
3680 nand_wait_readrdy(chip); in nand_do_read_ops()
3682 if (mtd->ecc_stats.failed - ecc_stats.failed) { in nand_do_read_ops()
3683 if (retry_mode + 1 < chip->read_retries) { in nand_do_read_ops()
3685 ret = nand_setup_read_retry(chip, in nand_do_read_ops()
3691 mtd->ecc_stats = ecc_stats; in nand_do_read_ops()
3702 memcpy(buf, chip->data_buf + col, bytes); in nand_do_read_ops()
3705 chip->pagecache.bitflips); in nand_do_read_ops()
3707 rawnand_cont_read_skip_first_page(chip, page); in nand_do_read_ops()
3710 readlen -= bytes; in nand_do_read_ops()
3712 /* Reset to retry mode 0 */ in nand_do_read_ops()
3714 ret = nand_setup_read_retry(chip, 0); in nand_do_read_ops()
3723 /* For subsequent reads align to page boundary */ in nand_do_read_ops()
3728 page = realpage & chip->pagemask; in nand_do_read_ops()
3729 /* Check, if we cross a chip boundary */ in nand_do_read_ops()
3732 nand_deselect_target(chip); in nand_do_read_ops()
3733 nand_select_target(chip, chipnr); in nand_do_read_ops()
3736 nand_deselect_target(chip); in nand_do_read_ops()
3738 if (WARN_ON_ONCE(chip->cont_read.ongoing)) in nand_do_read_ops()
3739 chip->cont_read.ongoing = false; in nand_do_read_ops()
3741 ops->retlen = ops->len - (size_t) readlen; in nand_do_read_ops()
3743 ops->oobretlen = ops->ooblen - oobreadlen; in nand_do_read_ops()
3749 return -EBADMSG; in nand_do_read_ops()
3755 * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
3756 * @chip: nand chip info structure
3757 * @page: page number to read
3759 int nand_read_oob_std(struct nand_chip *chip, int page) in nand_read_oob_std() argument
3761 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_oob_std()
3763 return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize); in nand_read_oob_std()
3768 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
3770 * @chip: nand chip info structure
3771 * @page: page number to read
3773 static int nand_read_oob_syndrome(struct nand_chip *chip, int page) in nand_read_oob_syndrome() argument
3775 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_oob_syndrome()
3776 int length = mtd->oobsize; in nand_read_oob_syndrome()
3777 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_read_oob_syndrome()
3778 int eccsize = chip->ecc.size; in nand_read_oob_syndrome()
3779 uint8_t *bufpoi = chip->oob_poi; in nand_read_oob_syndrome()
3782 ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0); in nand_read_oob_syndrome()
3786 for (i = 0; i < chip->ecc.steps; i++) { in nand_read_oob_syndrome()
3791 if (mtd->writesize > 512) in nand_read_oob_syndrome()
3792 ret = nand_change_read_column_op(chip, pos, in nand_read_oob_syndrome()
3796 ret = nand_read_page_op(chip, page, pos, NULL, in nand_read_oob_syndrome()
3805 ret = nand_read_data_op(chip, bufpoi, toread, false, false); in nand_read_oob_syndrome()
3810 length -= toread; in nand_read_oob_syndrome()
3813 ret = nand_read_data_op(chip, bufpoi, length, false, false); in nand_read_oob_syndrome()
3822 * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
3823 * @chip: nand chip info structure
3824 * @page: page number to write
3826 int nand_write_oob_std(struct nand_chip *chip, int page) in nand_write_oob_std() argument
3828 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_oob_std()
3830 return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi, in nand_write_oob_std()
3831 mtd->oobsize); in nand_write_oob_std()
3836 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
3837 * with syndrome - only for large page flash
3838 * @chip: nand chip info structure
3839 * @page: page number to write
3841 static int nand_write_oob_syndrome(struct nand_chip *chip, int page) in nand_write_oob_syndrome() argument
3843 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_oob_syndrome()
3844 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_write_oob_syndrome()
3845 int eccsize = chip->ecc.size, length = mtd->oobsize; in nand_write_oob_syndrome()
3846 int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps; in nand_write_oob_syndrome()
3847 const uint8_t *bufpoi = chip->oob_poi; in nand_write_oob_syndrome()
3850 * data-ecc-data-ecc ... ecc-oob in nand_write_oob_syndrome()
3852 * data-pad-ecc-pad-data-pad .... ecc-pad-oob in nand_write_oob_syndrome()
3854 if (!chip->ecc.prepad && !chip->ecc.postpad) { in nand_write_oob_syndrome()
3860 ret = nand_prog_page_begin_op(chip, page, pos, NULL, 0); in nand_write_oob_syndrome()
3866 if (mtd->writesize <= 512) { in nand_write_oob_syndrome()
3873 ret = nand_write_data_op(chip, &fill, in nand_write_oob_syndrome()
3878 len -= num; in nand_write_oob_syndrome()
3882 ret = nand_change_write_column_op(chip, pos, in nand_write_oob_syndrome()
3892 ret = nand_write_data_op(chip, bufpoi, len, false); in nand_write_oob_syndrome()
3897 length -= len; in nand_write_oob_syndrome()
3900 ret = nand_write_data_op(chip, bufpoi, length, false); in nand_write_oob_syndrome()
3905 return nand_prog_page_end_op(chip); in nand_write_oob_syndrome()
3909 * nand_do_read_oob - [INTERN] NAND read out-of-band
3910 * @chip: NAND chip object
3911 * @from: offset to read from
3914 * NAND read out-of-band data from the spare area.
3916 static int nand_do_read_oob(struct nand_chip *chip, loff_t from, in nand_do_read_oob() argument
3919 struct mtd_info *mtd = nand_to_mtd(chip); in nand_do_read_oob()
3923 int readlen = ops->ooblen; in nand_do_read_oob()
3925 uint8_t *buf = ops->oobbuf; in nand_do_read_oob()
3932 if (nand_region_is_secured(chip, from, readlen)) in nand_do_read_oob()
3933 return -EIO; in nand_do_read_oob()
3935 stats = mtd->ecc_stats; in nand_do_read_oob()
3939 chipnr = (int)(from >> chip->chip_shift); in nand_do_read_oob()
3940 nand_select_target(chip, chipnr); in nand_do_read_oob()
3942 /* Shift to get page */ in nand_do_read_oob()
3943 realpage = (int)(from >> chip->page_shift); in nand_do_read_oob()
3944 page = realpage & chip->pagemask; in nand_do_read_oob()
3947 if (ops->mode == MTD_OPS_RAW) in nand_do_read_oob()
3948 ret = chip->ecc.read_oob_raw(chip, page); in nand_do_read_oob()
3950 ret = chip->ecc.read_oob(chip, page); in nand_do_read_oob()
3956 buf = nand_transfer_oob(chip, buf, ops, len); in nand_do_read_oob()
3958 nand_wait_readrdy(chip); in nand_do_read_oob()
3962 readlen -= len; in nand_do_read_oob()
3969 page = realpage & chip->pagemask; in nand_do_read_oob()
3970 /* Check, if we cross a chip boundary */ in nand_do_read_oob()
3973 nand_deselect_target(chip); in nand_do_read_oob()
3974 nand_select_target(chip, chipnr); in nand_do_read_oob()
3977 nand_deselect_target(chip); in nand_do_read_oob()
3979 ops->oobretlen = ops->ooblen - readlen; in nand_do_read_oob()
3984 if (mtd->ecc_stats.failed - stats.failed) in nand_do_read_oob()
3985 return -EBADMSG; in nand_do_read_oob()
3991 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
3993 * @from: offset to read from
3996 * NAND read data and/or out-of-band data.
4001 struct nand_chip *chip = mtd_to_nand(mtd); in nand_read_oob() local
4005 ops->retlen = 0; in nand_read_oob()
4007 if (ops->mode != MTD_OPS_PLACE_OOB && in nand_read_oob()
4008 ops->mode != MTD_OPS_AUTO_OOB && in nand_read_oob()
4009 ops->mode != MTD_OPS_RAW) in nand_read_oob()
4010 return -ENOTSUPP; in nand_read_oob()
4012 nand_get_device(chip); in nand_read_oob()
4014 old_stats = mtd->ecc_stats; in nand_read_oob()
4016 if (!ops->datbuf) in nand_read_oob()
4017 ret = nand_do_read_oob(chip, from, ops); in nand_read_oob()
4019 ret = nand_do_read_ops(chip, from, ops); in nand_read_oob()
4021 if (ops->stats) { in nand_read_oob()
4022 ops->stats->uncorrectable_errors += in nand_read_oob()
4023 mtd->ecc_stats.failed - old_stats.failed; in nand_read_oob()
4024 ops->stats->corrected_bitflips += in nand_read_oob()
4025 mtd->ecc_stats.corrected - old_stats.corrected; in nand_read_oob()
4028 nand_release_device(chip); in nand_read_oob()
4033 * nand_write_page_raw_notsupp - dummy raw page write function
4034 * @chip: nand chip info structure
4036 * @oob_required: must write chip->oob_poi to OOB
4037 * @page: page number to write
4039 * Returns -ENOTSUPP unconditionally.
4041 int nand_write_page_raw_notsupp(struct nand_chip *chip, const u8 *buf, in nand_write_page_raw_notsupp() argument
4044 return -ENOTSUPP; in nand_write_page_raw_notsupp()
4048 * nand_write_page_raw - [INTERN] raw page write function
4049 * @chip: nand chip info structure
4051 * @oob_required: must write chip->oob_poi to OOB
4052 * @page: page number to write
4056 int nand_write_page_raw(struct nand_chip *chip, const uint8_t *buf, in nand_write_page_raw() argument
4059 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_page_raw()
4062 ret = nand_prog_page_begin_op(chip, page, 0, buf, mtd->writesize); in nand_write_page_raw()
4067 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, in nand_write_page_raw()
4073 return nand_prog_page_end_op(chip); in nand_write_page_raw()
4078 * nand_monolithic_write_page_raw - Monolithic page write in raw mode
4079 * @chip: NAND chip info structure
4080 * @buf: data buffer to write
4081 * @oob_required: must write chip->oob_poi to OOB
4082 * @page: page number to write
4086 * eventually OOB) to be sent over the bus and effectively programmed
4087 * into the NAND chip arrays in a single operation. This is an
4088 * alternative to nand_write_page_raw(), which first sends the main
4090 * cycles on the NAND bus, and finally sends the program command to
4091 * synchronyze the NAND chip cache.
4093 int nand_monolithic_write_page_raw(struct nand_chip *chip, const u8 *buf, in nand_monolithic_write_page_raw() argument
4096 struct mtd_info *mtd = nand_to_mtd(chip); in nand_monolithic_write_page_raw()
4097 unsigned int size = mtd->writesize; in nand_monolithic_write_page_raw()
4101 size += mtd->oobsize; in nand_monolithic_write_page_raw()
4103 if (buf != chip->data_buf) { in nand_monolithic_write_page_raw()
4104 write_buf = nand_get_data_buf(chip); in nand_monolithic_write_page_raw()
4105 memcpy(write_buf, buf, mtd->writesize); in nand_monolithic_write_page_raw()
4109 return nand_prog_page_op(chip, page, 0, write_buf, size); in nand_monolithic_write_page_raw()
4114 * nand_write_page_raw_syndrome - [INTERN] raw page write function
4115 * @chip: nand chip info structure
4117 * @oob_required: must write chip->oob_poi to OOB
4118 * @page: page number to write
4122 static int nand_write_page_raw_syndrome(struct nand_chip *chip, in nand_write_page_raw_syndrome() argument
4126 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_page_raw_syndrome()
4127 int eccsize = chip->ecc.size; in nand_write_page_raw_syndrome()
4128 int eccbytes = chip->ecc.bytes; in nand_write_page_raw_syndrome()
4129 uint8_t *oob = chip->oob_poi; in nand_write_page_raw_syndrome()
4132 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0); in nand_write_page_raw_syndrome()
4136 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_write_page_raw_syndrome()
4137 ret = nand_write_data_op(chip, buf, eccsize, false); in nand_write_page_raw_syndrome()
4143 if (chip->ecc.prepad) { in nand_write_page_raw_syndrome()
4144 ret = nand_write_data_op(chip, oob, chip->ecc.prepad, in nand_write_page_raw_syndrome()
4149 oob += chip->ecc.prepad; in nand_write_page_raw_syndrome()
4152 ret = nand_write_data_op(chip, oob, eccbytes, false); in nand_write_page_raw_syndrome()
4158 if (chip->ecc.postpad) { in nand_write_page_raw_syndrome()
4159 ret = nand_write_data_op(chip, oob, chip->ecc.postpad, in nand_write_page_raw_syndrome()
4164 oob += chip->ecc.postpad; in nand_write_page_raw_syndrome()
4168 size = mtd->oobsize - (oob - chip->oob_poi); in nand_write_page_raw_syndrome()
4170 ret = nand_write_data_op(chip, oob, size, false); in nand_write_page_raw_syndrome()
4175 return nand_prog_page_end_op(chip); in nand_write_page_raw_syndrome()
4178 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
4179 * @chip: nand chip info structure
4181 * @oob_required: must write chip->oob_poi to OOB
4182 * @page: page number to write
4184 static int nand_write_page_swecc(struct nand_chip *chip, const uint8_t *buf, in nand_write_page_swecc() argument
4187 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_page_swecc()
4188 int i, eccsize = chip->ecc.size, ret; in nand_write_page_swecc()
4189 int eccbytes = chip->ecc.bytes; in nand_write_page_swecc()
4190 int eccsteps = chip->ecc.steps; in nand_write_page_swecc()
4191 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_page_swecc()
4195 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) in nand_write_page_swecc()
4196 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_write_page_swecc()
4198 ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0, in nand_write_page_swecc()
4199 chip->ecc.total); in nand_write_page_swecc()
4203 return chip->ecc.write_page_raw(chip, buf, 1, page); in nand_write_page_swecc()
4207 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
4208 * @chip: nand chip info structure
4210 * @oob_required: must write chip->oob_poi to OOB
4211 * @page: page number to write
4213 static int nand_write_page_hwecc(struct nand_chip *chip, const uint8_t *buf, in nand_write_page_hwecc() argument
4216 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_page_hwecc()
4217 int i, eccsize = chip->ecc.size, ret; in nand_write_page_hwecc()
4218 int eccbytes = chip->ecc.bytes; in nand_write_page_hwecc()
4219 int eccsteps = chip->ecc.steps; in nand_write_page_hwecc()
4220 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_page_hwecc()
4223 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0); in nand_write_page_hwecc()
4227 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_write_page_hwecc()
4228 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_page_hwecc()
4230 ret = nand_write_data_op(chip, p, eccsize, false); in nand_write_page_hwecc()
4234 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_write_page_hwecc()
4237 ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0, in nand_write_page_hwecc()
4238 chip->ecc.total); in nand_write_page_hwecc()
4242 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false); in nand_write_page_hwecc()
4246 return nand_prog_page_end_op(chip); in nand_write_page_hwecc()
4251 * nand_write_subpage_hwecc - [REPLACEABLE] hardware ECC based subpage write
4252 * @chip: nand chip info structure
4256 * @oob_required: must write chip->oob_poi to OOB
4257 * @page: page number to write
4259 static int nand_write_subpage_hwecc(struct nand_chip *chip, uint32_t offset, in nand_write_subpage_hwecc() argument
4263 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_subpage_hwecc()
4264 uint8_t *oob_buf = chip->oob_poi; in nand_write_subpage_hwecc()
4265 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_subpage_hwecc()
4266 int ecc_size = chip->ecc.size; in nand_write_subpage_hwecc()
4267 int ecc_bytes = chip->ecc.bytes; in nand_write_subpage_hwecc()
4268 int ecc_steps = chip->ecc.steps; in nand_write_subpage_hwecc()
4270 uint32_t end_step = (offset + data_len - 1) / ecc_size; in nand_write_subpage_hwecc()
4271 int oob_bytes = mtd->oobsize / ecc_steps; in nand_write_subpage_hwecc()
4274 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0); in nand_write_subpage_hwecc()
4280 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_subpage_hwecc()
4283 ret = nand_write_data_op(chip, buf, ecc_size, false); in nand_write_subpage_hwecc()
4287 /* mask ECC of un-touched subpages by padding 0xFF */ in nand_write_subpage_hwecc()
4291 chip->ecc.calculate(chip, buf, ecc_calc); in nand_write_subpage_hwecc()
4293 /* mask OOB of un-touched subpages by padding 0xFF */ in nand_write_subpage_hwecc()
4303 /* copy calculated ECC for whole page to chip->buffer->oob */ in nand_write_subpage_hwecc()
4304 /* this include masked-value(0xFF) for unwritten subpages */ in nand_write_subpage_hwecc()
4305 ecc_calc = chip->ecc.calc_buf; in nand_write_subpage_hwecc()
4306 ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0, in nand_write_subpage_hwecc()
4307 chip->ecc.total); in nand_write_subpage_hwecc()
4311 /* write OOB buffer to NAND device */ in nand_write_subpage_hwecc()
4312 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false); in nand_write_subpage_hwecc()
4316 return nand_prog_page_end_op(chip); in nand_write_subpage_hwecc()
4321 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
4322 * @chip: nand chip info structure
4324 * @oob_required: must write chip->oob_poi to OOB
4325 * @page: page number to write
4330 static int nand_write_page_syndrome(struct nand_chip *chip, const uint8_t *buf, in nand_write_page_syndrome() argument
4333 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_page_syndrome()
4334 int i, eccsize = chip->ecc.size; in nand_write_page_syndrome()
4335 int eccbytes = chip->ecc.bytes; in nand_write_page_syndrome()
4336 int eccsteps = chip->ecc.steps; in nand_write_page_syndrome()
4338 uint8_t *oob = chip->oob_poi; in nand_write_page_syndrome()
4341 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0); in nand_write_page_syndrome()
4345 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_write_page_syndrome()
4346 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_page_syndrome()
4348 ret = nand_write_data_op(chip, p, eccsize, false); in nand_write_page_syndrome()
4352 if (chip->ecc.prepad) { in nand_write_page_syndrome()
4353 ret = nand_write_data_op(chip, oob, chip->ecc.prepad, in nand_write_page_syndrome()
4358 oob += chip->ecc.prepad; in nand_write_page_syndrome()
4361 chip->ecc.calculate(chip, p, oob); in nand_write_page_syndrome()
4363 ret = nand_write_data_op(chip, oob, eccbytes, false); in nand_write_page_syndrome()
4369 if (chip->ecc.postpad) { in nand_write_page_syndrome()
4370 ret = nand_write_data_op(chip, oob, chip->ecc.postpad, in nand_write_page_syndrome()
4375 oob += chip->ecc.postpad; in nand_write_page_syndrome()
4380 i = mtd->oobsize - (oob - chip->oob_poi); in nand_write_page_syndrome()
4382 ret = nand_write_data_op(chip, oob, i, false); in nand_write_page_syndrome()
4387 return nand_prog_page_end_op(chip); in nand_write_page_syndrome()
4391 * nand_write_page - write one page
4392 * @chip: NAND chip descriptor
4394 * @data_len: length of actual data to be written
4395 * @buf: the data to write
4396 * @oob_required: must write chip->oob_poi to OOB
4397 * @page: page number to write
4400 static int nand_write_page(struct nand_chip *chip, uint32_t offset, in nand_write_page() argument
4404 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_page()
4407 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && in nand_write_page()
4408 chip->ecc.write_subpage) in nand_write_page()
4409 subpage = offset || (data_len < mtd->writesize); in nand_write_page()
4414 status = chip->ecc.write_page_raw(chip, buf, oob_required, in nand_write_page()
4417 status = chip->ecc.write_subpage(chip, offset, data_len, buf, in nand_write_page()
4420 status = chip->ecc.write_page(chip, buf, oob_required, page); in nand_write_page()
4428 #define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
4431 * nand_do_write_ops - [INTERN] NAND write with ECC
4432 * @chip: NAND chip object
4433 * @to: offset to write to
4438 static int nand_do_write_ops(struct nand_chip *chip, loff_t to, in nand_do_write_ops() argument
4441 struct mtd_info *mtd = nand_to_mtd(chip); in nand_do_write_ops()
4443 uint32_t writelen = ops->len; in nand_do_write_ops()
4445 uint32_t oobwritelen = ops->ooblen; in nand_do_write_ops()
4448 uint8_t *oob = ops->oobbuf; in nand_do_write_ops()
4449 uint8_t *buf = ops->datbuf; in nand_do_write_ops()
4453 ops->retlen = 0; in nand_do_write_ops()
4458 if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { in nand_do_write_ops()
4459 pr_notice("%s: attempt to write non page aligned data\n", in nand_do_write_ops()
4461 return -EINVAL; in nand_do_write_ops()
4465 if (nand_region_is_secured(chip, to, writelen)) in nand_do_write_ops()
4466 return -EIO; in nand_do_write_ops()
4468 column = to & (mtd->writesize - 1); in nand_do_write_ops()
4470 chipnr = (int)(to >> chip->chip_shift); in nand_do_write_ops()
4471 nand_select_target(chip, chipnr); in nand_do_write_ops()
4474 if (nand_check_wp(chip)) { in nand_do_write_ops()
4475 ret = -EIO; in nand_do_write_ops()
4479 realpage = (int)(to >> chip->page_shift); in nand_do_write_ops()
4480 page = realpage & chip->pagemask; in nand_do_write_ops()
4482 /* Invalidate the page cache, when we write to the cached page */ in nand_do_write_ops()
4483 if (to <= ((loff_t)chip->pagecache.page << chip->page_shift) && in nand_do_write_ops()
4484 ((loff_t)chip->pagecache.page << chip->page_shift) < (to + ops->len)) in nand_do_write_ops()
4485 chip->pagecache.page = -1; in nand_do_write_ops()
4488 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) { in nand_do_write_ops()
4489 ret = -EINVAL; in nand_do_write_ops()
4494 int bytes = mtd->writesize; in nand_do_write_ops()
4497 int part_pagewr = (column || writelen < mtd->writesize); in nand_do_write_ops()
4501 else if (chip->options & NAND_USES_DMA) in nand_do_write_ops()
4504 chip->buf_align); in nand_do_write_ops()
4516 bytes = min_t(int, bytes - column, writelen); in nand_do_write_ops()
4517 wbuf = nand_get_data_buf(chip); in nand_do_write_ops()
4518 memset(wbuf, 0xff, mtd->writesize); in nand_do_write_ops()
4524 oob = nand_fill_oob(chip, oob, len, ops); in nand_do_write_ops()
4525 oobwritelen -= len; in nand_do_write_ops()
4527 /* We still need to erase leftover OOB data */ in nand_do_write_ops()
4528 memset(chip->oob_poi, 0xff, mtd->oobsize); in nand_do_write_ops()
4531 ret = nand_write_page(chip, column, bytes, wbuf, in nand_do_write_ops()
4533 (ops->mode == MTD_OPS_RAW)); in nand_do_write_ops()
4537 writelen -= bytes; in nand_do_write_ops()
4545 page = realpage & chip->pagemask; in nand_do_write_ops()
4546 /* Check, if we cross a chip boundary */ in nand_do_write_ops()
4549 nand_deselect_target(chip); in nand_do_write_ops()
4550 nand_select_target(chip, chipnr); in nand_do_write_ops()
4554 ops->retlen = ops->len - writelen; in nand_do_write_ops()
4556 ops->oobretlen = ops->ooblen; in nand_do_write_ops()
4559 nand_deselect_target(chip); in nand_do_write_ops()
4564 * panic_nand_write - [MTD Interface] NAND write with ECC
4566 * @to: offset to write to
4567 * @len: number of bytes to write
4568 * @retlen: pointer to variable to store the number of written bytes
4569 * @buf: the data to write
4574 static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len, in panic_nand_write() argument
4577 struct nand_chip *chip = mtd_to_nand(mtd); in panic_nand_write() local
4578 int chipnr = (int)(to >> chip->chip_shift); in panic_nand_write()
4582 nand_select_target(chip, chipnr); in panic_nand_write()
4584 /* Wait for the device to get ready */ in panic_nand_write()
4585 panic_nand_wait(chip, 400); in panic_nand_write()
4592 ret = nand_do_write_ops(chip, to, &ops); in panic_nand_write()
4599 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
4601 * @to: offset to write to
4604 static int nand_write_oob(struct mtd_info *mtd, loff_t to, in nand_write_oob() argument
4607 struct nand_chip *chip = mtd_to_nand(mtd); in nand_write_oob() local
4610 ops->retlen = 0; in nand_write_oob()
4612 nand_get_device(chip); in nand_write_oob()
4614 switch (ops->mode) { in nand_write_oob()
4624 if (!ops->datbuf) in nand_write_oob()
4625 ret = nand_do_write_oob(chip, to, ops); in nand_write_oob()
4627 ret = nand_do_write_ops(chip, to, ops); in nand_write_oob()
4630 nand_release_device(chip); in nand_write_oob()
4635 * nand_erase - [MTD Interface] erase block(s)
4647 * nand_erase_nand - [INTERN] erase block(s)
4648 * @chip: NAND chip object
4654 int nand_erase_nand(struct nand_chip *chip, struct erase_info *instr, in nand_erase_nand() argument
4661 __func__, (unsigned long long)instr->addr, in nand_erase_nand()
4662 (unsigned long long)instr->len); in nand_erase_nand()
4664 if (check_offs_len(chip, instr->addr, instr->len)) in nand_erase_nand()
4665 return -EINVAL; in nand_erase_nand()
4668 if (nand_region_is_secured(chip, instr->addr, instr->len)) in nand_erase_nand()
4669 return -EIO; in nand_erase_nand()
4672 nand_get_device(chip); in nand_erase_nand()
4674 /* Shift to get first page */ in nand_erase_nand()
4675 page = (int)(instr->addr >> chip->page_shift); in nand_erase_nand()
4676 chipnr = (int)(instr->addr >> chip->chip_shift); in nand_erase_nand()
4679 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); in nand_erase_nand()
4682 nand_select_target(chip, chipnr); in nand_erase_nand()
4685 if (nand_check_wp(chip)) { in nand_erase_nand()
4688 ret = -EIO; in nand_erase_nand()
4693 len = instr->len; in nand_erase_nand()
4696 loff_t ofs = (loff_t)page << chip->page_shift; in nand_erase_nand()
4699 if (nand_block_checkbad(chip, ((loff_t) page) << in nand_erase_nand()
4700 chip->page_shift, allowbbt)) { in nand_erase_nand()
4701 pr_warn("%s: attempt to erase a bad block at 0x%08llx\n", in nand_erase_nand()
4703 ret = -EIO; in nand_erase_nand()
4711 if (page <= chip->pagecache.page && chip->pagecache.page < in nand_erase_nand()
4713 chip->pagecache.page = -1; in nand_erase_nand()
4715 ret = nand_erase_op(chip, (page & chip->pagemask) >> in nand_erase_nand()
4716 (chip->phys_erase_shift - chip->page_shift)); in nand_erase_nand()
4720 instr->fail_addr = ofs; in nand_erase_nand()
4725 len -= (1ULL << chip->phys_erase_shift); in nand_erase_nand()
4728 /* Check, if we cross a chip boundary */ in nand_erase_nand()
4729 if (len && !(page & chip->pagemask)) { in nand_erase_nand()
4731 nand_deselect_target(chip); in nand_erase_nand()
4732 nand_select_target(chip, chipnr); in nand_erase_nand()
4740 nand_deselect_target(chip); in nand_erase_nand()
4741 nand_release_device(chip); in nand_erase_nand()
4748 * nand_sync - [MTD Interface] sync
4751 * Sync is actually a wait for chip ready function.
4755 struct nand_chip *chip = mtd_to_nand(mtd); in nand_sync() local
4760 nand_get_device(chip); in nand_sync()
4762 nand_release_device(chip); in nand_sync()
4766 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
4768 * @offs: offset relative to mtd start
4772 struct nand_chip *chip = mtd_to_nand(mtd); in nand_block_isbad() local
4773 int chipnr = (int)(offs >> chip->chip_shift); in nand_block_isbad()
4777 nand_get_device(chip); in nand_block_isbad()
4779 nand_select_target(chip, chipnr); in nand_block_isbad()
4781 ret = nand_block_checkbad(chip, offs, 0); in nand_block_isbad()
4783 nand_deselect_target(chip); in nand_block_isbad()
4784 nand_release_device(chip); in nand_block_isbad()
4790 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
4792 * @ofs: offset relative to mtd start
4810 * nand_suspend - [MTD Interface] Suspend the NAND flash
4817 struct nand_chip *chip = mtd_to_nand(mtd); in nand_suspend() local
4820 mutex_lock(&chip->lock); in nand_suspend()
4821 if (chip->ops.suspend) in nand_suspend()
4822 ret = chip->ops.suspend(chip); in nand_suspend()
4824 chip->suspended = 1; in nand_suspend()
4825 mutex_unlock(&chip->lock); in nand_suspend()
4831 * nand_resume - [MTD Interface] Resume the NAND flash
4836 struct nand_chip *chip = mtd_to_nand(mtd); in nand_resume() local
4838 mutex_lock(&chip->lock); in nand_resume()
4839 if (chip->suspended) { in nand_resume()
4840 if (chip->ops.resume) in nand_resume()
4841 chip->ops.resume(chip); in nand_resume()
4842 chip->suspended = 0; in nand_resume()
4844 pr_err("%s called for a chip which is not in suspended state\n", in nand_resume()
4847 mutex_unlock(&chip->lock); in nand_resume()
4849 wake_up_all(&chip->resume_wq); in nand_resume()
4853 * nand_shutdown - [MTD Interface] Finish the current NAND operation and
4863 * nand_lock - [MTD Interface] Lock the NAND flash
4866 * @len: number of bytes to lock (must be a multiple of block/page size)
4870 struct nand_chip *chip = mtd_to_nand(mtd); in nand_lock() local
4872 if (!chip->ops.lock_area) in nand_lock()
4873 return -ENOTSUPP; in nand_lock()
4875 return chip->ops.lock_area(chip, ofs, len); in nand_lock()
4879 * nand_unlock - [MTD Interface] Unlock the NAND flash
4882 * @len: number of bytes to unlock (must be a multiple of block/page size)
4886 struct nand_chip *chip = mtd_to_nand(mtd); in nand_unlock() local
4888 if (!chip->ops.unlock_area) in nand_unlock()
4889 return -ENOTSUPP; in nand_unlock()
4891 return chip->ops.unlock_area(chip, ofs, len); in nand_unlock()
4895 static void nand_set_defaults(struct nand_chip *chip) in nand_set_defaults() argument
4898 if (!chip->controller) { in nand_set_defaults()
4899 chip->controller = &chip->legacy.dummy_controller; in nand_set_defaults()
4900 nand_controller_init(chip->controller); in nand_set_defaults()
4903 nand_legacy_set_defaults(chip); in nand_set_defaults()
4905 if (!chip->buf_align) in nand_set_defaults()
4906 chip->buf_align = 1; in nand_set_defaults()
4915 s[len - 1] = 0; in sanitize_string()
4918 for (i = 0; i < len - 1; i++) { in sanitize_string()
4928 * nand_id_has_period - Check if an ID string has a given wraparound period
4935 * period of 3). This is a helper function for nand_id_len(). Returns non-zero
4949 * nand_id_len - Get the length of an ID string returned by CMD_READID
4953 * Returns the length of the ID string, according to known wraparound/trailing
4960 /* Find last non-zero byte */ in nand_id_len()
4961 for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--) in nand_id_len()
4979 if (last_nonzero < arrlen - 1) in nand_id_len()
4998 * chip. The rest of the parameters must be decoded according to generic or
4999 * manufacturer-specific "extended ID" decoding patterns.
5001 void nand_decode_ext_id(struct nand_chip *chip) in nand_decode_ext_id() argument
5004 struct mtd_info *mtd = nand_to_mtd(chip); in nand_decode_ext_id()
5006 u8 *id_data = chip->id.data; in nand_decode_ext_id()
5008 memorg = nanddev_get_memorg(&chip->base); in nand_decode_ext_id()
5011 memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]); in nand_decode_ext_id()
5016 memorg->pagesize = 1024 << (extid & 0x03); in nand_decode_ext_id()
5017 mtd->writesize = memorg->pagesize; in nand_decode_ext_id()
5020 memorg->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9); in nand_decode_ext_id()
5021 mtd->oobsize = memorg->oobsize; in nand_decode_ext_id()
5024 memorg->pages_per_eraseblock = ((64 * 1024) << (extid & 0x03)) / in nand_decode_ext_id()
5025 memorg->pagesize; in nand_decode_ext_id()
5026 mtd->erasesize = (64 * 1024) << (extid & 0x03); in nand_decode_ext_id()
5030 chip->options |= NAND_BUSWIDTH_16; in nand_decode_ext_id()
5035 * Old devices have chip data hardcoded in the device ID table. nand_decode_id
5037 * the chip.
5039 static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type) in nand_decode_id() argument
5041 struct mtd_info *mtd = nand_to_mtd(chip); in nand_decode_id()
5044 memorg = nanddev_get_memorg(&chip->base); in nand_decode_id()
5046 memorg->pages_per_eraseblock = type->erasesize / type->pagesize; in nand_decode_id()
5047 mtd->erasesize = type->erasesize; in nand_decode_id()
5048 memorg->pagesize = type->pagesize; in nand_decode_id()
5049 mtd->writesize = memorg->pagesize; in nand_decode_id()
5050 memorg->oobsize = memorg->pagesize / 32; in nand_decode_id()
5051 mtd->oobsize = memorg->oobsize; in nand_decode_id()
5053 /* All legacy ID NAND are small-page, SLC */ in nand_decode_id()
5054 memorg->bits_per_cell = 1; in nand_decode_id()
5058 * Set the bad block marker/indicator (BBM/BBI) patterns according to some
5060 * page size, cell-type information).
5062 static void nand_decode_bbm_options(struct nand_chip *chip) in nand_decode_bbm_options() argument
5064 struct mtd_info *mtd = nand_to_mtd(chip); in nand_decode_bbm_options()
5067 if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16)) in nand_decode_bbm_options()
5068 chip->badblockpos = NAND_BBM_POS_LARGE; in nand_decode_bbm_options()
5070 chip->badblockpos = NAND_BBM_POS_SMALL; in nand_decode_bbm_options()
5075 return type->id_len; in is_full_id_nand()
5078 static bool find_full_id_nand(struct nand_chip *chip, in find_full_id_nand() argument
5081 struct nand_device *base = &chip->base; in find_full_id_nand()
5083 struct mtd_info *mtd = nand_to_mtd(chip); in find_full_id_nand()
5085 u8 *id_data = chip->id.data; in find_full_id_nand()
5087 memorg = nanddev_get_memorg(&chip->base); in find_full_id_nand()
5089 if (!strncmp(type->id, id_data, type->id_len)) { in find_full_id_nand()
5090 memorg->pagesize = type->pagesize; in find_full_id_nand()
5091 mtd->writesize = memorg->pagesize; in find_full_id_nand()
5092 memorg->pages_per_eraseblock = type->erasesize / in find_full_id_nand()
5093 type->pagesize; in find_full_id_nand()
5094 mtd->erasesize = type->erasesize; in find_full_id_nand()
5095 memorg->oobsize = type->oobsize; in find_full_id_nand()
5096 mtd->oobsize = memorg->oobsize; in find_full_id_nand()
5098 memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]); in find_full_id_nand()
5099 memorg->eraseblocks_per_lun = in find_full_id_nand()
5100 DIV_ROUND_DOWN_ULL((u64)type->chipsize << 20, in find_full_id_nand()
5101 memorg->pagesize * in find_full_id_nand()
5102 memorg->pages_per_eraseblock); in find_full_id_nand()
5103 chip->options |= type->options; in find_full_id_nand()
5108 chip->parameters.model = kstrdup(type->name, GFP_KERNEL); in find_full_id_nand()
5109 if (!chip->parameters.model) in find_full_id_nand()
5119 * compliant and does not have a full-id or legacy-id entry in the nand_ids
5122 static void nand_manufacturer_detect(struct nand_chip *chip) in nand_manufacturer_detect() argument
5128 if (chip->manufacturer.desc && chip->manufacturer.desc->ops && in nand_manufacturer_detect()
5129 chip->manufacturer.desc->ops->detect) { in nand_manufacturer_detect()
5132 memorg = nanddev_get_memorg(&chip->base); in nand_manufacturer_detect()
5135 memorg->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]); in nand_manufacturer_detect()
5136 chip->manufacturer.desc->ops->detect(chip); in nand_manufacturer_detect()
5138 nand_decode_ext_id(chip); in nand_manufacturer_detect()
5146 * their ->init() hook.
5148 static int nand_manufacturer_init(struct nand_chip *chip) in nand_manufacturer_init() argument
5150 if (!chip->manufacturer.desc || !chip->manufacturer.desc->ops || in nand_manufacturer_init()
5151 !chip->manufacturer.desc->ops->init) in nand_manufacturer_init()
5154 return chip->manufacturer.desc->ops->init(chip); in nand_manufacturer_init()
5161 * ->cleanup() hook.
5163 static void nand_manufacturer_cleanup(struct nand_chip *chip) in nand_manufacturer_cleanup() argument
5166 if (chip->manufacturer.desc && chip->manufacturer.desc->ops && in nand_manufacturer_cleanup()
5167 chip->manufacturer.desc->ops->cleanup) in nand_manufacturer_cleanup()
5168 chip->manufacturer.desc->ops->cleanup(chip); in nand_manufacturer_cleanup()
5174 return manufacturer_desc ? manufacturer_desc->name : "Unknown"; in nand_manufacturer_name()
5177 static void rawnand_check_data_only_read_support(struct nand_chip *chip) in rawnand_check_data_only_read_support() argument
5180 if (!nand_read_data_op(chip, NULL, SZ_512, true, true)) in rawnand_check_data_only_read_support()
5181 chip->controller->supported_op.data_only_read = 1; in rawnand_check_data_only_read_support()
5184 static void rawnand_early_check_supported_ops(struct nand_chip *chip) in rawnand_early_check_supported_ops() argument
5187 WARN_ON_ONCE(chip->controller->supported_op.data_only_read); in rawnand_early_check_supported_ops()
5189 if (!nand_has_exec_op(chip)) in rawnand_early_check_supported_ops()
5192 rawnand_check_data_only_read_support(chip); in rawnand_early_check_supported_ops()
5195 static void rawnand_check_cont_read_support(struct nand_chip *chip) in rawnand_check_cont_read_support() argument
5197 struct mtd_info *mtd = nand_to_mtd(chip); in rawnand_check_cont_read_support()
5199 if (!chip->parameters.supports_read_cache) in rawnand_check_cont_read_support()
5202 if (chip->read_retries) in rawnand_check_cont_read_support()
5205 if (!nand_lp_exec_cont_read_page_op(chip, 0, 0, NULL, in rawnand_check_cont_read_support()
5206 mtd->writesize, true)) in rawnand_check_cont_read_support()
5207 chip->controller->supported_op.cont_read = 1; in rawnand_check_cont_read_support()
5210 static void rawnand_late_check_supported_ops(struct nand_chip *chip) in rawnand_late_check_supported_ops() argument
5213 WARN_ON_ONCE(chip->controller->supported_op.cont_read); in rawnand_late_check_supported_ops()
5216 * Too many devices do not support sequential cached reads with on-die in rawnand_late_check_supported_ops()
5217 * ECC correction enabled, so in this case refuse to perform the in rawnand_late_check_supported_ops()
5220 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_DIE) in rawnand_late_check_supported_ops()
5223 if (!nand_has_exec_op(chip)) in rawnand_late_check_supported_ops()
5230 if (!(chip->ecc.read_page == nand_read_page_hwecc || in rawnand_late_check_supported_ops()
5231 chip->ecc.read_page == nand_read_page_syndrome || in rawnand_late_check_supported_ops()
5232 chip->ecc.read_page == nand_read_page_swecc)) in rawnand_late_check_supported_ops()
5235 rawnand_check_cont_read_support(chip); in rawnand_late_check_supported_ops()
5241 static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type) in nand_detect() argument
5244 struct mtd_info *mtd = nand_to_mtd(chip); in nand_detect()
5247 u8 *id_data = chip->id.data; in nand_detect()
5253 * unassigned by the ID-based detection logic. in nand_detect()
5255 memorg = nanddev_get_memorg(&chip->base); in nand_detect()
5256 memorg->planes_per_lun = 1; in nand_detect()
5257 memorg->luns_per_target = 1; in nand_detect()
5260 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) in nand_detect()
5261 * after power-up. in nand_detect()
5263 ret = nand_reset(chip, 0); in nand_detect()
5268 nand_select_target(chip, 0); in nand_detect()
5270 rawnand_early_check_supported_ops(chip); in nand_detect()
5273 ret = nand_readid_op(chip, 0, id_data, 2); in nand_detect()
5282 * Try again to make sure, as some systems the bus-hold or other in nand_detect()
5284 * possibly credible NAND flash to appear. If the two results do in nand_detect()
5289 ret = nand_readid_op(chip, 0, id_data, sizeof(chip->id.data)); in nand_detect()
5296 return -ENODEV; in nand_detect()
5299 chip->id.len = nand_id_len(id_data, ARRAY_SIZE(chip->id.data)); in nand_detect()
5301 /* Try to identify manufacturer */ in nand_detect()
5303 chip->manufacturer.desc = manufacturer_desc; in nand_detect()
5309 * Save the NAND_BUSWIDTH_16 flag before letting auto-detection logic in nand_detect()
5311 * This is required to make sure initial NAND bus width set by the in nand_detect()
5313 * (extracted by auto-detection code). in nand_detect()
5315 busw = chip->options & NAND_BUSWIDTH_16; in nand_detect()
5318 * The flag is only set (never cleared), reset it to its default value in nand_detect()
5319 * before starting auto-detection. in nand_detect()
5321 chip->options &= ~NAND_BUSWIDTH_16; in nand_detect()
5323 for (; type->name != NULL; type++) { in nand_detect()
5325 if (find_full_id_nand(chip, type)) in nand_detect()
5327 } else if (dev_id == type->dev_id) { in nand_detect()
5332 if (!type->name || !type->pagesize) { in nand_detect()
5333 /* Check if the chip is ONFI compliant */ in nand_detect()
5334 ret = nand_onfi_detect(chip); in nand_detect()
5340 /* Check if the chip is JEDEC compliant */ in nand_detect()
5341 ret = nand_jedec_detect(chip); in nand_detect()
5348 if (!type->name) in nand_detect()
5349 return -ENODEV; in nand_detect()
5351 chip->parameters.model = kstrdup(type->name, GFP_KERNEL); in nand_detect()
5352 if (!chip->parameters.model) in nand_detect()
5353 return -ENOMEM; in nand_detect()
5355 if (!type->pagesize) in nand_detect()
5356 nand_manufacturer_detect(chip); in nand_detect()
5358 nand_decode_id(chip, type); in nand_detect()
5360 /* Get chip options */ in nand_detect()
5361 chip->options |= type->options; in nand_detect()
5363 memorg->eraseblocks_per_lun = in nand_detect()
5364 DIV_ROUND_DOWN_ULL((u64)type->chipsize << 20, in nand_detect()
5365 memorg->pagesize * in nand_detect()
5366 memorg->pages_per_eraseblock); in nand_detect()
5369 if (!mtd->name) in nand_detect()
5370 mtd->name = chip->parameters.model; in nand_detect()
5372 if (chip->options & NAND_BUSWIDTH_AUTO) { in nand_detect()
5374 nand_set_defaults(chip); in nand_detect()
5375 } else if (busw != (chip->options & NAND_BUSWIDTH_16)) { in nand_detect()
5378 * chip correct! in nand_detect()
5380 pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n", in nand_detect()
5383 mtd->name); in nand_detect()
5385 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8); in nand_detect()
5386 ret = -EINVAL; in nand_detect()
5391 nand_decode_bbm_options(chip); in nand_detect()
5394 chip->page_shift = ffs(mtd->writesize) - 1; in nand_detect()
5395 /* Convert chipsize to number of pages per chip -1 */ in nand_detect()
5396 targetsize = nanddev_target_size(&chip->base); in nand_detect()
5397 chip->pagemask = (targetsize >> chip->page_shift) - 1; in nand_detect()
5399 chip->bbt_erase_shift = chip->phys_erase_shift = in nand_detect()
5400 ffs(mtd->erasesize) - 1; in nand_detect()
5402 chip->chip_shift = ffs((unsigned)targetsize) - 1; in nand_detect()
5404 chip->chip_shift = ffs((unsigned)(targetsize >> 32)); in nand_detect()
5405 chip->chip_shift += 32 - 1; in nand_detect()
5408 if (chip->chip_shift - chip->page_shift > 16) in nand_detect()
5409 chip->options |= NAND_ROW_ADDR_3; in nand_detect()
5411 chip->badblockbits = 8; in nand_detect()
5413 nand_legacy_adjust_cmdfunc(chip); in nand_detect()
5415 pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n", in nand_detect()
5418 chip->parameters.model); in nand_detect()
5420 (int)(targetsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC", in nand_detect()
5421 mtd->erasesize >> 10, mtd->writesize, mtd->oobsize); in nand_detect()
5425 kfree(chip->parameters.model); in nand_detect()
5448 [NAND_ECC_ON_DIE] = "on-die", in of_get_rawnand_ecc_engine_type_legacy()
5454 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_rawnand_ecc_engine_type_legacy()
5487 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_rawnand_ecc_placement_legacy()
5501 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_rawnand_ecc_algo_legacy()
5512 static void of_get_nand_ecc_legacy_user_config(struct nand_chip *chip) in of_get_nand_ecc_legacy_user_config() argument
5514 struct device_node *dn = nand_get_flash_node(chip); in of_get_nand_ecc_legacy_user_config()
5515 struct nand_ecc_props *user_conf = &chip->base.ecc.user_conf; in of_get_nand_ecc_legacy_user_config()
5517 if (user_conf->engine_type == NAND_ECC_ENGINE_TYPE_INVALID) in of_get_nand_ecc_legacy_user_config()
5518 user_conf->engine_type = of_get_rawnand_ecc_engine_type_legacy(dn); in of_get_nand_ecc_legacy_user_config()
5520 if (user_conf->algo == NAND_ECC_ALGO_UNKNOWN) in of_get_nand_ecc_legacy_user_config()
5521 user_conf->algo = of_get_rawnand_ecc_algo_legacy(dn); in of_get_nand_ecc_legacy_user_config()
5523 if (user_conf->placement == NAND_ECC_PLACEMENT_UNKNOWN) in of_get_nand_ecc_legacy_user_config()
5524 user_conf->placement = of_get_rawnand_ecc_placement_legacy(dn); in of_get_nand_ecc_legacy_user_config()
5527 static int of_get_nand_bus_width(struct nand_chip *chip) in of_get_nand_bus_width() argument
5529 struct device_node *dn = nand_get_flash_node(chip); in of_get_nand_bus_width()
5533 ret = of_property_read_u32(dn, "nand-bus-width", &val); in of_get_nand_bus_width()
5534 if (ret == -EINVAL) in of_get_nand_bus_width()
5535 /* Buswidth defaults to 8 if the property does not exist .*/ in of_get_nand_bus_width()
5541 chip->options |= NAND_BUSWIDTH_16; in of_get_nand_bus_width()
5543 return -EINVAL; in of_get_nand_bus_width()
5547 static int of_get_nand_secure_regions(struct nand_chip *chip) in of_get_nand_secure_regions() argument
5549 struct device_node *dn = nand_get_flash_node(chip); in of_get_nand_secure_regions()
5553 /* Only proceed if the "secure-regions" property is present in DT */ in of_get_nand_secure_regions()
5554 prop = of_find_property(dn, "secure-regions", NULL); in of_get_nand_secure_regions()
5558 nr_elem = of_property_count_elems_of_size(dn, "secure-regions", sizeof(u64)); in of_get_nand_secure_regions()
5562 chip->nr_secure_regions = nr_elem / 2; in of_get_nand_secure_regions()
5563 chip->secure_regions = kcalloc(chip->nr_secure_regions, sizeof(*chip->secure_regions), in of_get_nand_secure_regions()
5565 if (!chip->secure_regions) in of_get_nand_secure_regions()
5566 return -ENOMEM; in of_get_nand_secure_regions()
5568 for (i = 0, j = 0; i < chip->nr_secure_regions; i++, j += 2) { in of_get_nand_secure_regions()
5569 of_property_read_u64_index(dn, "secure-regions", j, in of_get_nand_secure_regions()
5570 &chip->secure_regions[i].offset); in of_get_nand_secure_regions()
5571 of_property_read_u64_index(dn, "secure-regions", j + 1, in of_get_nand_secure_regions()
5572 &chip->secure_regions[i].size); in of_get_nand_secure_regions()
5579 * rawnand_dt_parse_gpio_cs - Parse the gpio-cs property of a controller
5593 dev_dbg(dev, "No valid cs-gpios property\n"); in rawnand_dt_parse_gpio_cs()
5599 return -ENOMEM; in rawnand_dt_parse_gpio_cs()
5615 static int rawnand_dt_init(struct nand_chip *chip) in rawnand_dt_init() argument
5617 struct nand_device *nand = mtd_to_nanddev(nand_to_mtd(chip)); in rawnand_dt_init()
5618 struct device_node *dn = nand_get_flash_node(chip); in rawnand_dt_init()
5624 ret = of_get_nand_bus_width(chip); in rawnand_dt_init()
5628 if (of_property_read_bool(dn, "nand-is-boot-medium")) in rawnand_dt_init()
5629 chip->options |= NAND_IS_BOOT_MEDIUM; in rawnand_dt_init()
5631 if (of_property_read_bool(dn, "nand-on-flash-bbt")) in rawnand_dt_init()
5632 chip->bbt_options |= NAND_BBT_USE_FLASH; in rawnand_dt_init()
5635 of_get_nand_ecc_legacy_user_config(chip); in rawnand_dt_init()
5639 * ECC engine type, we will default to NAND_ECC_ENGINE_TYPE_ON_HOST. in rawnand_dt_init()
5641 nand->ecc.defaults.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST; in rawnand_dt_init()
5645 * case default to the NAND controller choice, otherwise fallback to in rawnand_dt_init()
5648 if (nand->ecc.user_conf.engine_type != NAND_ECC_ENGINE_TYPE_INVALID) in rawnand_dt_init()
5649 chip->ecc.engine_type = nand->ecc.user_conf.engine_type; in rawnand_dt_init()
5650 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_INVALID) in rawnand_dt_init()
5651 chip->ecc.engine_type = nand->ecc.defaults.engine_type; in rawnand_dt_init()
5653 chip->ecc.placement = nand->ecc.user_conf.placement; in rawnand_dt_init()
5654 chip->ecc.algo = nand->ecc.user_conf.algo; in rawnand_dt_init()
5655 chip->ecc.strength = nand->ecc.user_conf.strength; in rawnand_dt_init()
5656 chip->ecc.size = nand->ecc.user_conf.step_size; in rawnand_dt_init()
5662 * nand_scan_ident - Scan for the NAND device
5663 * @chip: NAND chip object
5664 * @maxchips: number of chips to scan for
5670 * This helper used to be called directly from controller drivers that needed
5671 * to tweak some ECC-related parameters before nand_scan_tail(). This separation
5673 * as been banned for the benefit of the ->init_ecc()/cleanup_ecc() hooks.
5675 static int nand_scan_ident(struct nand_chip *chip, unsigned int maxchips, in nand_scan_ident() argument
5678 struct mtd_info *mtd = nand_to_mtd(chip); in nand_scan_ident()
5684 memorg = nanddev_get_memorg(&chip->base); in nand_scan_ident()
5687 chip->cur_cs = -1; in nand_scan_ident()
5689 mutex_init(&chip->lock); in nand_scan_ident()
5690 init_waitqueue_head(&chip->resume_wq); in nand_scan_ident()
5693 chip->current_interface_config = nand_get_reset_interface_config(); in nand_scan_ident()
5695 ret = rawnand_dt_init(chip); in nand_scan_ident()
5699 if (!mtd->name && mtd->dev.parent) in nand_scan_ident()
5700 mtd->name = dev_name(mtd->dev.parent); in nand_scan_ident()
5703 nand_set_defaults(chip); in nand_scan_ident()
5705 ret = nand_legacy_check_hooks(chip); in nand_scan_ident()
5709 memorg->ntargets = maxchips; in nand_scan_ident()
5712 ret = nand_detect(chip, table); in nand_scan_ident()
5714 if (!(chip->options & NAND_SCAN_SILENT_NODEV)) in nand_scan_ident()
5716 nand_deselect_target(chip); in nand_scan_ident()
5720 nand_maf_id = chip->id.data[0]; in nand_scan_ident()
5721 nand_dev_id = chip->id.data[1]; in nand_scan_ident()
5723 nand_deselect_target(chip); in nand_scan_ident()
5725 /* Check for a chip array */ in nand_scan_ident()
5730 ret = nand_reset(chip, i); in nand_scan_ident()
5734 nand_select_target(chip, i); in nand_scan_ident()
5736 ret = nand_readid_op(chip, 0, id, sizeof(id)); in nand_scan_ident()
5741 nand_deselect_target(chip); in nand_scan_ident()
5744 nand_deselect_target(chip); in nand_scan_ident()
5750 memorg->ntargets = i; in nand_scan_ident()
5751 mtd->size = i * nanddev_target_size(&chip->base); in nand_scan_ident()
5756 static void nand_scan_ident_cleanup(struct nand_chip *chip) in nand_scan_ident_cleanup() argument
5758 kfree(chip->parameters.model); in nand_scan_ident_cleanup()
5759 kfree(chip->parameters.onfi); in nand_scan_ident_cleanup()
5762 int rawnand_sw_hamming_init(struct nand_chip *chip) in rawnand_sw_hamming_init() argument
5765 struct nand_device *base = &chip->base; in rawnand_sw_hamming_init()
5768 base->ecc.user_conf.engine_type = NAND_ECC_ENGINE_TYPE_SOFT; in rawnand_sw_hamming_init()
5769 base->ecc.user_conf.algo = NAND_ECC_ALGO_HAMMING; in rawnand_sw_hamming_init()
5770 base->ecc.user_conf.strength = chip->ecc.strength; in rawnand_sw_hamming_init()
5771 base->ecc.user_conf.step_size = chip->ecc.size; in rawnand_sw_hamming_init()
5777 engine_conf = base->ecc.ctx.priv; in rawnand_sw_hamming_init()
5779 if (chip->ecc.options & NAND_ECC_SOFT_HAMMING_SM_ORDER) in rawnand_sw_hamming_init()
5780 engine_conf->sm_order = true; in rawnand_sw_hamming_init()
5782 chip->ecc.size = base->ecc.ctx.conf.step_size; in rawnand_sw_hamming_init()
5783 chip->ecc.strength = base->ecc.ctx.conf.strength; in rawnand_sw_hamming_init()
5784 chip->ecc.total = base->ecc.ctx.total; in rawnand_sw_hamming_init()
5785 chip->ecc.steps = nanddev_get_ecc_nsteps(base); in rawnand_sw_hamming_init()
5786 chip->ecc.bytes = base->ecc.ctx.total / nanddev_get_ecc_nsteps(base); in rawnand_sw_hamming_init()
5792 int rawnand_sw_hamming_calculate(struct nand_chip *chip, in rawnand_sw_hamming_calculate() argument
5796 struct nand_device *base = &chip->base; in rawnand_sw_hamming_calculate()
5802 int rawnand_sw_hamming_correct(struct nand_chip *chip, in rawnand_sw_hamming_correct() argument
5807 struct nand_device *base = &chip->base; in rawnand_sw_hamming_correct()
5813 void rawnand_sw_hamming_cleanup(struct nand_chip *chip) in rawnand_sw_hamming_cleanup() argument
5815 struct nand_device *base = &chip->base; in rawnand_sw_hamming_cleanup()
5821 int rawnand_sw_bch_init(struct nand_chip *chip) in rawnand_sw_bch_init() argument
5823 struct nand_device *base = &chip->base; in rawnand_sw_bch_init()
5827 base->ecc.user_conf.engine_type = NAND_ECC_ENGINE_TYPE_SOFT; in rawnand_sw_bch_init()
5828 base->ecc.user_conf.algo = NAND_ECC_ALGO_BCH; in rawnand_sw_bch_init()
5829 base->ecc.user_conf.step_size = chip->ecc.size; in rawnand_sw_bch_init()
5830 base->ecc.user_conf.strength = chip->ecc.strength; in rawnand_sw_bch_init()
5836 chip->ecc.size = ecc_conf->step_size; in rawnand_sw_bch_init()
5837 chip->ecc.strength = ecc_conf->strength; in rawnand_sw_bch_init()
5838 chip->ecc.total = base->ecc.ctx.total; in rawnand_sw_bch_init()
5839 chip->ecc.steps = nanddev_get_ecc_nsteps(base); in rawnand_sw_bch_init()
5840 chip->ecc.bytes = base->ecc.ctx.total / nanddev_get_ecc_nsteps(base); in rawnand_sw_bch_init()
5846 static int rawnand_sw_bch_calculate(struct nand_chip *chip, in rawnand_sw_bch_calculate() argument
5850 struct nand_device *base = &chip->base; in rawnand_sw_bch_calculate()
5855 int rawnand_sw_bch_correct(struct nand_chip *chip, unsigned char *buf, in rawnand_sw_bch_correct() argument
5858 struct nand_device *base = &chip->base; in rawnand_sw_bch_correct()
5864 void rawnand_sw_bch_cleanup(struct nand_chip *chip) in rawnand_sw_bch_cleanup() argument
5866 struct nand_device *base = &chip->base; in rawnand_sw_bch_cleanup()
5872 static int nand_set_ecc_on_host_ops(struct nand_chip *chip) in nand_set_ecc_on_host_ops() argument
5874 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_set_ecc_on_host_ops()
5876 switch (ecc->placement) { in nand_set_ecc_on_host_ops()
5880 if (!ecc->read_page) in nand_set_ecc_on_host_ops()
5881 ecc->read_page = nand_read_page_hwecc; in nand_set_ecc_on_host_ops()
5882 if (!ecc->write_page) in nand_set_ecc_on_host_ops()
5883 ecc->write_page = nand_write_page_hwecc; in nand_set_ecc_on_host_ops()
5884 if (!ecc->read_page_raw) in nand_set_ecc_on_host_ops()
5885 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_on_host_ops()
5886 if (!ecc->write_page_raw) in nand_set_ecc_on_host_ops()
5887 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_on_host_ops()
5888 if (!ecc->read_oob) in nand_set_ecc_on_host_ops()
5889 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_on_host_ops()
5890 if (!ecc->write_oob) in nand_set_ecc_on_host_ops()
5891 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_on_host_ops()
5892 if (!ecc->read_subpage) in nand_set_ecc_on_host_ops()
5893 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_on_host_ops()
5894 if (!ecc->write_subpage && ecc->hwctl && ecc->calculate) in nand_set_ecc_on_host_ops()
5895 ecc->write_subpage = nand_write_subpage_hwecc; in nand_set_ecc_on_host_ops()
5899 if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) && in nand_set_ecc_on_host_ops()
5900 (!ecc->read_page || in nand_set_ecc_on_host_ops()
5901 ecc->read_page == nand_read_page_hwecc || in nand_set_ecc_on_host_ops()
5902 !ecc->write_page || in nand_set_ecc_on_host_ops()
5903 ecc->write_page == nand_write_page_hwecc)) { in nand_set_ecc_on_host_ops()
5905 return -EINVAL; in nand_set_ecc_on_host_ops()
5908 if (!ecc->read_page) in nand_set_ecc_on_host_ops()
5909 ecc->read_page = nand_read_page_syndrome; in nand_set_ecc_on_host_ops()
5910 if (!ecc->write_page) in nand_set_ecc_on_host_ops()
5911 ecc->write_page = nand_write_page_syndrome; in nand_set_ecc_on_host_ops()
5912 if (!ecc->read_page_raw) in nand_set_ecc_on_host_ops()
5913 ecc->read_page_raw = nand_read_page_raw_syndrome; in nand_set_ecc_on_host_ops()
5914 if (!ecc->write_page_raw) in nand_set_ecc_on_host_ops()
5915 ecc->write_page_raw = nand_write_page_raw_syndrome; in nand_set_ecc_on_host_ops()
5916 if (!ecc->read_oob) in nand_set_ecc_on_host_ops()
5917 ecc->read_oob = nand_read_oob_syndrome; in nand_set_ecc_on_host_ops()
5918 if (!ecc->write_oob) in nand_set_ecc_on_host_ops()
5919 ecc->write_oob = nand_write_oob_syndrome; in nand_set_ecc_on_host_ops()
5924 ecc->placement); in nand_set_ecc_on_host_ops()
5925 return -EINVAL; in nand_set_ecc_on_host_ops()
5931 static int nand_set_ecc_soft_ops(struct nand_chip *chip) in nand_set_ecc_soft_ops() argument
5933 struct mtd_info *mtd = nand_to_mtd(chip); in nand_set_ecc_soft_ops()
5935 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_set_ecc_soft_ops()
5938 if (WARN_ON(ecc->engine_type != NAND_ECC_ENGINE_TYPE_SOFT)) in nand_set_ecc_soft_ops()
5939 return -EINVAL; in nand_set_ecc_soft_ops()
5941 switch (ecc->algo) { in nand_set_ecc_soft_ops()
5943 ecc->calculate = rawnand_sw_hamming_calculate; in nand_set_ecc_soft_ops()
5944 ecc->correct = rawnand_sw_hamming_correct; in nand_set_ecc_soft_ops()
5945 ecc->read_page = nand_read_page_swecc; in nand_set_ecc_soft_ops()
5946 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_soft_ops()
5947 ecc->write_page = nand_write_page_swecc; in nand_set_ecc_soft_ops()
5948 if (!ecc->read_page_raw) in nand_set_ecc_soft_ops()
5949 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_soft_ops()
5950 if (!ecc->write_page_raw) in nand_set_ecc_soft_ops()
5951 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_soft_ops()
5952 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_soft_ops()
5953 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_soft_ops()
5954 if (!ecc->size) in nand_set_ecc_soft_ops()
5955 ecc->size = 256; in nand_set_ecc_soft_ops()
5956 ecc->bytes = 3; in nand_set_ecc_soft_ops()
5957 ecc->strength = 1; in nand_set_ecc_soft_ops()
5960 ecc->options |= NAND_ECC_SOFT_HAMMING_SM_ORDER; in nand_set_ecc_soft_ops()
5962 ret = rawnand_sw_hamming_init(chip); in nand_set_ecc_soft_ops()
5972 return -EINVAL; in nand_set_ecc_soft_ops()
5974 ecc->calculate = rawnand_sw_bch_calculate; in nand_set_ecc_soft_ops()
5975 ecc->correct = rawnand_sw_bch_correct; in nand_set_ecc_soft_ops()
5976 ecc->read_page = nand_read_page_swecc; in nand_set_ecc_soft_ops()
5977 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_soft_ops()
5978 ecc->write_page = nand_write_page_swecc; in nand_set_ecc_soft_ops()
5979 if (!ecc->read_page_raw) in nand_set_ecc_soft_ops()
5980 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_soft_ops()
5981 if (!ecc->write_page_raw) in nand_set_ecc_soft_ops()
5982 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_soft_ops()
5983 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_soft_ops()
5984 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_soft_ops()
5991 if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH && in nand_set_ecc_soft_ops()
5992 mtd->ooblayout != nand_get_large_page_ooblayout()) in nand_set_ecc_soft_ops()
5993 nanddev->ecc.user_conf.flags &= ~NAND_ECC_MAXIMIZE_STRENGTH; in nand_set_ecc_soft_ops()
5995 ret = rawnand_sw_bch_init(chip); in nand_set_ecc_soft_ops()
6004 return -EINVAL; in nand_set_ecc_soft_ops()
6009 * nand_check_ecc_caps - check the sanity of preset ECC settings
6010 * @chip: nand chip info structure
6015 * by the controller and the calculated ECC bytes fit within the chip's OOB.
6019 nand_check_ecc_caps(struct nand_chip *chip, in nand_check_ecc_caps() argument
6022 struct mtd_info *mtd = nand_to_mtd(chip); in nand_check_ecc_caps()
6024 int preset_step = chip->ecc.size; in nand_check_ecc_caps()
6025 int preset_strength = chip->ecc.strength; in nand_check_ecc_caps()
6026 int ecc_bytes, nsteps = mtd->writesize / preset_step; in nand_check_ecc_caps()
6029 for (i = 0; i < caps->nstepinfos; i++) { in nand_check_ecc_caps()
6030 stepinfo = &caps->stepinfos[i]; in nand_check_ecc_caps()
6032 if (stepinfo->stepsize != preset_step) in nand_check_ecc_caps()
6035 for (j = 0; j < stepinfo->nstrengths; j++) { in nand_check_ecc_caps()
6036 if (stepinfo->strengths[j] != preset_strength) in nand_check_ecc_caps()
6039 ecc_bytes = caps->calc_ecc_bytes(preset_step, in nand_check_ecc_caps()
6047 return -ENOSPC; in nand_check_ecc_caps()
6050 chip->ecc.bytes = ecc_bytes; in nand_check_ecc_caps()
6059 return -ENOTSUPP; in nand_check_ecc_caps()
6063 * nand_match_ecc_req - meet the chip's requirement with least ECC bytes
6064 * @chip: nand chip info structure
6068 * If a chip's ECC requirement is provided, try to meet it with the least
6069 * number of ECC bytes (i.e. with the largest number of OOB-free bytes).
6073 nand_match_ecc_req(struct nand_chip *chip, in nand_match_ecc_req() argument
6077 nanddev_get_ecc_requirements(&chip->base); in nand_match_ecc_req()
6078 struct mtd_info *mtd = nand_to_mtd(chip); in nand_match_ecc_req()
6080 int req_step = requirements->step_size; in nand_match_ecc_req()
6081 int req_strength = requirements->strength; in nand_match_ecc_req()
6087 /* No information provided by the NAND chip */ in nand_match_ecc_req()
6089 return -ENOTSUPP; in nand_match_ecc_req()
6091 /* number of correctable bits the chip requires in a page */ in nand_match_ecc_req()
6092 req_corr = mtd->writesize / req_step * req_strength; in nand_match_ecc_req()
6094 for (i = 0; i < caps->nstepinfos; i++) { in nand_match_ecc_req()
6095 stepinfo = &caps->stepinfos[i]; in nand_match_ecc_req()
6096 step_size = stepinfo->stepsize; in nand_match_ecc_req()
6098 for (j = 0; j < stepinfo->nstrengths; j++) { in nand_match_ecc_req()
6099 strength = stepinfo->strengths[j]; in nand_match_ecc_req()
6103 * chip's requirement, it is not easy to compare the in nand_match_ecc_req()
6109 if (mtd->writesize % step_size) in nand_match_ecc_req()
6112 nsteps = mtd->writesize / step_size; in nand_match_ecc_req()
6114 ecc_bytes = caps->calc_ecc_bytes(step_size, strength); in nand_match_ecc_req()
6124 * We assume the best is to meet the chip's requrement in nand_match_ecc_req()
6137 return -ENOTSUPP; in nand_match_ecc_req()
6139 chip->ecc.size = best_step; in nand_match_ecc_req()
6140 chip->ecc.strength = best_strength; in nand_match_ecc_req()
6141 chip->ecc.bytes = best_ecc_bytes; in nand_match_ecc_req()
6147 * nand_maximize_ecc - choose the max ECC strength available
6148 * @chip: nand chip info structure
6153 * within the chip's OOB. On success, the chosen ECC settings are set.
6156 nand_maximize_ecc(struct nand_chip *chip, in nand_maximize_ecc() argument
6159 struct mtd_info *mtd = nand_to_mtd(chip); in nand_maximize_ecc()
6167 for (i = 0; i < caps->nstepinfos; i++) { in nand_maximize_ecc()
6168 stepinfo = &caps->stepinfos[i]; in nand_maximize_ecc()
6169 step_size = stepinfo->stepsize; in nand_maximize_ecc()
6171 /* If chip->ecc.size is already set, respect it */ in nand_maximize_ecc()
6172 if (chip->ecc.size && step_size != chip->ecc.size) in nand_maximize_ecc()
6175 for (j = 0; j < stepinfo->nstrengths; j++) { in nand_maximize_ecc()
6176 strength = stepinfo->strengths[j]; in nand_maximize_ecc()
6178 if (mtd->writesize % step_size) in nand_maximize_ecc()
6181 nsteps = mtd->writesize / step_size; in nand_maximize_ecc()
6183 ecc_bytes = caps->calc_ecc_bytes(step_size, strength); in nand_maximize_ecc()
6207 return -ENOTSUPP; in nand_maximize_ecc()
6209 chip->ecc.size = best_step; in nand_maximize_ecc()
6210 chip->ecc.strength = best_strength; in nand_maximize_ecc()
6211 chip->ecc.bytes = best_ecc_bytes; in nand_maximize_ecc()
6217 * nand_ecc_choose_conf - Set the ECC strength and ECC step size
6218 * @chip: nand chip info structure
6222 * Choose the ECC configuration according to following logic.
6226 * 2. If the user provided the nand-ecc-maximize property, then select maximum
6228 * 3. Otherwise, try to match the ECC step size and ECC strength closest
6229 * to the chip's requirement. If available OOB size can't fit the chip
6230 * requirement then fallback to the maximum ECC step size and ECC strength.
6234 int nand_ecc_choose_conf(struct nand_chip *chip, in nand_ecc_choose_conf() argument
6237 struct mtd_info *mtd = nand_to_mtd(chip); in nand_ecc_choose_conf()
6240 if (WARN_ON(oobavail < 0 || oobavail > mtd->oobsize)) in nand_ecc_choose_conf()
6241 return -EINVAL; in nand_ecc_choose_conf()
6243 if (chip->ecc.size && chip->ecc.strength) in nand_ecc_choose_conf()
6244 return nand_check_ecc_caps(chip, caps, oobavail); in nand_ecc_choose_conf()
6246 if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH) in nand_ecc_choose_conf()
6247 return nand_maximize_ecc(chip, caps, oobavail); in nand_ecc_choose_conf()
6249 if (!nand_match_ecc_req(chip, caps, oobavail)) in nand_ecc_choose_conf()
6252 return nand_maximize_ecc(chip, caps, oobavail); in nand_ecc_choose_conf()
6258 struct nand_chip *chip = container_of(nand, struct nand_chip, in rawnand_erase() local
6263 eb >>= nand->rowconv.eraseblock_addr_shift; in rawnand_erase()
6265 nand_select_target(chip, pos->target); in rawnand_erase()
6266 ret = nand_erase_op(chip, eb); in rawnand_erase()
6267 nand_deselect_target(chip); in rawnand_erase()
6275 struct nand_chip *chip = container_of(nand, struct nand_chip, in rawnand_markbad() local
6278 return nand_markbad_bbm(chip, nanddev_pos_to_offs(nand, pos)); in rawnand_markbad()
6283 struct nand_chip *chip = container_of(nand, struct nand_chip, in rawnand_isbad() local
6287 nand_select_target(chip, pos->target); in rawnand_isbad()
6288 ret = nand_isbad_bbm(chip, nanddev_pos_to_offs(nand, pos)); in rawnand_isbad()
6289 nand_deselect_target(chip); in rawnand_isbad()
6301 * nand_scan_tail - Scan for the NAND device
6302 * @chip: NAND chip object
6308 static int nand_scan_tail(struct nand_chip *chip) in nand_scan_tail() argument
6310 struct mtd_info *mtd = nand_to_mtd(chip); in nand_scan_tail()
6311 struct nand_device *base = &chip->base; in nand_scan_tail()
6312 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_scan_tail()
6315 /* New bad blocks should be marked in OOB, flash-based BBT, or both */ in nand_scan_tail()
6316 if (WARN_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && in nand_scan_tail()
6317 !(chip->bbt_options & NAND_BBT_USE_FLASH))) { in nand_scan_tail()
6318 return -EINVAL; in nand_scan_tail()
6321 chip->data_buf = kmalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL); in nand_scan_tail()
6322 if (!chip->data_buf) in nand_scan_tail()
6323 return -ENOMEM; in nand_scan_tail()
6326 * FIXME: some NAND manufacturer drivers expect the first die to be in nand_scan_tail()
6327 * selected when manufacturer->init() is called. They should be fixed in nand_scan_tail()
6328 * to explictly select the relevant die when interacting with the NAND in nand_scan_tail()
6329 * chip. in nand_scan_tail()
6331 nand_select_target(chip, 0); in nand_scan_tail()
6332 ret = nand_manufacturer_init(chip); in nand_scan_tail()
6333 nand_deselect_target(chip); in nand_scan_tail()
6338 chip->oob_poi = chip->data_buf + mtd->writesize; in nand_scan_tail()
6343 if (!mtd->ooblayout && in nand_scan_tail()
6344 !(ecc->engine_type == NAND_ECC_ENGINE_TYPE_SOFT && in nand_scan_tail()
6345 ecc->algo == NAND_ECC_ALGO_BCH) && in nand_scan_tail()
6346 !(ecc->engine_type == NAND_ECC_ENGINE_TYPE_SOFT && in nand_scan_tail()
6347 ecc->algo == NAND_ECC_ALGO_HAMMING)) { in nand_scan_tail()
6348 switch (mtd->oobsize) { in nand_scan_tail()
6360 * Expose the whole OOB area to users if ECC_NONE in nand_scan_tail()
6362 * ->oobsize, but we must keep the old large/small in nand_scan_tail()
6363 * page with ECC layout when ->oobsize <= 128 for in nand_scan_tail()
6366 if (ecc->engine_type == NAND_ECC_ENGINE_TYPE_NONE) { in nand_scan_tail()
6373 mtd->oobsize); in nand_scan_tail()
6374 ret = -EINVAL; in nand_scan_tail()
6380 * Check ECC mode, default to software if 3byte/512byte hardware ECC is in nand_scan_tail()
6381 * selected and we have 256 byte pagesize fallback to software ECC in nand_scan_tail()
6384 switch (ecc->engine_type) { in nand_scan_tail()
6386 ret = nand_set_ecc_on_host_ops(chip); in nand_scan_tail()
6390 if (mtd->writesize >= ecc->size) { in nand_scan_tail()
6391 if (!ecc->strength) { in nand_scan_tail()
6393 ret = -EINVAL; in nand_scan_tail()
6398 pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n", in nand_scan_tail()
6399 ecc->size, mtd->writesize); in nand_scan_tail()
6400 ecc->engine_type = NAND_ECC_ENGINE_TYPE_SOFT; in nand_scan_tail()
6401 ecc->algo = NAND_ECC_ALGO_HAMMING; in nand_scan_tail()
6405 ret = nand_set_ecc_soft_ops(chip); in nand_scan_tail()
6411 if (!ecc->read_page || !ecc->write_page) { in nand_scan_tail()
6412 WARN(1, "No ECC functions supplied; on-die ECC not possible\n"); in nand_scan_tail()
6413 ret = -EINVAL; in nand_scan_tail()
6416 if (!ecc->read_oob) in nand_scan_tail()
6417 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
6418 if (!ecc->write_oob) in nand_scan_tail()
6419 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
6424 ecc->read_page = nand_read_page_raw; in nand_scan_tail()
6425 ecc->write_page = nand_write_page_raw; in nand_scan_tail()
6426 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
6427 ecc->read_page_raw = nand_read_page_raw; in nand_scan_tail()
6428 ecc->write_page_raw = nand_write_page_raw; in nand_scan_tail()
6429 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
6430 ecc->size = mtd->writesize; in nand_scan_tail()
6431 ecc->bytes = 0; in nand_scan_tail()
6432 ecc->strength = 0; in nand_scan_tail()
6436 WARN(1, "Invalid NAND_ECC_MODE %d\n", ecc->engine_type); in nand_scan_tail()
6437 ret = -EINVAL; in nand_scan_tail()
6441 if (ecc->correct || ecc->calculate) { in nand_scan_tail()
6442 ecc->calc_buf = kmalloc(mtd->oobsize, GFP_KERNEL); in nand_scan_tail()
6443 ecc->code_buf = kmalloc(mtd->oobsize, GFP_KERNEL); in nand_scan_tail()
6444 if (!ecc->calc_buf || !ecc->code_buf) { in nand_scan_tail()
6445 ret = -ENOMEM; in nand_scan_tail()
6451 if (!ecc->read_oob_raw) in nand_scan_tail()
6452 ecc->read_oob_raw = ecc->read_oob; in nand_scan_tail()
6453 if (!ecc->write_oob_raw) in nand_scan_tail()
6454 ecc->write_oob_raw = ecc->write_oob; in nand_scan_tail()
6456 /* Propagate ECC info to the generic NAND and MTD layers */ in nand_scan_tail()
6457 mtd->ecc_strength = ecc->strength; in nand_scan_tail()
6458 if (!base->ecc.ctx.conf.strength) in nand_scan_tail()
6459 base->ecc.ctx.conf.strength = ecc->strength; in nand_scan_tail()
6460 mtd->ecc_step_size = ecc->size; in nand_scan_tail()
6461 if (!base->ecc.ctx.conf.step_size) in nand_scan_tail()
6462 base->ecc.ctx.conf.step_size = ecc->size; in nand_scan_tail()
6468 if (!ecc->steps) in nand_scan_tail()
6469 ecc->steps = mtd->writesize / ecc->size; in nand_scan_tail()
6470 if (!base->ecc.ctx.nsteps) in nand_scan_tail()
6471 base->ecc.ctx.nsteps = ecc->steps; in nand_scan_tail()
6472 if (ecc->steps * ecc->size != mtd->writesize) { in nand_scan_tail()
6474 ret = -EINVAL; in nand_scan_tail()
6478 if (!ecc->total) { in nand_scan_tail()
6479 ecc->total = ecc->steps * ecc->bytes; in nand_scan_tail()
6480 chip->base.ecc.ctx.total = ecc->total; in nand_scan_tail()
6483 if (ecc->total > mtd->oobsize) { in nand_scan_tail()
6485 ret = -EINVAL; in nand_scan_tail()
6490 * The number of bytes available for a client to place data into in nand_scan_tail()
6497 mtd->oobavail = ret; in nand_scan_tail()
6500 if (!nand_ecc_is_strong_enough(&chip->base)) in nand_scan_tail()
6501 …he ECC used on your system (%db/%dB) is too weak compared to the one required by the NAND chip (%d… in nand_scan_tail()
6502 mtd->name, chip->ecc.strength, chip->ecc.size, in nand_scan_tail()
6503 nanddev_get_ecc_requirements(&chip->base)->strength, in nand_scan_tail()
6504 nanddev_get_ecc_requirements(&chip->base)->step_size); in nand_scan_tail()
6506 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ in nand_scan_tail()
6507 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) { in nand_scan_tail()
6508 switch (ecc->steps) { in nand_scan_tail()
6510 mtd->subpage_sft = 1; in nand_scan_tail()
6515 mtd->subpage_sft = 2; in nand_scan_tail()
6519 chip->subpagesize = mtd->writesize >> mtd->subpage_sft; in nand_scan_tail()
6522 chip->pagecache.page = -1; in nand_scan_tail()
6525 switch (ecc->engine_type) { in nand_scan_tail()
6527 if (chip->page_shift > 9) in nand_scan_tail()
6528 chip->options |= NAND_SUBPAGE_READ; in nand_scan_tail()
6535 ret = nanddev_init(&chip->base, &rawnand_ops, mtd->owner); in nand_scan_tail()
6540 if (chip->options & NAND_ROM) in nand_scan_tail()
6541 mtd->flags = MTD_CAP_ROM; in nand_scan_tail()
6544 mtd->_erase = nand_erase; in nand_scan_tail()
6545 mtd->_point = NULL; in nand_scan_tail()
6546 mtd->_unpoint = NULL; in nand_scan_tail()
6547 mtd->_panic_write = panic_nand_write; in nand_scan_tail()
6548 mtd->_read_oob = nand_read_oob; in nand_scan_tail()
6549 mtd->_write_oob = nand_write_oob; in nand_scan_tail()
6550 mtd->_sync = nand_sync; in nand_scan_tail()
6551 mtd->_lock = nand_lock; in nand_scan_tail()
6552 mtd->_unlock = nand_unlock; in nand_scan_tail()
6553 mtd->_suspend = nand_suspend; in nand_scan_tail()
6554 mtd->_resume = nand_resume; in nand_scan_tail()
6555 mtd->_reboot = nand_shutdown; in nand_scan_tail()
6556 mtd->_block_isreserved = nand_block_isreserved; in nand_scan_tail()
6557 mtd->_block_isbad = nand_block_isbad; in nand_scan_tail()
6558 mtd->_block_markbad = nand_block_markbad; in nand_scan_tail()
6559 mtd->_max_bad_blocks = nanddev_mtd_max_bad_blocks; in nand_scan_tail()
6562 * Initialize bitflip_threshold to its default prior scan_bbt() call. in nand_scan_tail()
6566 if (!mtd->bitflip_threshold) in nand_scan_tail()
6567 mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4); in nand_scan_tail()
6569 /* Find the fastest data interface for this chip */ in nand_scan_tail()
6570 ret = nand_choose_interface_config(chip); in nand_scan_tail()
6575 for (i = 0; i < nanddev_ntargets(&chip->base); i++) { in nand_scan_tail()
6576 ret = nand_setup_interface(chip, i); in nand_scan_tail()
6581 rawnand_late_check_supported_ops(chip); in nand_scan_tail()
6584 * Look for secure regions in the NAND chip. These regions are supposed in nand_scan_tail()
6585 * to be protected by a secure element like Trustzone. So the read/write in nand_scan_tail()
6586 * accesses to these regions will be blocked in the runtime by this in nand_scan_tail()
6589 ret = of_get_nand_secure_regions(chip); in nand_scan_tail()
6594 if (chip->options & NAND_SKIP_BBTSCAN) in nand_scan_tail()
6598 ret = nand_create_bbt(chip); in nand_scan_tail()
6605 kfree(chip->secure_regions); in nand_scan_tail()
6608 kfree(chip->best_interface_config); in nand_scan_tail()
6611 nanddev_cleanup(&chip->base); in nand_scan_tail()
6614 nand_manufacturer_cleanup(chip); in nand_scan_tail()
6617 kfree(chip->data_buf); in nand_scan_tail()
6618 kfree(ecc->code_buf); in nand_scan_tail()
6619 kfree(ecc->calc_buf); in nand_scan_tail()
6624 static int nand_attach(struct nand_chip *chip) in nand_attach() argument
6626 if (chip->controller->ops && chip->controller->ops->attach_chip) in nand_attach()
6627 return chip->controller->ops->attach_chip(chip); in nand_attach()
6632 static void nand_detach(struct nand_chip *chip) in nand_detach() argument
6634 if (chip->controller->ops && chip->controller->ops->detach_chip) in nand_detach()
6635 chip->controller->ops->detach_chip(chip); in nand_detach()
6639 * nand_scan_with_ids - [NAND Interface] Scan for the NAND device
6640 * @chip: NAND chip object
6641 * @maxchips: number of chips to scan for.
6645 * The flash ID is read and the mtd/chip structures are filled with the
6648 int nand_scan_with_ids(struct nand_chip *chip, unsigned int maxchips, in nand_scan_with_ids() argument
6654 return -EINVAL; in nand_scan_with_ids()
6656 ret = nand_scan_ident(chip, maxchips, ids); in nand_scan_with_ids()
6660 ret = nand_attach(chip); in nand_scan_with_ids()
6664 ret = nand_scan_tail(chip); in nand_scan_with_ids()
6671 nand_detach(chip); in nand_scan_with_ids()
6673 nand_scan_ident_cleanup(chip); in nand_scan_with_ids()
6680 * nand_cleanup - [NAND Interface] Free resources held by the NAND device
6681 * @chip: NAND chip object
6683 void nand_cleanup(struct nand_chip *chip) in nand_cleanup() argument
6685 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT) { in nand_cleanup()
6686 if (chip->ecc.algo == NAND_ECC_ALGO_HAMMING) in nand_cleanup()
6687 rawnand_sw_hamming_cleanup(chip); in nand_cleanup()
6688 else if (chip->ecc.algo == NAND_ECC_ALGO_BCH) in nand_cleanup()
6689 rawnand_sw_bch_cleanup(chip); in nand_cleanup()
6692 nanddev_cleanup(&chip->base); in nand_cleanup()
6695 kfree(chip->secure_regions); in nand_cleanup()
6698 kfree(chip->bbt); in nand_cleanup()
6699 kfree(chip->data_buf); in nand_cleanup()
6700 kfree(chip->ecc.code_buf); in nand_cleanup()
6701 kfree(chip->ecc.calc_buf); in nand_cleanup()
6704 if (chip->badblock_pattern && chip->badblock_pattern->options in nand_cleanup()
6706 kfree(chip->badblock_pattern); in nand_cleanup()
6709 kfree(chip->best_interface_config); in nand_cleanup()
6712 nand_manufacturer_cleanup(chip); in nand_cleanup()
6714 /* Free controller specific allocations after chip identification */ in nand_cleanup()
6715 nand_detach(chip); in nand_cleanup()
6718 nand_scan_ident_cleanup(chip); in nand_cleanup()