56 #define SLCCTRL_ECC_CLEAR	(1 << 1) /* Reset ECC bit */
63 #define SLCCFG_DMA_ECC		(1 << 4) /* Enable DMA ECC bit */
64 #define SLCCFG_ECC_EN		(1 << 3) /* ECC enable bit */
108 /* ECC line party fetch macro */
113  * DMA requires storage space for the DMA local buffer and the hardware ECC
120 /* Number of bytes used for ECC stored in NAND per 256 bytes */
134  * NAND ECC Layout for small page NAND devices
167 	.ecc = lpc32xx_ooblayout_ecc,
229 	 * DMA and CPU addresses of ECC work area and data buffer
325  * Prepares SLC for transfers with H/W ECC enabled
329 	/* Hardware ECC is enabled automatically in hardware as needed */  in lpc32xx_nand_ecc_enable()
333  * Calculates the ECC for the data
340 	 * ECC is calculated automatically in hardware during syndrome read  in lpc32xx_nand_ecc_calculate()
357  * Simple device read without ECC
363 	/* Direct device read with no ECC */  in lpc32xx_nand_read_buf()
369  * Simple device write without ECC
376 	/* Direct device write with no ECC */  in lpc32xx_nand_write_buf()
382  * Read the OOB data from the device without ECC using FIFO method
392  * Write the OOB data to the device without ECC using FIFO method
403  * Fills in the ECC fields in the OOB buffer with the hardware generated ECC
405 static void lpc32xx_slc_ecc_copy(uint8_t *spare, const uint32_t *ecc, int count)  in lpc32xx_slc_ecc_copy()  argument
410 		uint32_t ce = ecc[i / 3];  in lpc32xx_slc_ecc_copy()
483  * DMA read/write transfers with ECC support
519 	/* Clear initial ECC */  in lpc32xx_xfer()
529 	for (i = 0; i < chip->ecc.steps; i++) {  in lpc32xx_xfer()
532 				       dma_buf + i * chip->ecc.size,  in lpc32xx_xfer()
533 				       mtd->writesize / chip->ecc.steps, dir);  in lpc32xx_xfer()
537 		/* Always _read_ ECC */  in lpc32xx_xfer()
538 		if (i == chip->ecc.steps - 1)  in lpc32xx_xfer()
540 		if (!read) /* ECC availability delayed on write */  in lpc32xx_xfer()
567 	/* Read last calculated ECC value */  in lpc32xx_xfer()
570 	host->ecc_buf[chip->ecc.steps - 1] =  in lpc32xx_xfer()
583 	/* Stop DMA & HW ECC */  in lpc32xx_xfer()
597  * Read the data and OOB data from the device, use ECC correction with the
598  * data, disable ECC for the OOB data
612 	/* Read data and oob, calculate ECC */  in lpc32xx_nand_read_page_syndrome()
613 	status = lpc32xx_xfer(mtd, buf, chip->ecc.steps, 1);  in lpc32xx_nand_read_page_syndrome()
618 	/* Convert to stored ECC format */  in lpc32xx_nand_read_page_syndrome()
619 	lpc32xx_slc_ecc_copy(tmpecc, (uint32_t *) host->ecc_buf, chip->ecc.steps);  in lpc32xx_nand_read_page_syndrome()
621 	/* Pointer to ECC data retrieved from NAND spare area */  in lpc32xx_nand_read_page_syndrome()
628 	for (i = 0; i < chip->ecc.steps; i++) {  in lpc32xx_nand_read_page_syndrome()
629 		stat = chip->ecc.correct(chip, buf, oobecc,  in lpc32xx_nand_read_page_syndrome()
630 					 &tmpecc[i * chip->ecc.bytes]);  in lpc32xx_nand_read_page_syndrome()
636 		buf += chip->ecc.size;  in lpc32xx_nand_read_page_syndrome()
637 		oobecc += chip->ecc.bytes;  in lpc32xx_nand_read_page_syndrome()
644  * Read the data and OOB data from the device, no ECC correction with the
657 	chip->legacy.read_buf(chip, buf, chip->ecc.size * chip->ecc.steps);  in lpc32xx_nand_read_page_raw_syndrome()
664  * Write the data and OOB data to the device, use ECC with the data,
665  * disable ECC for the OOB data
679 	/* Write data, calculate ECC on outbound data */  in lpc32xx_nand_write_page_syndrome()
680 	error = lpc32xx_xfer(mtd, (uint8_t *)buf, chip->ecc.steps, 0);  in lpc32xx_nand_write_page_syndrome()
685 	 * The calculated ECC needs some manual work done to it before  in lpc32xx_nand_write_page_syndrome()
686 	 * committing it to NAND. Process the calculated ECC and place  in lpc32xx_nand_write_page_syndrome()
693 	lpc32xx_slc_ecc_copy(pb, (uint32_t *)host->ecc_buf, chip->ecc.steps);  in lpc32xx_nand_write_page_syndrome()
695 	/* Write ECC data to device */  in lpc32xx_nand_write_page_syndrome()
702  * Write the data and OOB data to the device, no ECC correction with the
713 				chip->ecc.size * chip->ecc.steps);  in lpc32xx_nand_write_page_raw_syndrome()
778 	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)  in lpc32xx_nand_attach_chip()
781 	/* OOB and ECC CPU and DMA work areas */  in lpc32xx_nand_attach_chip()
792 	chip->ecc.placement = NAND_ECC_PLACEMENT_INTERLEAVED;  in lpc32xx_nand_attach_chip()
794 	chip->ecc.size = 256;  in lpc32xx_nand_attach_chip()
795 	chip->ecc.strength = 1;  in lpc32xx_nand_attach_chip()
796 	chip->ecc.bytes = LPC32XX_SLC_DEV_ECC_BYTES;  in lpc32xx_nand_attach_chip()
797 	chip->ecc.prepad = 0;  in lpc32xx_nand_attach_chip()
798 	chip->ecc.postpad = 0;  in lpc32xx_nand_attach_chip()
799 	chip->ecc.read_page_raw = lpc32xx_nand_read_page_raw_syndrome;  in lpc32xx_nand_attach_chip()
800 	chip->ecc.read_page = lpc32xx_nand_read_page_syndrome;  in lpc32xx_nand_attach_chip()
801 	chip->ecc.write_page_raw = lpc32xx_nand_write_page_raw_syndrome;  in lpc32xx_nand_attach_chip()
802 	chip->ecc.write_page = lpc32xx_nand_write_page_syndrome;  in lpc32xx_nand_attach_chip()
803 	chip->ecc.write_oob = lpc32xx_nand_write_oob_syndrome;  in lpc32xx_nand_attach_chip()
804 	chip->ecc.read_oob = lpc32xx_nand_read_oob_syndrome;  in lpc32xx_nand_attach_chip()
805 	chip->ecc.calculate = lpc32xx_nand_ecc_calculate;  in lpc32xx_nand_attach_chip()
806 	chip->ecc.correct = rawnand_sw_hamming_correct;  in lpc32xx_nand_attach_chip()
807 	chip->ecc.hwctl = lpc32xx_nand_ecc_enable;  in lpc32xx_nand_attach_chip()
811 	 * won't interfere with the ECC layout. Large and huge page  in lpc32xx_nand_attach_chip()
904 	 * extra space for the spare area and ECC storage area  in lpc32xx_nand_probe()