nand/raw/lpc32xx_mlc.c

3  * Driver for NAND MLC Controller in LPC32xx
38 * MLC NAND controller register offsets
235 	/* Reset MLC controller */  in lpc32xx_nand_setup()
239 	/* Get base clock for MLC block */  in lpc32xx_nand_setup()
248 	/* Configure MLC Controller: Large Block, 5 Byte Address */  in lpc32xx_nand_setup()
540 		/* Auto Encode w/ Bit 8 = 0 (see LPC MLC Controller manual) */  in lpc32xx_write_page_lowlevel()
554 	/* Read whole page - necessary with MLC controller! */  in lpc32xx_read_oob()
562 	/* None, write_oob conflicts with the automatic LPC MLC ECC decoder! */  in lpc32xx_write_oob()
566 /* Prepares MLC for transfers with H/W ECC enabled: always enabled anyway */
587 		host->dma_chan = dma_request_channel(mask, host->pdata->dma_filter, "nand-mlc");  in lpc32xx_dma_setup()
887 	{ .compatible = "nxp,lpc3220-mlc" },
907 MODULE_DESCRIPTION("NAND driver for the NXP LPC32XX MLC controller");