18 #define BF_GPMI_CTRL0_COMMAND_MODE(v)	\  argument
19 	(((v) << BP_GPMI_CTRL0_COMMAND_MODE) & BM_GPMI_CTRL0_COMMAND_MODE)
37 #define BF_GPMI_CTRL0_LOCK_CS(v, x)			0x0  argument
43 #define BF_GPMI_CTRL0_CS(v, x)		(((v) << BP_GPMI_CTRL0_CS) & \  argument
48 #define BP_GPMI_CTRL0_ADDRESS				17
50 #define BF_GPMI_CTRL0_ADDRESS(v)	\  argument
51 		(((v) << BP_GPMI_CTRL0_ADDRESS) & BM_GPMI_CTRL0_ADDRESS)
62 #define BF_GPMI_CTRL0_XFER_COUNT(v)	\  argument
63 		(((v) << BP_GPMI_CTRL0_XFER_COUNT) & BM_GPMI_CTRL0_XFER_COUNT)
74 #define BF_GPMI_ECCCTRL_ECC_CMD(v)	\  argument
75 		(((v) << BP_GPMI_ECCCTRL_ECC_CMD) & BM_GPMI_ECCCTRL_ECC_CMD)
85 #define BF_GPMI_ECCCTRL_BUFFER_MASK(v)	\  argument
86 	(((v) << BP_GPMI_ECCCTRL_BUFFER_MASK) & BM_GPMI_ECCCTRL_BUFFER_MASK)
103 #define BF_GPMI_CTRL1_WRN_DLY_SEL(v)  \  argument
104 	(((v) << BP_GPMI_CTRL1_WRN_DLY_SEL) & BM_GPMI_CTRL1_WRN_DLY_SEL)
113 #define BP_GPMI_CTRL1_DLL_ENABLE			17
121 #define BF_GPMI_CTRL1_RDN_DELAY(v)	\  argument
122 		(((v) << BP_GPMI_CTRL1_RDN_DELAY) & BM_GPMI_CTRL1_RDN_DELAY)
147 #define BF_GPMI_TIMING0_ADDRESS_SETUP(v)	\  argument
148 	(((v) << BP_GPMI_TIMING0_ADDRESS_SETUP) & BM_GPMI_TIMING0_ADDRESS_SETUP)
152 #define BF_GPMI_TIMING0_DATA_HOLD(v)		\  argument
153 	(((v) << BP_GPMI_TIMING0_DATA_HOLD) & BM_GPMI_TIMING0_DATA_HOLD)
157 #define BF_GPMI_TIMING0_DATA_SETUP(v)		\  argument
158 	(((v) << BP_GPMI_TIMING0_DATA_SETUP) & BM_GPMI_TIMING0_DATA_SETUP)
163 #define BF_GPMI_TIMING1_BUSY_TIMEOUT(v)		\  argument
164 	(((v) << BP_GPMI_TIMING1_BUSY_TIMEOUT) & BM_GPMI_TIMING1_BUSY_TIMEOUT)
173 #define MX28_BF_GPMI_STAT_READY_BUSY(v)		\  argument
174 	(((v) << MX28_BP_GPMI_STAT_READY_BUSY) & MX28_BM_GPMI_STAT_READY_BUSY)