Lines Matching +full:clk +full:- +full:out +full:- +full:strength
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
10 #include <linux/dma-mapping.h>
12 #include <linux/clk.h>
18 #include <linux/mtd/nand-ecc-mtk.h>
62 struct clk *clk; member
71 /* ecc strength that each IP supports */
129 struct device *dev = ecc->dev; in mtk_ecc_wait_idle()
133 ret = readl_poll_timeout_atomic(ecc->regs + ECC_IDLE_REG(op), val, in mtk_ecc_wait_idle()
146 dec = readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECIRQ_STA]) in mtk_ecc_irq()
149 dec = readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECDONE]); in mtk_ecc_irq()
150 if (dec & ecc->sectors) { in mtk_ecc_irq()
155 readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECIRQ_STA]); in mtk_ecc_irq()
156 ecc->sectors = 0; in mtk_ecc_irq()
157 complete(&ecc->done); in mtk_ecc_irq()
162 enc = readl(ecc->regs + ecc->caps->ecc_regs[ECC_ENCIRQ_STA]) in mtk_ecc_irq()
165 complete(&ecc->done); in mtk_ecc_irq()
178 for (i = 0; i < ecc->caps->num_ecc_strength; i++) { in mtk_ecc_config()
179 if (ecc->caps->ecc_strength[i] == config->strength) in mtk_ecc_config()
183 if (i == ecc->caps->num_ecc_strength) { in mtk_ecc_config()
184 dev_err(ecc->dev, "invalid ecc strength %d\n", in mtk_ecc_config()
185 config->strength); in mtk_ecc_config()
186 return -EINVAL; in mtk_ecc_config()
191 if (config->op == ECC_ENCODE) { in mtk_ecc_config()
193 enc_sz = config->len << 3; in mtk_ecc_config()
195 reg = ecc_bit | (config->mode << ecc->caps->ecc_mode_shift); in mtk_ecc_config()
197 writel(reg, ecc->regs + ECC_ENCCNFG); in mtk_ecc_config()
199 if (config->mode != ECC_NFI_MODE) in mtk_ecc_config()
200 writel(lower_32_bits(config->addr), in mtk_ecc_config()
201 ecc->regs + ECC_ENCDIADDR); in mtk_ecc_config()
205 dec_sz = (config->len << 3) + in mtk_ecc_config()
206 config->strength * ecc->caps->parity_bits; in mtk_ecc_config()
208 reg = ecc_bit | (config->mode << ecc->caps->ecc_mode_shift); in mtk_ecc_config()
211 writel(reg, ecc->regs + ECC_DECCNFG); in mtk_ecc_config()
213 if (config->sectors) in mtk_ecc_config()
214 ecc->sectors = 1 << (config->sectors - 1); in mtk_ecc_config()
226 stats->corrected = 0; in mtk_ecc_get_stats()
227 stats->failed = 0; in mtk_ecc_get_stats()
231 err = readl(ecc->regs + ECC_DECENUM0 + offset); in mtk_ecc_get_stats()
232 err = err >> ((i % 4) * ecc->caps->err_shift); in mtk_ecc_get_stats()
233 err &= ecc->caps->err_mask; in mtk_ecc_get_stats()
234 if (err == ecc->caps->err_mask) { in mtk_ecc_get_stats()
236 stats->failed++; in mtk_ecc_get_stats()
240 stats->corrected += err; in mtk_ecc_get_stats()
244 stats->bitflips = bitflips; in mtk_ecc_get_stats()
250 clk_disable_unprepare(ecc->clk); in mtk_ecc_release()
251 put_device(ecc->dev); in mtk_ecc_release()
258 writew(ECC_OP_DISABLE, ecc->regs + ECC_ENCCON); in mtk_ecc_hw_init()
261 writel(ECC_OP_DISABLE, ecc->regs + ECC_DECCON); in mtk_ecc_hw_init()
271 return ERR_PTR(-EPROBE_DEFER); in mtk_ecc_get()
275 put_device(&pdev->dev); in mtk_ecc_get()
276 return ERR_PTR(-EPROBE_DEFER); in mtk_ecc_get()
279 clk_prepare_enable(ecc->clk); in mtk_ecc_get()
290 np = of_parse_phandle(of_node, "nand-ecc-engine", 0); in of_mtk_ecc_get()
293 np = of_parse_phandle(of_node, "ecc-engine", 0); in of_mtk_ecc_get()
305 enum mtk_ecc_operation op = config->op; in mtk_ecc_enable()
309 ret = mutex_lock_interruptible(&ecc->lock); in mtk_ecc_enable()
311 dev_err(ecc->dev, "interrupted when attempting to lock\n"); in mtk_ecc_enable()
319 mutex_unlock(&ecc->lock); in mtk_ecc_enable()
323 if (config->mode != ECC_NFI_MODE || op != ECC_ENCODE) { in mtk_ecc_enable()
324 init_completion(&ecc->done); in mtk_ecc_enable()
327 * For ECC_NFI_MODE, if ecc->caps->pg_irq_sel is 1, then it in mtk_ecc_enable()
331 if (ecc->caps->pg_irq_sel && config->mode == ECC_NFI_MODE) in mtk_ecc_enable()
334 writew(reg_val, ecc->regs + in mtk_ecc_enable()
335 ecc->caps->ecc_regs[ECC_ENCIRQ_EN]); in mtk_ecc_enable()
337 writew(reg_val, ecc->regs + in mtk_ecc_enable()
338 ecc->caps->ecc_regs[ECC_DECIRQ_EN]); in mtk_ecc_enable()
341 writew(ECC_OP_ENABLE, ecc->regs + ECC_CTL_REG(op)); in mtk_ecc_enable()
351 /* find out the running operation */ in mtk_ecc_disable()
352 if (readw(ecc->regs + ECC_CTL_REG(op)) != ECC_OP_ENABLE) in mtk_ecc_disable()
362 readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECDONE]); in mtk_ecc_disable()
363 writew(0, ecc->regs + ecc->caps->ecc_regs[ECC_DECIRQ_EN]); in mtk_ecc_disable()
365 writew(0, ecc->regs + ecc->caps->ecc_regs[ECC_ENCIRQ_EN]); in mtk_ecc_disable()
368 writew(ECC_OP_DISABLE, ecc->regs + ECC_CTL_REG(op)); in mtk_ecc_disable()
370 mutex_unlock(&ecc->lock); in mtk_ecc_disable()
378 ret = wait_for_completion_timeout(&ecc->done, msecs_to_jiffies(500)); in mtk_ecc_wait_done()
380 dev_err(ecc->dev, "%s timeout - interrupt did not arrive)\n", in mtk_ecc_wait_done()
382 return -ETIMEDOUT; in mtk_ecc_wait_done()
396 addr = dma_map_single(ecc->dev, data, bytes, DMA_TO_DEVICE); in mtk_ecc_encode()
397 ret = dma_mapping_error(ecc->dev, addr); in mtk_ecc_encode()
399 dev_err(ecc->dev, "dma mapping error\n"); in mtk_ecc_encode()
400 return -EINVAL; in mtk_ecc_encode()
403 config->op = ECC_ENCODE; in mtk_ecc_encode()
404 config->addr = addr; in mtk_ecc_encode()
407 dma_unmap_single(ecc->dev, addr, bytes, DMA_TO_DEVICE); in mtk_ecc_encode()
418 len = (config->strength * ecc->caps->parity_bits + 7) >> 3; in mtk_ecc_encode()
421 __ioread32_copy(ecc->eccdata, in mtk_ecc_encode()
422 ecc->regs + ecc->caps->ecc_regs[ECC_ENCPAR00], in mtk_ecc_encode()
426 memcpy(data + bytes, ecc->eccdata, len); in mtk_ecc_encode()
429 dma_unmap_single(ecc->dev, addr, bytes, DMA_TO_DEVICE); in mtk_ecc_encode()
438 const u8 *ecc_strength = ecc->caps->ecc_strength; in mtk_ecc_adjust_strength()
441 for (i = 0; i < ecc->caps->num_ecc_strength; i++) { in mtk_ecc_adjust_strength()
446 *p = ecc_strength[i - 1]; in mtk_ecc_adjust_strength()
451 *p = ecc_strength[ecc->caps->num_ecc_strength - 1]; in mtk_ecc_adjust_strength()
457 return ecc->caps->parity_bits; in mtk_ecc_get_parity_bits()
507 .compatible = "mediatek,mt2701-ecc",
510 .compatible = "mediatek,mt2712-ecc",
513 .compatible = "mediatek,mt7622-ecc",
516 .compatible = "mediatek,mt7986-ecc",
524 struct device *dev = &pdev->dev; in mtk_ecc_probe()
531 return -ENOMEM; in mtk_ecc_probe()
533 ecc->caps = of_device_get_match_data(dev); in mtk_ecc_probe()
535 max_eccdata_size = ecc->caps->num_ecc_strength - 1; in mtk_ecc_probe()
536 max_eccdata_size = ecc->caps->ecc_strength[max_eccdata_size]; in mtk_ecc_probe()
537 max_eccdata_size = (max_eccdata_size * ecc->caps->parity_bits + 7) >> 3; in mtk_ecc_probe()
539 ecc->eccdata = devm_kzalloc(dev, max_eccdata_size, GFP_KERNEL); in mtk_ecc_probe()
540 if (!ecc->eccdata) in mtk_ecc_probe()
541 return -ENOMEM; in mtk_ecc_probe()
543 ecc->regs = devm_platform_ioremap_resource(pdev, 0); in mtk_ecc_probe()
544 if (IS_ERR(ecc->regs)) in mtk_ecc_probe()
545 return PTR_ERR(ecc->regs); in mtk_ecc_probe()
547 ecc->clk = devm_clk_get(dev, NULL); in mtk_ecc_probe()
548 if (IS_ERR(ecc->clk)) { in mtk_ecc_probe()
549 dev_err(dev, "failed to get clock: %ld\n", PTR_ERR(ecc->clk)); in mtk_ecc_probe()
550 return PTR_ERR(ecc->clk); in mtk_ecc_probe()
563 ret = devm_request_irq(dev, irq, mtk_ecc_irq, 0x0, "mtk-ecc", ecc); in mtk_ecc_probe()
566 return -EINVAL; in mtk_ecc_probe()
569 ecc->dev = dev; in mtk_ecc_probe()
570 mutex_init(&ecc->lock); in mtk_ecc_probe()
582 clk_disable_unprepare(ecc->clk); in mtk_ecc_suspend()
592 ret = clk_prepare_enable(ecc->clk); in mtk_ecc_resume()
594 dev_err(dev, "failed to enable clk\n"); in mtk_ecc_resume()
609 .name = "mtk-ecc",