1 // SPDX-License-Identifier: GPL-2.0-only
8  * Date:	2016-8-24
22 #include <linux/dma-mapping.h>
24 #include "sdhci-pltfm.h"
25 #include "sdhci-xenon.h"
44 			dev_err(mmc_dev(host->mmc), "Internal clock never stabilised.\n");  in xenon_enable_internal_clk()
45 			return -ETIMEDOUT;  in xenon_enable_internal_clk()
53 /* Set SDCLK-off-while-idle */
94 	host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;  in xenon_enable_sdhc()
99 	host->mmc->caps &= ~MMC_CAP_BUS_WIDTH_TEST;  in xenon_enable_sdhc()
140 	/* Disable the Re-Tuning Request functionality */  in xenon_retune_setup()
145 	/* Disable the Re-tuning Interrupt */  in xenon_retune_setup()
154 	host->tuning_mode = SDHCI_TUNING_MODE_1;  in xenon_retune_setup()
155 	/* Set re-tuning period */  in xenon_retune_setup()
156 	host->tuning_count = 1 << (priv->tuning_count - 1);  in xenon_retune_setup()
170 	/* Disable tuning request and auto-retuning again */  in xenon_reset_exit()
191 	xenon_reset_exit(host, priv->sdhc_id, mask);  in xenon_reset()
227 	struct mmc_host *mmc = host->mmc;  in xenon_set_power()
228 	u8 pwr = host->pwr;  in xenon_set_power()
232 	if (host->pwr == pwr)  in xenon_set_power()
235 	if (host->pwr == 0)  in xenon_set_power()
238 	if (!IS_ERR(mmc->supply.vmmc))  in xenon_set_power()
239 		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);  in xenon_set_power()
244 	/* Wait for 5ms after set 1.8V signal enable bit */  in xenon_voltage_switch()
252 	if (pltfm_host->clk)  in xenon_get_max_clock()
255 		return pltfm_host->clock;  in xenon_get_max_clock()
292 	if ((ios->timing == MMC_TIMING_MMC_HS400) ||  in xenon_set_ios()
293 	    (ios->timing == MMC_TIMING_MMC_HS200) ||  in xenon_set_ios()
294 	    (ios->timing == MMC_TIMING_MMC_HS)) {  in xenon_set_ios()
295 		host->preset_enabled = false;  in xenon_set_ios()
296 		host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;  in xenon_set_ios()
297 		host->flags &= ~SDHCI_PV_ENABLED;  in xenon_set_ios()
303 		host->quirks2 &= ~SDHCI_QUIRK2_PRESET_VALUE_BROKEN;  in xenon_set_ios()
309 	if (host->clock > XENON_DEFAULT_SDCLK_FREQ)  in xenon_set_ios()
310 		xenon_set_sdclk_off_idle(host, priv->sdhc_id, true);  in xenon_set_ios()
330 	xenon_soc_pad_ctrl(host, ios->signal_voltage);  in xenon_start_signal_voltage_switch()
337 	if (PTR_ERR(mmc->supply.vqmmc) == -ENODEV)  in xenon_start_signal_voltage_switch()
345  * priv->init_card_type will be used in PHY timing adjustment.
354 	priv->init_card_type = card->type;  in xenon_init_card()
361 	if (host->timing == MMC_TIMING_UHS_DDR50 ||  in xenon_execute_tuning()
362 		host->timing == MMC_TIMING_MMC_DDR52)  in xenon_execute_tuning()
370 	if (host->tuning_mode != SDHCI_TUNING_MODE_1)  in xenon_execute_tuning()
382 	u8 sdhc_id = priv->sdhc_id;  in xenon_enable_sdio_irq()
404 	host->mmc_host_ops.set_ios = xenon_set_ios;  in xenon_replace_mmc_host_ops()
405 	host->mmc_host_ops.start_signal_voltage_switch =  in xenon_replace_mmc_host_ops()
407 	host->mmc_host_ops.init_card = xenon_init_card;  in xenon_replace_mmc_host_ops()
408 	host->mmc_host_ops.execute_tuning = xenon_execute_tuning;  in xenon_replace_mmc_host_ops()
409 	host->mmc_host_ops.enable_sdio_irq = xenon_enable_sdio_irq;  in xenon_replace_mmc_host_ops()
414  * sdhc-id: the index of current SDHC.
416  * tun-count: the interval between re-tuning
420 	struct device *dev = &pdev->dev;  in xenon_probe_params()
422 	struct mmc_host *mmc = host->mmc;  in xenon_probe_params()
430 	if (priv->hw_version == XENON_AP806)  in xenon_probe_params()
431 		host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;  in xenon_probe_params()
434 	if (!device_property_read_u32(dev, "marvell,xenon-sdhc-id", &sdhc_id)) {  in xenon_probe_params()
440 			return -EINVAL;  in xenon_probe_params()
443 	priv->sdhc_id = sdhc_id;  in xenon_probe_params()
446 	if (!device_property_read_u32(dev, "marvell,xenon-tun-count",  in xenon_probe_params()
449 			dev_err(mmc_dev(mmc), "Wrong Re-tuning Count. Set default value %d\n",  in xenon_probe_params()
454 	priv->tuning_count = tuning_count;  in xenon_probe_params()
457 	 * AC5/X/IM HW has only 31-bits passed in the crossbar switch.  in xenon_probe_params()
460 	 * represented. In this case, disable ADMA, 64-bit DMA and allow only SDMA.  in xenon_probe_params()
462 	 * generic SDHCI driver, which will make sure DMA is only done  in xenon_probe_params()
465 	if (priv->hw_version == XENON_AC5) {  in xenon_probe_params()
468 			host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;  in xenon_probe_params()
469 			host->quirks2 |= SDHCI_QUIRK2_BROKEN_64_BIT_DMA;  in xenon_probe_params()
480 	u8 sdhc_id = priv->sdhc_id;  in xenon_sdhc_prepare()
491 	/* Disable SDCLK-Off-While-Idle before card init */  in xenon_sdhc_prepare()
503 	u8 sdhc_id = priv->sdhc_id;  in xenon_sdhc_unprepare()
512 	struct device *dev = &pdev->dev;  in xenon_probe()
525 	priv->hw_version = (unsigned long)device_get_match_data(&pdev->dev);  in xenon_probe()
533 	if (dev->of_node) {  in xenon_probe()
534 		pltfm_host->clk = devm_clk_get(&pdev->dev, "core");  in xenon_probe()
535 		if (IS_ERR(pltfm_host->clk)) {  in xenon_probe()
536 			err = PTR_ERR(pltfm_host->clk);  in xenon_probe()
537 			dev_err(&pdev->dev, "Failed to setup input clk: %d\n", err);  in xenon_probe()
540 		err = clk_prepare_enable(pltfm_host->clk);  in xenon_probe()
544 		priv->axi_clk = devm_clk_get(&pdev->dev, "axi");  in xenon_probe()
545 		if (IS_ERR(priv->axi_clk)) {  in xenon_probe()
546 			err = PTR_ERR(priv->axi_clk);  in xenon_probe()
547 			if (err == -EPROBE_DEFER)  in xenon_probe()
550 			err = clk_prepare_enable(priv->axi_clk);  in xenon_probe()
556 	err = mmc_of_parse(host->mmc);  in xenon_probe()
573 	pm_runtime_get_noresume(&pdev->dev);  in xenon_probe()
574 	pm_runtime_set_active(&pdev->dev);  in xenon_probe()
575 	pm_runtime_set_autosuspend_delay(&pdev->dev, 50);  in xenon_probe()
576 	pm_runtime_use_autosuspend(&pdev->dev);  in xenon_probe()
577 	pm_runtime_enable(&pdev->dev);  in xenon_probe()
578 	pm_suspend_ignore_children(&pdev->dev, 1);  in xenon_probe()
584 	pm_runtime_put_autosuspend(&pdev->dev);  in xenon_probe()
587 	 * then we disable ADMA and 64-bit DMA.  in xenon_probe()
588 	 * This means generic SDHCI driver has set the DMA mask to  in xenon_probe()
589 	 * 32-bit. Since DDR starts at 0x2_0000_0000, we must use  in xenon_probe()
590 	 * 34-bit DMA mask to access this DDR memory:  in xenon_probe()
592 	if (priv->hw_version == XENON_AC5 &&  in xenon_probe()
593 	    host->quirks2 & SDHCI_QUIRK2_BROKEN_64_BIT_DMA)  in xenon_probe()
594 		dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(34));  in xenon_probe()
599 	pm_runtime_disable(&pdev->dev);  in xenon_probe()
600 	pm_runtime_put_noidle(&pdev->dev);  in xenon_probe()
603 	clk_disable_unprepare(priv->axi_clk);  in xenon_probe()
605 	clk_disable_unprepare(pltfm_host->clk);  in xenon_probe()
617 	pm_runtime_get_sync(&pdev->dev);  in xenon_remove()
618 	pm_runtime_disable(&pdev->dev);  in xenon_remove()
619 	pm_runtime_put_noidle(&pdev->dev);  in xenon_remove()
624 	clk_disable_unprepare(priv->axi_clk);  in xenon_remove()
625 	clk_disable_unprepare(pltfm_host->clk);  in xenon_remove()
640 	priv->restore_needed = true;  in xenon_suspend()
657 	if (host->tuning_mode != SDHCI_TUNING_MODE_3)  in xenon_runtime_suspend()
658 		mmc_retune_needed(host->mmc);  in xenon_runtime_suspend()
660 	clk_disable_unprepare(pltfm_host->clk);  in xenon_runtime_suspend()
662 	 * Need to update the priv->clock here, or when runtime resume  in xenon_runtime_suspend()
666 	priv->clock = 0;  in xenon_runtime_suspend()
677 	ret = clk_prepare_enable(pltfm_host->clk);  in xenon_runtime_resume()
683 	if (priv->restore_needed) {  in xenon_runtime_resume()
687 		priv->restore_needed = false;  in xenon_runtime_resume()
695 	clk_disable_unprepare(pltfm_host->clk);  in xenon_runtime_resume()
709 	{ .compatible = "marvell,armada-ap806-sdhci", .data = (void *)XENON_AP806},
710 	{ .compatible = "marvell,armada-ap807-sdhci", .data = (void *)XENON_AP807},
711 	{ .compatible = "marvell,armada-cp110-sdhci", .data =  (void *)XENON_CP110},
712 	{ .compatible = "marvell,armada-3700-sdhci", .data =  (void *)XENON_A3700},
713 	{ .compatible = "marvell,ac5-sdhci",	     .data =  (void *)XENON_AC5},
730 		.name	= "xenon-sdhci",
742 MODULE_DESCRIPTION("SDHCI platform driver for Marvell Xenon SDHC");