Lines Matching +full:int +full:- +full:clock +full:- +full:stable +full:- +full:broken
1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/mmc/slot-gpio.h>
24 #include "sdhci-pltfm.h"
36 #define SDHCI_AT91_PRESET_COMMON_CONF 0x400 /* drv type B, programmable clock mode */
41 unsigned int divider_for_baseclk;
57 mc1r = readb(host->ioaddr + SDMMC_MC1R); in sdhci_at91_set_force_card_detect()
59 writeb(mc1r, host->ioaddr + SDMMC_MC1R); in sdhci_at91_set_force_card_detect()
62 static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock) in sdhci_at91_set_clock() argument
66 host->mmc->actual_clock = 0; in sdhci_at91_set_clock()
69 * There is no requirement to disable the internal clock before in sdhci_at91_set_clock()
70 * changing the SD clock configuration. Moreover, disabling the in sdhci_at91_set_clock()
71 * internal clock, changing the configuration and re-enabling the in sdhci_at91_set_clock()
72 * internal clock causes some bugs. It can prevent to get the internal in sdhci_at91_set_clock()
73 * clock stable flag ready and an unexpected switch to the base clock in sdhci_at91_set_clock()
80 if (clock == 0) in sdhci_at91_set_clock()
83 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); in sdhci_at91_set_clock()
91 pr_err("%s: Internal clock never stabilised.\n", in sdhci_at91_set_clock()
92 mmc_hostname(host->mmc)); in sdhci_at91_set_clock()
101 unsigned int timing) in sdhci_at91_set_uhs_signaling()
117 unsigned int tmp; in sdhci_at91_reset()
121 if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) in sdhci_at91_reset()
122 || mmc_gpio_get_cd(host->mmc) >= 0) in sdhci_at91_reset()
125 if (priv->cal_always_on && (mask & SDHCI_RESET_ALL)) { in sdhci_at91_reset()
133 dev_err(mmc_dev(host->mmc), "Failed to calibrate\n"); in sdhci_at91_reset()
161 { .compatible = "atmel,sama5d2-sdhci", .data = &soc_data_sama5d2 },
162 { .compatible = "microchip,sam9x60-sdhci", .data = &soc_data_sam9x60 },
167 static int sdhci_at91_set_clks_presets(struct device *dev) in sdhci_at91_set_clks_presets()
172 unsigned int caps0, caps1; in sdhci_at91_set_clks_presets()
173 unsigned int clk_base, clk_mul; in sdhci_at91_set_clks_presets()
174 unsigned int gck_rate, clk_base_rate; in sdhci_at91_set_clks_presets()
175 unsigned int preset_div; in sdhci_at91_set_clks_presets()
177 clk_prepare_enable(priv->hclock); in sdhci_at91_set_clks_presets()
178 caps0 = readl(host->ioaddr + SDHCI_CAPABILITIES); in sdhci_at91_set_clks_presets()
179 caps1 = readl(host->ioaddr + SDHCI_CAPABILITIES_1); in sdhci_at91_set_clks_presets()
181 gck_rate = clk_get_rate(priv->gck); in sdhci_at91_set_clks_presets()
182 if (priv->soc_data->baseclk_is_generated_internally) in sdhci_at91_set_clks_presets()
183 clk_base_rate = gck_rate / priv->soc_data->divider_for_baseclk; in sdhci_at91_set_clks_presets()
185 clk_base_rate = clk_get_rate(priv->mainck); in sdhci_at91_set_clks_presets()
188 clk_mul = gck_rate / clk_base_rate - 1; in sdhci_at91_set_clks_presets()
195 writel(SDMMC_CACR_KEY | SDMMC_CACR_CAPWREN, host->ioaddr + SDMMC_CACR); in sdhci_at91_set_clks_presets()
196 writel(caps0, host->ioaddr + SDHCI_CAPABILITIES); in sdhci_at91_set_clks_presets()
197 writel(caps1, host->ioaddr + SDHCI_CAPABILITIES_1); in sdhci_at91_set_clks_presets()
199 writel(0, host->ioaddr + SDMMC_CACR); in sdhci_at91_set_clks_presets()
207 * maximum sd clock value is 120 MHz instead of 208 MHz. For that in sdhci_at91_set_clks_presets()
210 preset_div = DIV_ROUND_UP(gck_rate, 24000000) - 1; in sdhci_at91_set_clks_presets()
212 host->ioaddr + SDHCI_PRESET_FOR_SDR12); in sdhci_at91_set_clks_presets()
213 preset_div = DIV_ROUND_UP(gck_rate, 50000000) - 1; in sdhci_at91_set_clks_presets()
215 host->ioaddr + SDHCI_PRESET_FOR_SDR25); in sdhci_at91_set_clks_presets()
216 preset_div = DIV_ROUND_UP(gck_rate, 100000000) - 1; in sdhci_at91_set_clks_presets()
218 host->ioaddr + SDHCI_PRESET_FOR_SDR50); in sdhci_at91_set_clks_presets()
219 preset_div = DIV_ROUND_UP(gck_rate, 120000000) - 1; in sdhci_at91_set_clks_presets()
221 host->ioaddr + SDHCI_PRESET_FOR_SDR104); in sdhci_at91_set_clks_presets()
222 preset_div = DIV_ROUND_UP(gck_rate, 50000000) - 1; in sdhci_at91_set_clks_presets()
224 host->ioaddr + SDHCI_PRESET_FOR_DDR50); in sdhci_at91_set_clks_presets()
226 clk_prepare_enable(priv->mainck); in sdhci_at91_set_clks_presets()
227 clk_prepare_enable(priv->gck); in sdhci_at91_set_clks_presets()
233 static int sdhci_at91_suspend(struct device *dev) in sdhci_at91_suspend()
238 int ret; in sdhci_at91_suspend()
242 priv->restore_needed = true; in sdhci_at91_suspend()
249 static int sdhci_at91_runtime_suspend(struct device *dev) in sdhci_at91_runtime_suspend()
254 int ret; in sdhci_at91_runtime_suspend()
258 if (host->tuning_mode != SDHCI_TUNING_MODE_3) in sdhci_at91_runtime_suspend()
259 mmc_retune_needed(host->mmc); in sdhci_at91_runtime_suspend()
261 clk_disable_unprepare(priv->gck); in sdhci_at91_runtime_suspend()
262 clk_disable_unprepare(priv->hclock); in sdhci_at91_runtime_suspend()
263 clk_disable_unprepare(priv->mainck); in sdhci_at91_runtime_suspend()
268 static int sdhci_at91_runtime_resume(struct device *dev) in sdhci_at91_runtime_resume()
273 int ret; in sdhci_at91_runtime_resume()
275 if (priv->restore_needed) { in sdhci_at91_runtime_resume()
280 priv->restore_needed = false; in sdhci_at91_runtime_resume()
284 ret = clk_prepare_enable(priv->mainck); in sdhci_at91_runtime_resume()
290 ret = clk_prepare_enable(priv->hclock); in sdhci_at91_runtime_resume()
296 ret = clk_prepare_enable(priv->gck); in sdhci_at91_runtime_resume()
314 static int sdhci_at91_probe(struct platform_device *pdev) in sdhci_at91_probe()
320 int ret; in sdhci_at91_probe()
322 soc_data = of_device_get_match_data(&pdev->dev); in sdhci_at91_probe()
324 return -EINVAL; in sdhci_at91_probe()
326 host = sdhci_pltfm_init(pdev, soc_data->pdata, sizeof(*priv)); in sdhci_at91_probe()
332 priv->soc_data = soc_data; in sdhci_at91_probe()
334 priv->mainck = devm_clk_get(&pdev->dev, "baseclk"); in sdhci_at91_probe()
335 if (IS_ERR(priv->mainck)) { in sdhci_at91_probe()
336 if (soc_data->baseclk_is_generated_internally) { in sdhci_at91_probe()
337 priv->mainck = NULL; in sdhci_at91_probe()
339 dev_err(&pdev->dev, "failed to get baseclk\n"); in sdhci_at91_probe()
340 ret = PTR_ERR(priv->mainck); in sdhci_at91_probe()
345 priv->hclock = devm_clk_get(&pdev->dev, "hclock"); in sdhci_at91_probe()
346 if (IS_ERR(priv->hclock)) { in sdhci_at91_probe()
347 dev_err(&pdev->dev, "failed to get hclock\n"); in sdhci_at91_probe()
348 ret = PTR_ERR(priv->hclock); in sdhci_at91_probe()
352 priv->gck = devm_clk_get(&pdev->dev, "multclk"); in sdhci_at91_probe()
353 if (IS_ERR(priv->gck)) { in sdhci_at91_probe()
354 dev_err(&pdev->dev, "failed to get multclk\n"); in sdhci_at91_probe()
355 ret = PTR_ERR(priv->gck); in sdhci_at91_probe()
359 ret = sdhci_at91_set_clks_presets(&pdev->dev); in sdhci_at91_probe()
363 priv->restore_needed = false; in sdhci_at91_probe()
369 priv->cal_always_on = in sdhci_at91_probe()
370 device_property_read_bool(&pdev->dev, in sdhci_at91_probe()
371 "microchip,sdcal-inverted"); in sdhci_at91_probe()
373 ret = mmc_of_parse(host->mmc); in sdhci_at91_probe()
379 pm_runtime_get_noresume(&pdev->dev); in sdhci_at91_probe()
380 pm_runtime_set_active(&pdev->dev); in sdhci_at91_probe()
381 pm_runtime_enable(&pdev->dev); in sdhci_at91_probe()
382 pm_runtime_set_autosuspend_delay(&pdev->dev, 50); in sdhci_at91_probe()
383 pm_runtime_use_autosuspend(&pdev->dev); in sdhci_at91_probe()
385 /* HS200 is broken at this moment */ in sdhci_at91_probe()
386 host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200; in sdhci_at91_probe()
396 * For that reason, it is not planned to wake-up on a card detect irq in sdhci_at91_probe()
398 * If we want to use runtime PM and to be able to wake-up on card in sdhci_at91_probe()
403 * to enable polling via device tree with broken-cd property. in sdhci_at91_probe()
405 if (mmc_card_is_removable(host->mmc) && in sdhci_at91_probe()
406 mmc_gpio_get_cd(host->mmc) < 0) { in sdhci_at91_probe()
407 host->mmc->caps |= MMC_CAP_NEEDS_POLL; in sdhci_at91_probe()
408 host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; in sdhci_at91_probe()
425 if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) in sdhci_at91_probe()
426 || mmc_gpio_get_cd(host->mmc) >= 0) in sdhci_at91_probe()
429 pm_runtime_put_autosuspend(&pdev->dev); in sdhci_at91_probe()
434 pm_runtime_disable(&pdev->dev); in sdhci_at91_probe()
435 pm_runtime_set_suspended(&pdev->dev); in sdhci_at91_probe()
436 pm_runtime_put_noidle(&pdev->dev); in sdhci_at91_probe()
438 clk_disable_unprepare(priv->gck); in sdhci_at91_probe()
439 clk_disable_unprepare(priv->mainck); in sdhci_at91_probe()
440 clk_disable_unprepare(priv->hclock); in sdhci_at91_probe()
451 struct clk *gck = priv->gck; in sdhci_at91_remove()
452 struct clk *hclock = priv->hclock; in sdhci_at91_remove()
453 struct clk *mainck = priv->mainck; in sdhci_at91_remove()
455 pm_runtime_get_sync(&pdev->dev); in sdhci_at91_remove()
456 pm_runtime_disable(&pdev->dev); in sdhci_at91_remove()
457 pm_runtime_put_noidle(&pdev->dev); in sdhci_at91_remove()
468 .name = "sdhci-at91",