Lines Matching full:host
29 #include <linux/mmc/host.h>
435 void __iomem *base; /* host base address */
436 void __iomem *top_base; /* host top register base address */
449 int irq; /* host interrupt */
673 static void msdc_reset_hw(struct msdc_host *host) in msdc_reset_hw() argument
677 sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_RST); in msdc_reset_hw()
678 readl_poll_timeout_atomic(host->base + MSDC_CFG, val, !(val & MSDC_CFG_RST), 0, 0); in msdc_reset_hw()
680 sdr_set_bits(host->base + MSDC_FIFOCS, MSDC_FIFOCS_CLR); in msdc_reset_hw()
681 readl_poll_timeout_atomic(host->base + MSDC_FIFOCS, val, in msdc_reset_hw()
684 val = readl(host->base + MSDC_INT); in msdc_reset_hw()
685 writel(val, host->base + MSDC_INT); in msdc_reset_hw()
688 static void msdc_cmd_next(struct msdc_host *host,
690 static void __msdc_enable_sdio_irq(struct msdc_host *host, int enb);
708 static inline void msdc_dma_setup(struct msdc_host *host, struct msdc_dma *dma, in msdc_dma_setup() argument
739 if (host->dev_comp->support_64g) { in msdc_dma_setup()
745 if (host->dev_comp->support_64g) { in msdc_dma_setup()
763 sdr_set_field(host->base + MSDC_DMA_CFG, MSDC_DMA_CFG_DECSEN, 1); in msdc_dma_setup()
764 dma_ctrl = readl_relaxed(host->base + MSDC_DMA_CTRL); in msdc_dma_setup()
767 writel_relaxed(dma_ctrl, host->base + MSDC_DMA_CTRL); in msdc_dma_setup()
768 if (host->dev_comp->support_64g) in msdc_dma_setup()
769 sdr_set_field(host->base + DMA_SA_H4BIT, DMA_ADDR_HIGH_4BIT, in msdc_dma_setup()
771 writel(lower_32_bits(dma->gpd_addr), host->base + MSDC_DMA_SA); in msdc_dma_setup()
774 static void msdc_prepare_data(struct msdc_host *host, struct mmc_data *data) in msdc_prepare_data() argument
778 data->sg_count = dma_map_sg(host->dev, data->sg, data->sg_len, in msdc_prepare_data()
783 static void msdc_unprepare_data(struct msdc_host *host, struct mmc_data *data) in msdc_unprepare_data() argument
789 dma_unmap_sg(host->dev, data->sg, data->sg_len, in msdc_unprepare_data()
795 static u64 msdc_timeout_cal(struct msdc_host *host, u64 ns, u64 clks) in msdc_timeout_cal() argument
797 struct mmc_host *mmc = mmc_from_priv(host); in msdc_timeout_cal()
810 if (host->dev_comp->clk_div_bits == 8) in msdc_timeout_cal()
811 sdr_get_field(host->base + MSDC_CFG, in msdc_timeout_cal()
814 sdr_get_field(host->base + MSDC_CFG, in msdc_timeout_cal()
824 static void msdc_set_timeout(struct msdc_host *host, u64 ns, u64 clks) in msdc_set_timeout() argument
828 host->timeout_ns = ns; in msdc_set_timeout()
829 host->timeout_clks = clks; in msdc_set_timeout()
831 timeout = msdc_timeout_cal(host, ns, clks); in msdc_set_timeout()
832 sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, in msdc_set_timeout()
836 static void msdc_set_busy_timeout(struct msdc_host *host, u64 ns, u64 clks) in msdc_set_busy_timeout() argument
840 timeout = msdc_timeout_cal(host, ns, clks); in msdc_set_busy_timeout()
841 sdr_set_field(host->base + SDC_CFG, SDC_CFG_WRDTOC, in msdc_set_busy_timeout()
845 static void msdc_gate_clock(struct msdc_host *host) in msdc_gate_clock() argument
847 clk_bulk_disable_unprepare(MSDC_NR_CLOCKS, host->bulk_clks); in msdc_gate_clock()
848 clk_disable_unprepare(host->crypto_clk); in msdc_gate_clock()
849 clk_disable_unprepare(host->src_clk_cg); in msdc_gate_clock()
850 clk_disable_unprepare(host->src_clk); in msdc_gate_clock()
851 clk_disable_unprepare(host->bus_clk); in msdc_gate_clock()
852 clk_disable_unprepare(host->h_clk); in msdc_gate_clock()
855 static int msdc_ungate_clock(struct msdc_host *host) in msdc_ungate_clock() argument
860 clk_prepare_enable(host->h_clk); in msdc_ungate_clock()
861 clk_prepare_enable(host->bus_clk); in msdc_ungate_clock()
862 clk_prepare_enable(host->src_clk); in msdc_ungate_clock()
863 clk_prepare_enable(host->src_clk_cg); in msdc_ungate_clock()
864 clk_prepare_enable(host->crypto_clk); in msdc_ungate_clock()
865 ret = clk_bulk_prepare_enable(MSDC_NR_CLOCKS, host->bulk_clks); in msdc_ungate_clock()
867 dev_err(host->dev, "Cannot enable pclk/axi/ahb clock gates\n"); in msdc_ungate_clock()
871 return readl_poll_timeout(host->base + MSDC_CFG, val, in msdc_ungate_clock()
875 static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz) in msdc_set_mclk() argument
877 struct mmc_host *mmc = mmc_from_priv(host); in msdc_set_mclk()
882 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_set_mclk()
886 dev_dbg(host->dev, "set mclk to 0\n"); in msdc_set_mclk()
887 host->mclk = 0; in msdc_set_mclk()
889 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN); in msdc_set_mclk()
893 flags = readl(host->base + MSDC_INTEN); in msdc_set_mclk()
894 sdr_clr_bits(host->base + MSDC_INTEN, flags); in msdc_set_mclk()
895 if (host->dev_comp->clk_div_bits == 8) in msdc_set_mclk()
896 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_HS400_CK_MODE); in msdc_set_mclk()
898 sdr_clr_bits(host->base + MSDC_CFG, in msdc_set_mclk()
908 if (hz >= (host->src_clk_freq >> 2)) { in msdc_set_mclk()
910 sclk = host->src_clk_freq >> 2; /* sclk = clk / 4 */ in msdc_set_mclk()
912 div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); in msdc_set_mclk()
913 sclk = (host->src_clk_freq >> 2) / div; in msdc_set_mclk()
918 hz >= (host->src_clk_freq >> 1)) { in msdc_set_mclk()
919 if (host->dev_comp->clk_div_bits == 8) in msdc_set_mclk()
920 sdr_set_bits(host->base + MSDC_CFG, in msdc_set_mclk()
923 sdr_set_bits(host->base + MSDC_CFG, in msdc_set_mclk()
925 sclk = host->src_clk_freq >> 1; in msdc_set_mclk()
928 } else if (hz >= host->src_clk_freq) { in msdc_set_mclk()
931 sclk = host->src_clk_freq; in msdc_set_mclk()
934 if (hz >= (host->src_clk_freq >> 1)) { in msdc_set_mclk()
936 sclk = host->src_clk_freq >> 1; /* sclk = clk / 2 */ in msdc_set_mclk()
938 div = (host->src_clk_freq + ((hz << 2) - 1)) / (hz << 2); in msdc_set_mclk()
939 sclk = (host->src_clk_freq >> 2) / div; in msdc_set_mclk()
942 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN); in msdc_set_mclk()
944 clk_disable_unprepare(host->src_clk_cg); in msdc_set_mclk()
945 if (host->dev_comp->clk_div_bits == 8) in msdc_set_mclk()
946 sdr_set_field(host->base + MSDC_CFG, in msdc_set_mclk()
950 sdr_set_field(host->base + MSDC_CFG, in msdc_set_mclk()
954 clk_prepare_enable(host->src_clk_cg); in msdc_set_mclk()
955 readl_poll_timeout(host->base + MSDC_CFG, val, (val & MSDC_CFG_CKSTB), 0, 0); in msdc_set_mclk()
956 sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN); in msdc_set_mclk()
958 host->mclk = hz; in msdc_set_mclk()
959 host->timing = timing; in msdc_set_mclk()
961 msdc_set_timeout(host, host->timeout_ns, host->timeout_clks); in msdc_set_mclk()
962 sdr_set_bits(host->base + MSDC_INTEN, flags); in msdc_set_mclk()
969 writel(host->def_tune_para.iocon, host->base + MSDC_IOCON); in msdc_set_mclk()
970 if (host->top_base) { in msdc_set_mclk()
971 writel(host->def_tune_para.emmc_top_control, in msdc_set_mclk()
972 host->top_base + EMMC_TOP_CONTROL); in msdc_set_mclk()
973 writel(host->def_tune_para.emmc_top_cmd, in msdc_set_mclk()
974 host->top_base + EMMC_TOP_CMD); in msdc_set_mclk()
976 writel(host->def_tune_para.pad_tune, in msdc_set_mclk()
977 host->base + tune_reg); in msdc_set_mclk()
980 writel(host->saved_tune_para.iocon, host->base + MSDC_IOCON); in msdc_set_mclk()
981 writel(host->saved_tune_para.pad_cmd_tune, in msdc_set_mclk()
982 host->base + PAD_CMD_TUNE); in msdc_set_mclk()
983 if (host->top_base) { in msdc_set_mclk()
984 writel(host->saved_tune_para.emmc_top_control, in msdc_set_mclk()
985 host->top_base + EMMC_TOP_CONTROL); in msdc_set_mclk()
986 writel(host->saved_tune_para.emmc_top_cmd, in msdc_set_mclk()
987 host->top_base + EMMC_TOP_CMD); in msdc_set_mclk()
989 writel(host->saved_tune_para.pad_tune, in msdc_set_mclk()
990 host->base + tune_reg); in msdc_set_mclk()
995 host->dev_comp->hs400_tune) in msdc_set_mclk()
996 sdr_set_field(host->base + tune_reg, in msdc_set_mclk()
998 host->hs400_cmd_int_delay); in msdc_set_mclk()
999 dev_dbg(host->dev, "sclk: %d, timing: %d\n", mmc->actual_clock, in msdc_set_mclk()
1003 static inline u32 msdc_cmd_find_resp(struct msdc_host *host, in msdc_cmd_find_resp() argument
1031 static inline u32 msdc_cmd_prepare_raw_cmd(struct msdc_host *host, in msdc_cmd_prepare_raw_cmd() argument
1034 struct mmc_host *mmc = mmc_from_priv(host); in msdc_cmd_prepare_raw_cmd()
1040 u32 resp = msdc_cmd_find_resp(host, cmd); in msdc_cmd_prepare_raw_cmd()
1043 host->cmd_rsp = resp; in msdc_cmd_prepare_raw_cmd()
1074 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_PIO); in msdc_cmd_prepare_raw_cmd()
1076 if (host->timeout_ns != data->timeout_ns || in msdc_cmd_prepare_raw_cmd()
1077 host->timeout_clks != data->timeout_clks) in msdc_cmd_prepare_raw_cmd()
1078 msdc_set_timeout(host, data->timeout_ns, in msdc_cmd_prepare_raw_cmd()
1081 writel(data->blocks, host->base + SDC_BLK_NUM); in msdc_cmd_prepare_raw_cmd()
1086 static void msdc_start_data(struct msdc_host *host, struct mmc_command *cmd, in msdc_start_data() argument
1091 WARN_ON(host->data); in msdc_start_data()
1092 host->data = data; in msdc_start_data()
1095 mod_delayed_work(system_wq, &host->req_timeout, DAT_TIMEOUT); in msdc_start_data()
1096 msdc_dma_setup(host, &host->dma, data); in msdc_start_data()
1097 sdr_set_bits(host->base + MSDC_INTEN, data_ints_mask); in msdc_start_data()
1098 sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_START, 1); in msdc_start_data()
1099 dev_dbg(host->dev, "DMA start\n"); in msdc_start_data()
1100 dev_dbg(host->dev, "%s: cmd=%d DMA data: %d blocks; read=%d\n", in msdc_start_data()
1104 static int msdc_auto_cmd_done(struct msdc_host *host, int events, in msdc_auto_cmd_done() argument
1109 rsp[0] = readl(host->base + SDC_ACMD_RESP); in msdc_auto_cmd_done()
1114 msdc_reset_hw(host); in msdc_auto_cmd_done()
1117 host->error |= REQ_STOP_EIO; in msdc_auto_cmd_done()
1120 host->error |= REQ_STOP_TMO; in msdc_auto_cmd_done()
1122 dev_err(host->dev, in msdc_auto_cmd_done()
1132 * Host controller may lost interrupt in some special case.
1136 static void msdc_recheck_sdio_irq(struct msdc_host *host) in msdc_recheck_sdio_irq() argument
1138 struct mmc_host *mmc = mmc_from_priv(host); in msdc_recheck_sdio_irq()
1142 reg_inten = readl(host->base + MSDC_INTEN); in msdc_recheck_sdio_irq()
1144 reg_int = readl(host->base + MSDC_INT); in msdc_recheck_sdio_irq()
1145 reg_ps = readl(host->base + MSDC_PS); in msdc_recheck_sdio_irq()
1148 __msdc_enable_sdio_irq(host, 0); in msdc_recheck_sdio_irq()
1155 static void msdc_track_cmd_data(struct msdc_host *host, struct mmc_command *cmd) in msdc_track_cmd_data() argument
1157 if (host->error && in msdc_track_cmd_data()
1158 ((!mmc_op_tuning(cmd->opcode) && !host->hs400_tuning) || in msdc_track_cmd_data()
1160 dev_warn(host->dev, "%s: cmd=%d arg=%08X; host->error=0x%08X\n", in msdc_track_cmd_data()
1161 __func__, cmd->opcode, cmd->arg, host->error); in msdc_track_cmd_data()
1164 static void msdc_request_done(struct msdc_host *host, struct mmc_request *mrq) in msdc_request_done() argument
1172 cancel_delayed_work(&host->req_timeout); in msdc_request_done()
1174 spin_lock_irqsave(&host->lock, flags); in msdc_request_done()
1175 host->mrq = NULL; in msdc_request_done()
1176 spin_unlock_irqrestore(&host->lock, flags); in msdc_request_done()
1178 msdc_track_cmd_data(host, mrq->cmd); in msdc_request_done()
1180 msdc_unprepare_data(host, mrq->data); in msdc_request_done()
1181 if (host->error) in msdc_request_done()
1182 msdc_reset_hw(host); in msdc_request_done()
1183 mmc_request_done(mmc_from_priv(host), mrq); in msdc_request_done()
1184 if (host->dev_comp->recheck_sdio_irq) in msdc_request_done()
1185 msdc_recheck_sdio_irq(host); in msdc_request_done()
1189 static bool msdc_cmd_done(struct msdc_host *host, int events, in msdc_cmd_done() argument
1200 msdc_auto_cmd_done(host, events, mrq->sbc); in msdc_cmd_done()
1209 spin_lock_irqsave(&host->lock, flags); in msdc_cmd_done()
1210 done = !host->cmd; in msdc_cmd_done()
1211 host->cmd = NULL; in msdc_cmd_done()
1212 spin_unlock_irqrestore(&host->lock, flags); in msdc_cmd_done()
1218 sdr_clr_bits(host->base + MSDC_INTEN, cmd_ints_mask); in msdc_cmd_done()
1222 rsp[0] = readl(host->base + SDC_RESP3); in msdc_cmd_done()
1223 rsp[1] = readl(host->base + SDC_RESP2); in msdc_cmd_done()
1224 rsp[2] = readl(host->base + SDC_RESP1); in msdc_cmd_done()
1225 rsp[3] = readl(host->base + SDC_RESP0); in msdc_cmd_done()
1227 rsp[0] = readl(host->base + SDC_RESP0); in msdc_cmd_done()
1232 if ((events & MSDC_INT_CMDTMO && !host->hs400_tuning) || in msdc_cmd_done()
1233 (!mmc_op_tuning(cmd->opcode) && !host->hs400_tuning)) in msdc_cmd_done()
1239 msdc_reset_hw(host); in msdc_cmd_done()
1242 host->error |= REQ_CMD_EIO; in msdc_cmd_done()
1245 host->error |= REQ_CMD_TMO; in msdc_cmd_done()
1249 dev_dbg(host->dev, in msdc_cmd_done()
1254 msdc_cmd_next(host, mrq, cmd); in msdc_cmd_done()
1259 * is correct before issue a request. but host design do below
1262 static inline bool msdc_cmd_is_ready(struct msdc_host *host, in msdc_cmd_is_ready() argument
1269 ret = readl_poll_timeout_atomic(host->base + SDC_STS, val, in msdc_cmd_is_ready()
1272 dev_err(host->dev, "CMD bus busy detected\n"); in msdc_cmd_is_ready()
1273 host->error |= REQ_CMD_BUSY; in msdc_cmd_is_ready()
1274 msdc_cmd_done(host, MSDC_INT_CMDTMO, mrq, cmd); in msdc_cmd_is_ready()
1280 ret = readl_poll_timeout_atomic(host->base + SDC_STS, val, in msdc_cmd_is_ready()
1283 dev_err(host->dev, "Controller busy detected\n"); in msdc_cmd_is_ready()
1284 host->error |= REQ_CMD_BUSY; in msdc_cmd_is_ready()
1285 msdc_cmd_done(host, MSDC_INT_CMDTMO, mrq, cmd); in msdc_cmd_is_ready()
1292 static void msdc_start_command(struct msdc_host *host, in msdc_start_command() argument
1298 WARN_ON(host->cmd); in msdc_start_command()
1299 host->cmd = cmd; in msdc_start_command()
1301 mod_delayed_work(system_wq, &host->req_timeout, DAT_TIMEOUT); in msdc_start_command()
1302 if (!msdc_cmd_is_ready(host, mrq, cmd)) in msdc_start_command()
1305 if ((readl(host->base + MSDC_FIFOCS) & MSDC_FIFOCS_TXCNT) >> 16 || in msdc_start_command()
1306 readl(host->base + MSDC_FIFOCS) & MSDC_FIFOCS_RXCNT) { in msdc_start_command()
1307 dev_err(host->dev, "TX/RX FIFO non-empty before start of IO. Reset\n"); in msdc_start_command()
1308 msdc_reset_hw(host); in msdc_start_command()
1312 rawcmd = msdc_cmd_prepare_raw_cmd(host, mrq, cmd); in msdc_start_command()
1314 spin_lock_irqsave(&host->lock, flags); in msdc_start_command()
1315 sdr_set_bits(host->base + MSDC_INTEN, cmd_ints_mask); in msdc_start_command()
1316 spin_unlock_irqrestore(&host->lock, flags); in msdc_start_command()
1318 writel(cmd->arg, host->base + SDC_ARG); in msdc_start_command()
1319 writel(rawcmd, host->base + SDC_CMD); in msdc_start_command()
1322 static void msdc_cmd_next(struct msdc_host *host, in msdc_cmd_next() argument
1325 if ((cmd->error && !host->hs400_tuning && in msdc_cmd_next()
1329 msdc_request_done(host, mrq); in msdc_cmd_next()
1331 msdc_start_command(host, mrq, mrq->cmd); in msdc_cmd_next()
1333 msdc_request_done(host, mrq); in msdc_cmd_next()
1335 msdc_start_data(host, cmd, cmd->data); in msdc_cmd_next()
1340 struct msdc_host *host = mmc_priv(mmc); in msdc_ops_request() local
1342 host->error = 0; in msdc_ops_request()
1343 WARN_ON(host->mrq); in msdc_ops_request()
1344 host->mrq = mrq; in msdc_ops_request()
1347 msdc_prepare_data(host, mrq->data); in msdc_ops_request()
1355 msdc_start_command(host, mrq, mrq->sbc); in msdc_ops_request()
1357 msdc_start_command(host, mrq, mrq->cmd); in msdc_ops_request()
1362 struct msdc_host *host = mmc_priv(mmc); in msdc_pre_req() local
1368 msdc_prepare_data(host, data); in msdc_pre_req()
1375 struct msdc_host *host = mmc_priv(mmc); in msdc_post_req() local
1383 msdc_unprepare_data(host, data); in msdc_post_req()
1387 static void msdc_data_xfer_next(struct msdc_host *host, struct mmc_request *mrq) in msdc_data_xfer_next() argument
1391 msdc_start_command(host, mrq, mrq->stop); in msdc_data_xfer_next()
1393 msdc_request_done(host, mrq); in msdc_data_xfer_next()
1396 static void msdc_data_xfer_done(struct msdc_host *host, u32 events, in msdc_data_xfer_done() argument
1409 spin_lock_irqsave(&host->lock, flags); in msdc_data_xfer_done()
1410 done = !host->data; in msdc_data_xfer_done()
1412 host->data = NULL; in msdc_data_xfer_done()
1413 spin_unlock_irqrestore(&host->lock, flags); in msdc_data_xfer_done()
1420 dev_dbg(host->dev, "DMA status: 0x%8X\n", in msdc_data_xfer_done()
1421 readl(host->base + MSDC_DMA_CFG)); in msdc_data_xfer_done()
1422 sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_STOP, in msdc_data_xfer_done()
1425 ret = readl_poll_timeout_atomic(host->base + MSDC_DMA_CTRL, val, in msdc_data_xfer_done()
1428 dev_dbg(host->dev, "DMA stop timed out\n"); in msdc_data_xfer_done()
1430 ret = readl_poll_timeout_atomic(host->base + MSDC_DMA_CFG, val, in msdc_data_xfer_done()
1433 dev_dbg(host->dev, "DMA inactive timed out\n"); in msdc_data_xfer_done()
1435 sdr_clr_bits(host->base + MSDC_INTEN, data_ints_mask); in msdc_data_xfer_done()
1436 dev_dbg(host->dev, "DMA stop\n"); in msdc_data_xfer_done()
1441 dev_dbg(host->dev, "interrupt events: %x\n", events); in msdc_data_xfer_done()
1442 msdc_reset_hw(host); in msdc_data_xfer_done()
1443 host->error |= REQ_DAT_ERR; in msdc_data_xfer_done()
1451 dev_dbg(host->dev, "%s: cmd=%d; blocks=%d", in msdc_data_xfer_done()
1453 dev_dbg(host->dev, "data_error=%d xfer_size=%d\n", in msdc_data_xfer_done()
1457 msdc_data_xfer_next(host, mrq); in msdc_data_xfer_done()
1461 static void msdc_set_buswidth(struct msdc_host *host, u32 width) in msdc_set_buswidth() argument
1463 u32 val = readl(host->base + SDC_CFG); in msdc_set_buswidth()
1480 writel(val, host->base + SDC_CFG); in msdc_set_buswidth()
1481 dev_dbg(host->dev, "Bus Width = %d", width); in msdc_set_buswidth()
1486 struct msdc_host *host = mmc_priv(mmc); in msdc_ops_switch_volt() local
1492 dev_err(host->dev, "Unsupported signal voltage!\n"); in msdc_ops_switch_volt()
1498 dev_dbg(host->dev, "Regulator set error %d (%d)\n", in msdc_ops_switch_volt()
1505 pinctrl_select_state(host->pinctrl, host->pins_uhs); in msdc_ops_switch_volt()
1507 pinctrl_select_state(host->pinctrl, host->pins_default); in msdc_ops_switch_volt()
1514 struct msdc_host *host = mmc_priv(mmc); in msdc_card_busy() local
1515 u32 status = readl(host->base + MSDC_PS); in msdc_card_busy()
1523 struct msdc_host *host = container_of(work, struct msdc_host, in msdc_request_timeout() local
1527 dev_err(host->dev, "%s: aborting cmd/data/mrq\n", __func__); in msdc_request_timeout()
1528 if (host->mrq) { in msdc_request_timeout()
1529 dev_err(host->dev, "%s: aborting mrq=%p cmd=%d\n", __func__, in msdc_request_timeout()
1530 host->mrq, host->mrq->cmd->opcode); in msdc_request_timeout()
1531 if (host->cmd) { in msdc_request_timeout()
1532 dev_err(host->dev, "%s: aborting cmd=%d\n", in msdc_request_timeout()
1533 __func__, host->cmd->opcode); in msdc_request_timeout()
1534 msdc_cmd_done(host, MSDC_INT_CMDTMO, host->mrq, in msdc_request_timeout()
1535 host->cmd); in msdc_request_timeout()
1536 } else if (host->data) { in msdc_request_timeout()
1537 dev_err(host->dev, "%s: abort data: cmd%d; %d blocks\n", in msdc_request_timeout()
1538 __func__, host->mrq->cmd->opcode, in msdc_request_timeout()
1539 host->data->blocks); in msdc_request_timeout()
1540 msdc_data_xfer_done(host, MSDC_INT_DATTMO, host->mrq, in msdc_request_timeout()
1541 host->data); in msdc_request_timeout()
1546 static void __msdc_enable_sdio_irq(struct msdc_host *host, int enb) in __msdc_enable_sdio_irq() argument
1549 sdr_set_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ); in __msdc_enable_sdio_irq()
1550 sdr_set_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); in __msdc_enable_sdio_irq()
1551 if (host->dev_comp->recheck_sdio_irq) in __msdc_enable_sdio_irq()
1552 msdc_recheck_sdio_irq(host); in __msdc_enable_sdio_irq()
1554 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ); in __msdc_enable_sdio_irq()
1555 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); in __msdc_enable_sdio_irq()
1561 struct msdc_host *host = mmc_priv(mmc); in msdc_enable_sdio_irq() local
1565 spin_lock_irqsave(&host->lock, flags); in msdc_enable_sdio_irq()
1566 __msdc_enable_sdio_irq(host, enb); in msdc_enable_sdio_irq()
1567 spin_unlock_irqrestore(&host->lock, flags); in msdc_enable_sdio_irq()
1569 if (mmc_card_enable_async_irq(mmc->card) && host->pins_eint) { in msdc_enable_sdio_irq()
1577 pinctrl_select_state(host->pinctrl, host->pins_eint); in msdc_enable_sdio_irq()
1578 ret = dev_pm_set_dedicated_wake_irq_reverse(host->dev, host->eint_irq); in msdc_enable_sdio_irq()
1581 dev_err(host->dev, "Failed to register SDIO wakeup irq!\n"); in msdc_enable_sdio_irq()
1582 host->pins_eint = NULL; in msdc_enable_sdio_irq()
1583 pm_runtime_get_noresume(host->dev); in msdc_enable_sdio_irq()
1585 dev_dbg(host->dev, "SDIO eint irq: %d!\n", host->eint_irq); in msdc_enable_sdio_irq()
1588 pinctrl_select_state(host->pinctrl, host->pins_uhs); in msdc_enable_sdio_irq()
1590 dev_pm_clear_wake_irq(host->dev); in msdc_enable_sdio_irq()
1594 /* Ensure host->pins_eint is NULL */ in msdc_enable_sdio_irq()
1595 host->pins_eint = NULL; in msdc_enable_sdio_irq()
1596 pm_runtime_get_noresume(host->dev); in msdc_enable_sdio_irq()
1598 pm_runtime_put_noidle(host->dev); in msdc_enable_sdio_irq()
1603 static irqreturn_t msdc_cmdq_irq(struct msdc_host *host, u32 intsts) in msdc_cmdq_irq() argument
1605 struct mmc_host *mmc = mmc_from_priv(host); in msdc_cmdq_irq()
1610 dev_err(host->dev, "%s: CMD CRC ERR", __func__); in msdc_cmdq_irq()
1613 dev_err(host->dev, "%s: CMD TIMEOUT ERR", __func__); in msdc_cmdq_irq()
1618 dev_err(host->dev, "%s: DATA CRC ERR", __func__); in msdc_cmdq_irq()
1621 dev_err(host->dev, "%s: DATA TIMEOUT ERR", __func__); in msdc_cmdq_irq()
1625 dev_err(host->dev, "cmd_err = %d, dat_err = %d, intsts = 0x%x", in msdc_cmdq_irq()
1634 struct msdc_host *host = (struct msdc_host *) dev_id; in msdc_irq() local
1635 struct mmc_host *mmc = mmc_from_priv(host); in msdc_irq()
1643 spin_lock(&host->lock); in msdc_irq()
1644 events = readl(host->base + MSDC_INT); in msdc_irq()
1645 event_mask = readl(host->base + MSDC_INTEN); in msdc_irq()
1647 __msdc_enable_sdio_irq(host, 0); in msdc_irq()
1649 writel(events & event_mask, host->base + MSDC_INT); in msdc_irq()
1651 mrq = host->mrq; in msdc_irq()
1652 cmd = host->cmd; in msdc_irq()
1653 data = host->data; in msdc_irq()
1654 spin_unlock(&host->lock); in msdc_irq()
1660 if (host->internal_cd) in msdc_irq()
1670 msdc_cmdq_irq(host, events); in msdc_irq()
1672 writel(events, host->base + MSDC_INT); in msdc_irq()
1677 dev_err(host->dev, in msdc_irq()
1684 dev_dbg(host->dev, "%s: events=%08X\n", __func__, events); in msdc_irq()
1687 msdc_cmd_done(host, events, mrq, cmd); in msdc_irq()
1689 msdc_data_xfer_done(host, events, mrq, data); in msdc_irq()
1695 static void msdc_init_hw(struct msdc_host *host) in msdc_init_hw() argument
1698 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_init_hw()
1699 struct mmc_host *mmc = mmc_from_priv(host); in msdc_init_hw()
1701 if (host->reset) { in msdc_init_hw()
1702 reset_control_assert(host->reset); in msdc_init_hw()
1704 reset_control_deassert(host->reset); in msdc_init_hw()
1708 sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_MODE | MSDC_CFG_CKPDN); in msdc_init_hw()
1711 msdc_reset_hw(host); in msdc_init_hw()
1714 writel(0, host->base + MSDC_INTEN); in msdc_init_hw()
1715 val = readl(host->base + MSDC_INT); in msdc_init_hw()
1716 writel(val, host->base + MSDC_INT); in msdc_init_hw()
1719 if (host->internal_cd) { in msdc_init_hw()
1720 sdr_set_field(host->base + MSDC_PS, MSDC_PS_CDDEBOUNCE, in msdc_init_hw()
1722 sdr_set_bits(host->base + MSDC_PS, MSDC_PS_CDEN); in msdc_init_hw()
1723 sdr_set_bits(host->base + MSDC_INTEN, MSDC_INTEN_CDSC); in msdc_init_hw()
1724 sdr_set_bits(host->base + SDC_CFG, SDC_CFG_INSWKUP); in msdc_init_hw()
1726 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_INSWKUP); in msdc_init_hw()
1727 sdr_clr_bits(host->base + MSDC_PS, MSDC_PS_CDEN); in msdc_init_hw()
1728 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_CDSC); in msdc_init_hw()
1731 if (host->top_base) { in msdc_init_hw()
1732 writel(0, host->top_base + EMMC_TOP_CONTROL); in msdc_init_hw()
1733 writel(0, host->top_base + EMMC_TOP_CMD); in msdc_init_hw()
1735 writel(0, host->base + tune_reg); in msdc_init_hw()
1737 writel(0, host->base + MSDC_IOCON); in msdc_init_hw()
1738 sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0); in msdc_init_hw()
1739 writel(0x403c0046, host->base + MSDC_PATCH_BIT); in msdc_init_hw()
1740 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1); in msdc_init_hw()
1741 writel(0xffff4089, host->base + MSDC_PATCH_BIT1); in msdc_init_hw()
1742 sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL); in msdc_init_hw()
1744 if (host->dev_comp->stop_clk_fix) { in msdc_init_hw()
1745 sdr_set_field(host->base + MSDC_PATCH_BIT1, in msdc_init_hw()
1747 sdr_clr_bits(host->base + SDC_FIFO_CFG, in msdc_init_hw()
1749 sdr_clr_bits(host->base + SDC_FIFO_CFG, in msdc_init_hw()
1753 if (host->dev_comp->busy_check) in msdc_init_hw()
1754 sdr_clr_bits(host->base + MSDC_PATCH_BIT1, BIT(7)); in msdc_init_hw()
1756 if (host->dev_comp->async_fifo) { in msdc_init_hw()
1757 sdr_set_field(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1759 if (host->dev_comp->enhance_rx) { in msdc_init_hw()
1760 if (host->top_base) in msdc_init_hw()
1761 sdr_set_bits(host->top_base + EMMC_TOP_CONTROL, in msdc_init_hw()
1764 sdr_set_bits(host->base + SDC_ADV_CFG0, in msdc_init_hw()
1767 sdr_set_field(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1769 sdr_set_field(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1773 sdr_clr_bits(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1775 sdr_set_bits(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1779 if (host->dev_comp->support_64g) in msdc_init_hw()
1780 sdr_set_bits(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1782 if (host->dev_comp->data_tune) { in msdc_init_hw()
1783 if (host->top_base) { in msdc_init_hw()
1784 sdr_set_bits(host->top_base + EMMC_TOP_CONTROL, in msdc_init_hw()
1786 sdr_clr_bits(host->top_base + EMMC_TOP_CONTROL, in msdc_init_hw()
1788 sdr_set_bits(host->top_base + EMMC_TOP_CMD, in msdc_init_hw()
1790 if (host->tuning_step > PAD_DELAY_HALF) { in msdc_init_hw()
1791 sdr_set_bits(host->top_base + EMMC_TOP_CONTROL, in msdc_init_hw()
1793 sdr_set_bits(host->top_base + EMMC_TOP_CMD, in msdc_init_hw()
1797 sdr_set_bits(host->base + tune_reg, in msdc_init_hw()
1800 if (host->tuning_step > PAD_DELAY_HALF) in msdc_init_hw()
1801 sdr_set_bits(host->base + tune_reg + TUNING_REG2_FIXED_OFFEST, in msdc_init_hw()
1807 if (host->top_base) in msdc_init_hw()
1808 sdr_set_bits(host->top_base + EMMC_TOP_CONTROL, in msdc_init_hw()
1811 sdr_set_bits(host->base + tune_reg, in msdc_init_hw()
1816 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIO); in msdc_init_hw()
1817 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ); in msdc_init_hw()
1818 sdr_clr_bits(host->base + SDC_ADV_CFG0, SDC_DAT1_IRQ_TRIGGER); in msdc_init_hw()
1821 sdr_set_bits(host->base + SDC_CFG, SDC_CFG_SDIO); in msdc_init_hw()
1824 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE); in msdc_init_hw()
1825 sdr_set_bits(host->base + SDC_ADV_CFG0, SDC_DAT1_IRQ_TRIGGER); in msdc_init_hw()
1829 sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3); in msdc_init_hw()
1831 host->def_tune_para.iocon = readl(host->base + MSDC_IOCON); in msdc_init_hw()
1832 host->saved_tune_para.iocon = readl(host->base + MSDC_IOCON); in msdc_init_hw()
1833 if (host->top_base) { in msdc_init_hw()
1834 host->def_tune_para.emmc_top_control = in msdc_init_hw()
1835 readl(host->top_base + EMMC_TOP_CONTROL); in msdc_init_hw()
1836 host->def_tune_para.emmc_top_cmd = in msdc_init_hw()
1837 readl(host->top_base + EMMC_TOP_CMD); in msdc_init_hw()
1838 host->saved_tune_para.emmc_top_control = in msdc_init_hw()
1839 readl(host->top_base + EMMC_TOP_CONTROL); in msdc_init_hw()
1840 host->saved_tune_para.emmc_top_cmd = in msdc_init_hw()
1841 readl(host->top_base + EMMC_TOP_CMD); in msdc_init_hw()
1843 host->def_tune_para.pad_tune = readl(host->base + tune_reg); in msdc_init_hw()
1844 host->saved_tune_para.pad_tune = readl(host->base + tune_reg); in msdc_init_hw()
1846 dev_dbg(host->dev, "init hardware done!"); in msdc_init_hw()
1849 static void msdc_deinit_hw(struct msdc_host *host) in msdc_deinit_hw() argument
1853 if (host->internal_cd) { in msdc_deinit_hw()
1855 sdr_clr_bits(host->base + MSDC_PS, MSDC_PS_CDEN); in msdc_deinit_hw()
1856 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_INSWKUP); in msdc_deinit_hw()
1860 writel(0, host->base + MSDC_INTEN); in msdc_deinit_hw()
1862 val = readl(host->base + MSDC_INT); in msdc_deinit_hw()
1863 writel(val, host->base + MSDC_INT); in msdc_deinit_hw()
1867 static void msdc_init_gpd_bd(struct msdc_host *host, struct msdc_dma *dma) in msdc_init_gpd_bd() argument
1882 if (host->dev_comp->support_64g) in msdc_init_gpd_bd()
1887 if (host->dev_comp->support_64g) in msdc_init_gpd_bd()
1894 if (host->dev_comp->support_64g) in msdc_init_gpd_bd()
1901 struct msdc_host *host = mmc_priv(mmc); in msdc_ops_set_ios() local
1904 msdc_set_buswidth(host, ios->bus_width); in msdc_ops_set_ios()
1910 msdc_init_hw(host); in msdc_ops_set_ios()
1914 dev_err(host->dev, "Failed to set vmmc power!\n"); in msdc_ops_set_ios()
1920 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in msdc_ops_set_ios()
1923 dev_err(host->dev, "Failed to set vqmmc power!\n"); in msdc_ops_set_ios()
1925 host->vqmmc_enabled = true; in msdc_ops_set_ios()
1932 if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { in msdc_ops_set_ios()
1934 host->vqmmc_enabled = false; in msdc_ops_set_ios()
1941 if (host->mclk != ios->clock || host->timing != ios->timing) in msdc_ops_set_ios()
1942 msdc_set_mclk(host, ios->timing, ios->clock); in msdc_ops_set_ios()
1962 static struct msdc_delay_phase get_best_delay(struct msdc_host *host, u64 delay) in get_best_delay() argument
1970 dev_err(host->dev, "phase error: [map:%016llx]\n", delay); in get_best_delay()
1991 dev_dbg(host->dev, "phase: [map:%016llx] [maxlen:%d] [final:%d]\n", in get_best_delay()
2000 static inline void msdc_set_cmd_delay(struct msdc_host *host, u32 value) in msdc_set_cmd_delay() argument
2002 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_set_cmd_delay()
2004 if (host->top_base) { in msdc_set_cmd_delay()
2006 sdr_set_field(host->top_base + EMMC_TOP_CMD, PAD_CMD_RXDLY, value); in msdc_set_cmd_delay()
2007 sdr_set_field(host->top_base + EMMC_TOP_CMD, PAD_CMD_RXDLY2, 0); in msdc_set_cmd_delay()
2009 sdr_set_field(host->top_base + EMMC_TOP_CMD, PAD_CMD_RXDLY, in msdc_set_cmd_delay()
2011 sdr_set_field(host->top_base + EMMC_TOP_CMD, PAD_CMD_RXDLY2, in msdc_set_cmd_delay()
2016 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRDLY, value); in msdc_set_cmd_delay()
2017 sdr_set_field(host->base + tune_reg + TUNING_REG2_FIXED_OFFEST, in msdc_set_cmd_delay()
2020 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRDLY, in msdc_set_cmd_delay()
2022 sdr_set_field(host->base + tune_reg + TUNING_REG2_FIXED_OFFEST, in msdc_set_cmd_delay()
2028 static inline void msdc_set_data_delay(struct msdc_host *host, u32 value) in msdc_set_data_delay() argument
2030 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_set_data_delay()
2032 if (host->top_base) { in msdc_set_data_delay()
2034 sdr_set_field(host->top_base + EMMC_TOP_CONTROL, in msdc_set_data_delay()
2036 sdr_set_field(host->top_base + EMMC_TOP_CONTROL, in msdc_set_data_delay()
2039 sdr_set_field(host->top_base + EMMC_TOP_CONTROL, in msdc_set_data_delay()
2041 sdr_set_field(host->top_base + EMMC_TOP_CONTROL, in msdc_set_data_delay()
2046 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_DATRRDLY, value); in msdc_set_data_delay()
2047 sdr_set_field(host->base + tune_reg + TUNING_REG2_FIXED_OFFEST, in msdc_set_data_delay()
2050 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_DATRRDLY, in msdc_set_data_delay()
2052 sdr_set_field(host->base + tune_reg + TUNING_REG2_FIXED_OFFEST, in msdc_set_data_delay()
2060 struct msdc_host *host = mmc_priv(mmc); in msdc_tune_response() local
2066 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_tune_response()
2072 sdr_set_field(host->base + tune_reg, in msdc_tune_response()
2074 host->hs200_cmd_int_delay); in msdc_tune_response()
2076 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_response()
2077 for (i = 0; i < host->tuning_step; i++) { in msdc_tune_response()
2078 msdc_set_cmd_delay(host, i); in msdc_tune_response()
2094 final_rise_delay = get_best_delay(host, rise_delay); in msdc_tune_response()
2100 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_response()
2101 for (i = 0; i < host->tuning_step; i++) { in msdc_tune_response()
2102 msdc_set_cmd_delay(host, i); in msdc_tune_response()
2118 final_fall_delay = get_best_delay(host, fall_delay); in msdc_tune_response()
2125 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_response()
2128 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_response()
2131 msdc_set_cmd_delay(host, final_delay); in msdc_tune_response()
2133 if (host->dev_comp->async_fifo || host->hs200_cmd_int_delay) in msdc_tune_response()
2136 for (i = 0; i < host->tuning_step; i++) { in msdc_tune_response()
2137 sdr_set_field(host->base + tune_reg, in msdc_tune_response()
2143 dev_dbg(host->dev, "Final internal delay: 0x%x\n", internal_delay); in msdc_tune_response()
2144 internal_delay_phase = get_best_delay(host, internal_delay); in msdc_tune_response()
2145 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRRDLY, in msdc_tune_response()
2148 dev_dbg(host->dev, "Final cmd pad delay: %x\n", final_delay); in msdc_tune_response()
2154 struct msdc_host *host = mmc_priv(mmc); in hs400_tune_response() local
2162 sdr_set_bits(host->base + PAD_CMD_TUNE, BIT(0)); in hs400_tune_response()
2163 sdr_set_field(host->base + MSDC_PATCH_BIT1, MSDC_PATCH_BIT1_CMDTA, 2); in hs400_tune_response()
2167 sdr_set_field(host->base + MSDC_PAD_TUNE, in hs400_tune_response()
2169 host->hs200_cmd_int_delay); in hs400_tune_response()
2171 if (host->hs400_cmd_resp_sel_rising) in hs400_tune_response()
2172 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in hs400_tune_response()
2174 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in hs400_tune_response()
2177 sdr_set_field(host->base + PAD_CMD_TUNE, in hs400_tune_response()
2194 final_cmd_delay = get_best_delay(host, cmd_delay); in hs400_tune_response()
2195 sdr_set_field(host->base + PAD_CMD_TUNE, PAD_CMD_TUNE_RX_DLY3, in hs400_tune_response()
2199 dev_dbg(host->dev, "Final cmd pad delay: %x\n", final_delay); in hs400_tune_response()
2205 struct msdc_host *host = mmc_priv(mmc); in msdc_tune_data() local
2211 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL, in msdc_tune_data()
2212 host->latch_ck); in msdc_tune_data()
2213 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); in msdc_tune_data()
2214 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); in msdc_tune_data()
2215 for (i = 0; i < host->tuning_step; i++) { in msdc_tune_data()
2216 msdc_set_data_delay(host, i); in msdc_tune_data()
2221 final_rise_delay = get_best_delay(host, rise_delay); in msdc_tune_data()
2227 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); in msdc_tune_data()
2228 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); in msdc_tune_data()
2229 for (i = 0; i < host->tuning_step; i++) { in msdc_tune_data()
2230 msdc_set_data_delay(host, i); in msdc_tune_data()
2235 final_fall_delay = get_best_delay(host, fall_delay); in msdc_tune_data()
2240 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); in msdc_tune_data()
2241 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); in msdc_tune_data()
2244 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL); in msdc_tune_data()
2245 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL); in msdc_tune_data()
2248 msdc_set_data_delay(host, final_delay); in msdc_tune_data()
2250 dev_dbg(host->dev, "Final data pad delay: %x\n", final_delay); in msdc_tune_data()
2260 struct msdc_host *host = mmc_priv(mmc); in msdc_tune_together() local
2266 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL, in msdc_tune_together()
2267 host->latch_ck); in msdc_tune_together()
2269 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_together()
2270 sdr_clr_bits(host->base + MSDC_IOCON, in msdc_tune_together()
2272 for (i = 0; i < host->tuning_step; i++) { in msdc_tune_together()
2273 msdc_set_cmd_delay(host, i); in msdc_tune_together()
2274 msdc_set_data_delay(host, i); in msdc_tune_together()
2279 final_rise_delay = get_best_delay(host, rise_delay); in msdc_tune_together()
2285 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_together()
2286 sdr_set_bits(host->base + MSDC_IOCON, in msdc_tune_together()
2288 for (i = 0; i < host->tuning_step; i++) { in msdc_tune_together()
2289 msdc_set_cmd_delay(host, i); in msdc_tune_together()
2290 msdc_set_data_delay(host, i); in msdc_tune_together()
2295 final_fall_delay = get_best_delay(host, fall_delay); in msdc_tune_together()
2300 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_together()
2301 sdr_clr_bits(host->base + MSDC_IOCON, in msdc_tune_together()
2305 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL); in msdc_tune_together()
2306 sdr_set_bits(host->base + MSDC_IOCON, in msdc_tune_together()
2311 msdc_set_cmd_delay(host, final_delay); in msdc_tune_together()
2312 msdc_set_data_delay(host, final_delay); in msdc_tune_together()
2314 dev_dbg(host->dev, "Final pad delay: %x\n", final_delay); in msdc_tune_together()
2320 struct msdc_host *host = mmc_priv(mmc); in msdc_execute_tuning() local
2322 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_execute_tuning()
2324 if (host->dev_comp->data_tune && host->dev_comp->async_fifo) { in msdc_execute_tuning()
2326 if (host->hs400_mode) { in msdc_execute_tuning()
2327 sdr_clr_bits(host->base + MSDC_IOCON, in msdc_execute_tuning()
2329 msdc_set_data_delay(host, 0); in msdc_execute_tuning()
2333 if (host->hs400_mode && in msdc_execute_tuning()
2334 host->dev_comp->hs400_tune) in msdc_execute_tuning()
2339 dev_err(host->dev, "Tune response fail!\n"); in msdc_execute_tuning()
2342 if (host->hs400_mode == false) { in msdc_execute_tuning()
2345 dev_err(host->dev, "Tune data fail!\n"); in msdc_execute_tuning()
2349 host->saved_tune_para.iocon = readl(host->base + MSDC_IOCON); in msdc_execute_tuning()
2350 host->saved_tune_para.pad_tune = readl(host->base + tune_reg); in msdc_execute_tuning()
2351 host->saved_tune_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE); in msdc_execute_tuning()
2352 if (host->top_base) { in msdc_execute_tuning()
2353 host->saved_tune_para.emmc_top_control = readl(host->top_base + in msdc_execute_tuning()
2355 host->saved_tune_para.emmc_top_cmd = readl(host->top_base + in msdc_execute_tuning()
2363 struct msdc_host *host = mmc_priv(mmc); in msdc_prepare_hs400_tuning() local
2364 host->hs400_mode = true; in msdc_prepare_hs400_tuning()
2366 if (host->top_base) in msdc_prepare_hs400_tuning()
2367 writel(host->hs400_ds_delay, in msdc_prepare_hs400_tuning()
2368 host->top_base + EMMC50_PAD_DS_TUNE); in msdc_prepare_hs400_tuning()
2370 writel(host->hs400_ds_delay, host->base + PAD_DS_TUNE); in msdc_prepare_hs400_tuning()
2372 sdr_clr_bits(host->base + MSDC_PATCH_BIT2, MSDC_PATCH_BIT2_CFGCRCSTS); in msdc_prepare_hs400_tuning()
2374 sdr_set_field(host->base + EMMC50_CFG3, EMMC50_CFG3_OUTS_WR, 2); in msdc_prepare_hs400_tuning()
2381 struct msdc_host *host = mmc_priv(mmc); in msdc_execute_hs400_tuning() local
2387 if (host->top_base) { in msdc_execute_hs400_tuning()
2388 sdr_set_bits(host->top_base + EMMC50_PAD_DS_TUNE, in msdc_execute_hs400_tuning()
2390 if (host->hs400_ds_dly3) in msdc_execute_hs400_tuning()
2391 sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE, in msdc_execute_hs400_tuning()
2392 PAD_DS_DLY3, host->hs400_ds_dly3); in msdc_execute_hs400_tuning()
2394 sdr_set_bits(host->base + PAD_DS_TUNE, PAD_DS_TUNE_DLY_SEL); in msdc_execute_hs400_tuning()
2395 if (host->hs400_ds_dly3) in msdc_execute_hs400_tuning()
2396 sdr_set_field(host->base + PAD_DS_TUNE, in msdc_execute_hs400_tuning()
2397 PAD_DS_TUNE_DLY3, host->hs400_ds_dly3); in msdc_execute_hs400_tuning()
2400 host->hs400_tuning = true; in msdc_execute_hs400_tuning()
2402 if (host->top_base) in msdc_execute_hs400_tuning()
2403 sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE, in msdc_execute_hs400_tuning()
2406 sdr_set_field(host->base + PAD_DS_TUNE, in msdc_execute_hs400_tuning()
2414 host->hs400_tuning = false; in msdc_execute_hs400_tuning()
2416 dly1_delay = get_best_delay(host, result_dly1); in msdc_execute_hs400_tuning()
2418 dev_err(host->dev, "Failed to get DLY1 delay!\n"); in msdc_execute_hs400_tuning()
2421 if (host->top_base) in msdc_execute_hs400_tuning()
2422 sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE, in msdc_execute_hs400_tuning()
2425 sdr_set_field(host->base + PAD_DS_TUNE, in msdc_execute_hs400_tuning()
2428 if (host->top_base) in msdc_execute_hs400_tuning()
2429 val = readl(host->top_base + EMMC50_PAD_DS_TUNE); in msdc_execute_hs400_tuning()
2431 val = readl(host->base + PAD_DS_TUNE); in msdc_execute_hs400_tuning()
2433 dev_info(host->dev, "Final PAD_DS_TUNE: 0x%x\n", val); in msdc_execute_hs400_tuning()
2438 dev_err(host->dev, "Failed to tuning DS pin delay!\n"); in msdc_execute_hs400_tuning()
2444 struct msdc_host *host = mmc_priv(mmc); in msdc_hw_reset() local
2446 sdr_set_bits(host->base + EMMC_IOCON, 1); in msdc_hw_reset()
2448 sdr_clr_bits(host->base + EMMC_IOCON, 1); in msdc_hw_reset()
2454 struct msdc_host *host = mmc_priv(mmc); in msdc_ack_sdio_irq() local
2456 spin_lock_irqsave(&host->lock, flags); in msdc_ack_sdio_irq()
2457 __msdc_enable_sdio_irq(host, 1); in msdc_ack_sdio_irq()
2458 spin_unlock_irqrestore(&host->lock, flags); in msdc_ack_sdio_irq()
2463 struct msdc_host *host = mmc_priv(mmc); in msdc_get_cd() local
2469 if (!host->internal_cd) in msdc_get_cd()
2472 val = readl(host->base + MSDC_PS) & MSDC_PS_CDSTS; in msdc_get_cd()
2482 struct msdc_host *host = mmc_priv(mmc); in msdc_hs400_enhanced_strobe() local
2486 sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 1); in msdc_hs400_enhanced_strobe()
2487 sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 1); in msdc_hs400_enhanced_strobe()
2488 sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 1); in msdc_hs400_enhanced_strobe()
2490 sdr_clr_bits(host->base + CQHCI_SETTING, CQHCI_RD_CMD_WND_SEL); in msdc_hs400_enhanced_strobe()
2491 sdr_clr_bits(host->base + CQHCI_SETTING, CQHCI_WR_CMD_WND_SEL); in msdc_hs400_enhanced_strobe()
2492 sdr_clr_bits(host->base + EMMC51_CFG0, CMDQ_RDAT_CNT); in msdc_hs400_enhanced_strobe()
2494 sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 0); in msdc_hs400_enhanced_strobe()
2495 sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 0); in msdc_hs400_enhanced_strobe()
2496 sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 0); in msdc_hs400_enhanced_strobe()
2498 sdr_set_bits(host->base + CQHCI_SETTING, CQHCI_RD_CMD_WND_SEL); in msdc_hs400_enhanced_strobe()
2499 sdr_set_bits(host->base + CQHCI_SETTING, CQHCI_WR_CMD_WND_SEL); in msdc_hs400_enhanced_strobe()
2500 sdr_set_field(host->base + EMMC51_CFG0, CMDQ_RDAT_CNT, 0xb4); in msdc_hs400_enhanced_strobe()
2504 static void msdc_cqe_cit_cal(struct msdc_host *host, u64 timer_ns) in msdc_cqe_cit_cal() argument
2506 struct mmc_host *mmc = mmc_from_priv(host); in msdc_cqe_cit_cal()
2516 hclk_freq = (u64)clk_get_rate(host->h_clk); in msdc_cqe_cit_cal()
2534 host->cq_ssc1_time = 0x40; in msdc_cqe_cit_cal()
2540 host->cq_ssc1_time = value; in msdc_cqe_cit_cal()
2545 struct msdc_host *host = mmc_priv(mmc); in msdc_cqe_enable() local
2549 writel(MSDC_INT_CMDQ, host->base + MSDC_INTEN); in msdc_cqe_enable()
2551 sdr_set_bits(host->base + MSDC_PATCH_BIT1, MSDC_PB1_BUSY_CHECK_SEL); in msdc_cqe_enable()
2553 msdc_set_busy_timeout(host, 20 * 1000000000ULL, 0); in msdc_cqe_enable()
2555 msdc_set_timeout(host, 1000000000ULL, 0); in msdc_cqe_enable()
2558 cqhci_writel(cq_host, host->cq_ssc1_time, CQHCI_SSC1); in msdc_cqe_enable()
2563 struct msdc_host *host = mmc_priv(mmc); in msdc_cqe_disable() local
2567 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INT_CMDQ); in msdc_cqe_disable()
2569 sdr_clr_bits(host->base + MSDC_PATCH_BIT1, MSDC_PB1_BUSY_CHECK_SEL); in msdc_cqe_disable()
2571 val = readl(host->base + MSDC_INT); in msdc_cqe_disable()
2572 writel(val, host->base + MSDC_INT); in msdc_cqe_disable()
2575 sdr_set_field(host->base + MSDC_DMA_CTRL, in msdc_cqe_disable()
2577 if (WARN_ON(readl_poll_timeout(host->base + MSDC_DMA_CTRL, val, in msdc_cqe_disable()
2580 if (WARN_ON(readl_poll_timeout(host->base + MSDC_DMA_CFG, val, in msdc_cqe_disable()
2583 msdc_reset_hw(host); in msdc_cqe_disable()
2633 struct msdc_host *host) in msdc_of_property_parse() argument
2635 struct mmc_host *mmc = mmc_from_priv(host); in msdc_of_property_parse()
2638 &host->latch_ck); in msdc_of_property_parse()
2641 &host->hs400_ds_delay); in msdc_of_property_parse()
2644 &host->hs400_ds_dly3); in msdc_of_property_parse()
2647 &host->hs200_cmd_int_delay); in msdc_of_property_parse()
2650 &host->hs400_cmd_int_delay); in msdc_of_property_parse()
2654 host->hs400_cmd_resp_sel_rising = true; in msdc_of_property_parse()
2656 host->hs400_cmd_resp_sel_rising = false; in msdc_of_property_parse()
2659 &host->tuning_step)) { in msdc_of_property_parse()
2661 host->tuning_step = PAD_DELAY_FULL; in msdc_of_property_parse()
2663 host->tuning_step = PAD_DELAY_HALF; in msdc_of_property_parse()
2668 host->cqhci = true; in msdc_of_property_parse()
2670 host->cqhci = false; in msdc_of_property_parse()
2674 struct msdc_host *host) in msdc_of_clock_parse() argument
2678 host->src_clk = devm_clk_get(&pdev->dev, "source"); in msdc_of_clock_parse()
2679 if (IS_ERR(host->src_clk)) in msdc_of_clock_parse()
2680 return PTR_ERR(host->src_clk); in msdc_of_clock_parse()
2682 host->h_clk = devm_clk_get(&pdev->dev, "hclk"); in msdc_of_clock_parse()
2683 if (IS_ERR(host->h_clk)) in msdc_of_clock_parse()
2684 return PTR_ERR(host->h_clk); in msdc_of_clock_parse()
2686 host->bus_clk = devm_clk_get_optional(&pdev->dev, "bus_clk"); in msdc_of_clock_parse()
2687 if (IS_ERR(host->bus_clk)) in msdc_of_clock_parse()
2688 host->bus_clk = NULL; in msdc_of_clock_parse()
2691 host->src_clk_cg = devm_clk_get_optional(&pdev->dev, "source_cg"); in msdc_of_clock_parse()
2692 if (IS_ERR(host->src_clk_cg)) in msdc_of_clock_parse()
2693 return PTR_ERR(host->src_clk_cg); in msdc_of_clock_parse()
2702 if (!host->src_clk_cg) { in msdc_of_clock_parse()
2703 host->src_clk_cg = clk_get_parent(host->src_clk); in msdc_of_clock_parse()
2704 if (IS_ERR(host->src_clk_cg)) in msdc_of_clock_parse()
2705 return PTR_ERR(host->src_clk_cg); in msdc_of_clock_parse()
2709 host->sys_clk_cg = devm_clk_get_optional_enabled(&pdev->dev, "sys_cg"); in msdc_of_clock_parse()
2710 if (IS_ERR(host->sys_clk_cg)) in msdc_of_clock_parse()
2711 host->sys_clk_cg = NULL; in msdc_of_clock_parse()
2713 host->bulk_clks[0].id = "pclk_cg"; in msdc_of_clock_parse()
2714 host->bulk_clks[1].id = "axi_cg"; in msdc_of_clock_parse()
2715 host->bulk_clks[2].id = "ahb_cg"; in msdc_of_clock_parse()
2717 host->bulk_clks); in msdc_of_clock_parse()
2729 struct msdc_host *host; in msdc_drv_probe() local
2738 /* Allocate MMC host for this device */ in msdc_drv_probe()
2743 host = mmc_priv(mmc); in msdc_drv_probe()
2748 host->base = devm_platform_ioremap_resource(pdev, 0); in msdc_drv_probe()
2749 if (IS_ERR(host->base)) { in msdc_drv_probe()
2750 ret = PTR_ERR(host->base); in msdc_drv_probe()
2756 host->top_base = devm_ioremap_resource(&pdev->dev, res); in msdc_drv_probe()
2757 if (IS_ERR(host->top_base)) in msdc_drv_probe()
2758 host->top_base = NULL; in msdc_drv_probe()
2765 ret = msdc_of_clock_parse(pdev, host); in msdc_drv_probe()
2769 host->reset = devm_reset_control_get_optional_exclusive(&pdev->dev, in msdc_drv_probe()
2771 if (IS_ERR(host->reset)) { in msdc_drv_probe()
2772 ret = PTR_ERR(host->reset); in msdc_drv_probe()
2778 host->crypto_clk = devm_clk_get_optional(&pdev->dev, "crypto"); in msdc_drv_probe()
2779 if (IS_ERR(host->crypto_clk)) in msdc_drv_probe()
2780 host->crypto_clk = NULL; in msdc_drv_probe()
2785 host->irq = platform_get_irq(pdev, 0); in msdc_drv_probe()
2786 if (host->irq < 0) { in msdc_drv_probe()
2787 ret = host->irq; in msdc_drv_probe()
2791 host->pinctrl = devm_pinctrl_get(&pdev->dev); in msdc_drv_probe()
2792 if (IS_ERR(host->pinctrl)) { in msdc_drv_probe()
2793 ret = PTR_ERR(host->pinctrl); in msdc_drv_probe()
2798 host->pins_default = pinctrl_lookup_state(host->pinctrl, "default"); in msdc_drv_probe()
2799 if (IS_ERR(host->pins_default)) { in msdc_drv_probe()
2800 ret = PTR_ERR(host->pins_default); in msdc_drv_probe()
2805 host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs"); in msdc_drv_probe()
2806 if (IS_ERR(host->pins_uhs)) { in msdc_drv_probe()
2807 ret = PTR_ERR(host->pins_uhs); in msdc_drv_probe()
2814 host->eint_irq = platform_get_irq_byname_optional(pdev, "sdio_wakeup"); in msdc_drv_probe()
2815 if (host->eint_irq > 0) { in msdc_drv_probe()
2816 host->pins_eint = pinctrl_lookup_state(host->pinctrl, "state_eint"); in msdc_drv_probe()
2817 if (IS_ERR(host->pins_eint)) { in msdc_drv_probe()
2819 host->pins_eint = NULL; in msdc_drv_probe()
2826 msdc_of_property_parse(pdev, host); in msdc_drv_probe()
2828 host->dev = &pdev->dev; in msdc_drv_probe()
2829 host->dev_comp = of_device_get_match_data(&pdev->dev); in msdc_drv_probe()
2830 host->src_clk_freq = clk_get_rate(host->src_clk); in msdc_drv_probe()
2831 /* Set host parameters to mmc */ in msdc_drv_probe()
2833 if (host->dev_comp->clk_div_bits == 8) in msdc_drv_probe()
2834 mmc->f_min = DIV_ROUND_UP(host->src_clk_freq, 4 * 255); in msdc_drv_probe()
2836 mmc->f_min = DIV_ROUND_UP(host->src_clk_freq, 4 * 4095); in msdc_drv_probe()
2840 host->dev_comp->use_internal_cd) { in msdc_drv_probe()
2845 host->internal_cd = true; in msdc_drv_probe()
2852 if (host->cqhci) in msdc_drv_probe()
2856 if (host->dev_comp->support_64g) in msdc_drv_probe()
2863 if (host->dev_comp->support_64g) in msdc_drv_probe()
2864 host->dma_mask = DMA_BIT_MASK(36); in msdc_drv_probe()
2866 host->dma_mask = DMA_BIT_MASK(32); in msdc_drv_probe()
2867 mmc_dev(mmc)->dma_mask = &host->dma_mask; in msdc_drv_probe()
2869 host->timeout_clks = 3 * 1048576; in msdc_drv_probe()
2870 host->dma.gpd = dma_alloc_coherent(&pdev->dev, in msdc_drv_probe()
2872 &host->dma.gpd_addr, GFP_KERNEL); in msdc_drv_probe()
2873 host->dma.bd = dma_alloc_coherent(&pdev->dev, in msdc_drv_probe()
2875 &host->dma.bd_addr, GFP_KERNEL); in msdc_drv_probe()
2876 if (!host->dma.gpd || !host->dma.bd) { in msdc_drv_probe()
2880 msdc_init_gpd_bd(host, &host->dma); in msdc_drv_probe()
2881 INIT_DELAYED_WORK(&host->req_timeout, msdc_request_timeout); in msdc_drv_probe()
2882 spin_lock_init(&host->lock); in msdc_drv_probe()
2885 ret = msdc_ungate_clock(host); in msdc_drv_probe()
2890 msdc_init_hw(host); in msdc_drv_probe()
2893 host->cq_host = devm_kzalloc(mmc->parent, in msdc_drv_probe()
2894 sizeof(*host->cq_host), in msdc_drv_probe()
2896 if (!host->cq_host) { in msdc_drv_probe()
2900 host->cq_host->caps |= CQHCI_TASK_DESC_SZ_128; in msdc_drv_probe()
2901 host->cq_host->mmio = host->base + 0x800; in msdc_drv_probe()
2902 host->cq_host->ops = &msdc_cmdq_ops; in msdc_drv_probe()
2903 ret = cqhci_init(host->cq_host, mmc, true); in msdc_drv_probe()
2911 msdc_cqe_cit_cal(host, 2350); in msdc_drv_probe()
2914 ret = devm_request_irq(&pdev->dev, host->irq, msdc_irq, in msdc_drv_probe()
2915 IRQF_TRIGGER_NONE, pdev->name, host); in msdc_drv_probe()
2919 pm_runtime_set_active(host->dev); in msdc_drv_probe()
2920 pm_runtime_set_autosuspend_delay(host->dev, MTK_MMC_AUTOSUSPEND_DELAY); in msdc_drv_probe()
2921 pm_runtime_use_autosuspend(host->dev); in msdc_drv_probe()
2922 pm_runtime_enable(host->dev); in msdc_drv_probe()
2930 pm_runtime_disable(host->dev); in msdc_drv_probe()
2933 msdc_deinit_hw(host); in msdc_drv_probe()
2934 msdc_gate_clock(host); in msdc_drv_probe()
2936 if (host->dma.gpd) in msdc_drv_probe()
2939 host->dma.gpd, host->dma.gpd_addr); in msdc_drv_probe()
2940 if (host->dma.bd) in msdc_drv_probe()
2943 host->dma.bd, host->dma.bd_addr); in msdc_drv_probe()
2953 struct msdc_host *host; in msdc_drv_remove() local
2956 host = mmc_priv(mmc); in msdc_drv_remove()
2958 pm_runtime_get_sync(host->dev); in msdc_drv_remove()
2962 msdc_deinit_hw(host); in msdc_drv_remove()
2963 msdc_gate_clock(host); in msdc_drv_remove()
2965 pm_runtime_disable(host->dev); in msdc_drv_remove()
2966 pm_runtime_put_noidle(host->dev); in msdc_drv_remove()
2969 host->dma.gpd, host->dma.gpd_addr); in msdc_drv_remove()
2971 host->dma.bd, host->dma.bd_addr); in msdc_drv_remove()
2976 static void msdc_save_reg(struct msdc_host *host) in msdc_save_reg() argument
2978 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_save_reg()
2980 host->save_para.msdc_cfg = readl(host->base + MSDC_CFG); in msdc_save_reg()
2981 host->save_para.iocon = readl(host->base + MSDC_IOCON); in msdc_save_reg()
2982 host->save_para.sdc_cfg = readl(host->base + SDC_CFG); in msdc_save_reg()
2983 host->save_para.patch_bit0 = readl(host->base + MSDC_PATCH_BIT); in msdc_save_reg()
2984 host->save_para.patch_bit1 = readl(host->base + MSDC_PATCH_BIT1); in msdc_save_reg()
2985 host->save_para.patch_bit2 = readl(host->base + MSDC_PATCH_BIT2); in msdc_save_reg()
2986 host->save_para.pad_ds_tune = readl(host->base + PAD_DS_TUNE); in msdc_save_reg()
2987 host->save_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE); in msdc_save_reg()
2988 host->save_para.emmc50_cfg0 = readl(host->base + EMMC50_CFG0); in msdc_save_reg()
2989 host->save_para.emmc50_cfg3 = readl(host->base + EMMC50_CFG3); in msdc_save_reg()
2990 host->save_para.sdc_fifo_cfg = readl(host->base + SDC_FIFO_CFG); in msdc_save_reg()
2991 if (host->top_base) { in msdc_save_reg()
2992 host->save_para.emmc_top_control = in msdc_save_reg()
2993 readl(host->top_base + EMMC_TOP_CONTROL); in msdc_save_reg()
2994 host->save_para.emmc_top_cmd = in msdc_save_reg()
2995 readl(host->top_base + EMMC_TOP_CMD); in msdc_save_reg()
2996 host->save_para.emmc50_pad_ds_tune = in msdc_save_reg()
2997 readl(host->top_base + EMMC50_PAD_DS_TUNE); in msdc_save_reg()
2999 host->save_para.pad_tune = readl(host->base + tune_reg); in msdc_save_reg()
3003 static void msdc_restore_reg(struct msdc_host *host) in msdc_restore_reg() argument
3005 struct mmc_host *mmc = mmc_from_priv(host); in msdc_restore_reg()
3006 u32 tune_reg = host->dev_comp->pad_tune_reg; in msdc_restore_reg()
3008 writel(host->save_para.msdc_cfg, host->base + MSDC_CFG); in msdc_restore_reg()
3009 writel(host->save_para.iocon, host->base + MSDC_IOCON); in msdc_restore_reg()
3010 writel(host->save_para.sdc_cfg, host->base + SDC_CFG); in msdc_restore_reg()
3011 writel(host->save_para.patch_bit0, host->base + MSDC_PATCH_BIT); in msdc_restore_reg()
3012 writel(host->save_para.patch_bit1, host->base + MSDC_PATCH_BIT1); in msdc_restore_reg()
3013 writel(host->save_para.patch_bit2, host->base + MSDC_PATCH_BIT2); in msdc_restore_reg()
3014 writel(host->save_para.pad_ds_tune, host->base + PAD_DS_TUNE); in msdc_restore_reg()
3015 writel(host->save_para.pad_cmd_tune, host->base + PAD_CMD_TUNE); in msdc_restore_reg()
3016 writel(host->save_para.emmc50_cfg0, host->base + EMMC50_CFG0); in msdc_restore_reg()
3017 writel(host->save_para.emmc50_cfg3, host->base + EMMC50_CFG3); in msdc_restore_reg()
3018 writel(host->save_para.sdc_fifo_cfg, host->base + SDC_FIFO_CFG); in msdc_restore_reg()
3019 if (host->top_base) { in msdc_restore_reg()
3020 writel(host->save_para.emmc_top_control, in msdc_restore_reg()
3021 host->top_base + EMMC_TOP_CONTROL); in msdc_restore_reg()
3022 writel(host->save_para.emmc_top_cmd, in msdc_restore_reg()
3023 host->top_base + EMMC_TOP_CMD); in msdc_restore_reg()
3024 writel(host->save_para.emmc50_pad_ds_tune, in msdc_restore_reg()
3025 host->top_base + EMMC50_PAD_DS_TUNE); in msdc_restore_reg()
3027 writel(host->save_para.pad_tune, host->base + tune_reg); in msdc_restore_reg()
3031 __msdc_enable_sdio_irq(host, 1); in msdc_restore_reg()
3037 struct msdc_host *host = mmc_priv(mmc); in msdc_runtime_suspend() local
3039 msdc_save_reg(host); in msdc_runtime_suspend()
3042 if (host->pins_eint) { in msdc_runtime_suspend()
3043 disable_irq(host->irq); in msdc_runtime_suspend()
3044 pinctrl_select_state(host->pinctrl, host->pins_eint); in msdc_runtime_suspend()
3047 __msdc_enable_sdio_irq(host, 0); in msdc_runtime_suspend()
3049 msdc_gate_clock(host); in msdc_runtime_suspend()
3056 struct msdc_host *host = mmc_priv(mmc); in msdc_runtime_resume() local
3059 ret = msdc_ungate_clock(host); in msdc_runtime_resume()
3063 msdc_restore_reg(host); in msdc_runtime_resume()
3065 if (sdio_irq_claimed(mmc) && host->pins_eint) { in msdc_runtime_resume()
3066 pinctrl_select_state(host->pinctrl, host->pins_uhs); in msdc_runtime_resume()
3067 enable_irq(host->irq); in msdc_runtime_resume()
3075 struct msdc_host *host = mmc_priv(mmc); in msdc_suspend() local
3083 val = readl(host->base + MSDC_INT); in msdc_suspend()
3084 writel(val, host->base + MSDC_INT); in msdc_suspend()
3091 if (sdio_irq_claimed(mmc) && host->pins_eint) in msdc_suspend()
3100 struct msdc_host *host = mmc_priv(mmc); in msdc_resume() local
3102 if (sdio_irq_claimed(mmc) && host->pins_eint) in msdc_resume()