Lines Matching full:host
2 * MOXA ART MMC host driver.
25 #include <linux/mmc/host.h>
151 static inline void moxart_init_sg(struct moxart_host *host, in moxart_init_sg() argument
154 host->cur_sg = data->sg; in moxart_init_sg()
155 host->num_sg = data->sg_len; in moxart_init_sg()
156 host->data_remain = host->cur_sg->length; in moxart_init_sg()
158 if (host->data_remain > host->data_len) in moxart_init_sg()
159 host->data_remain = host->data_len; in moxart_init_sg()
162 static inline int moxart_next_sg(struct moxart_host *host) in moxart_next_sg() argument
165 struct mmc_data *data = host->mrq->cmd->data; in moxart_next_sg()
167 host->cur_sg++; in moxart_next_sg()
168 host->num_sg--; in moxart_next_sg()
170 if (host->num_sg > 0) { in moxart_next_sg()
171 host->data_remain = host->cur_sg->length; in moxart_next_sg()
172 remain = host->data_len - data->bytes_xfered; in moxart_next_sg()
173 if (remain > 0 && remain < host->data_remain) in moxart_next_sg()
174 host->data_remain = remain; in moxart_next_sg()
177 return host->num_sg; in moxart_next_sg()
180 static int moxart_wait_for_status(struct moxart_host *host, in moxart_wait_for_status() argument
187 *status = readl(host->base + REG_STATUS); in moxart_wait_for_status()
192 writel(*status & mask, host->base + REG_CLEAR); in moxart_wait_for_status()
198 dev_err(mmc_dev(host->mmc), "timed out waiting for status\n"); in moxart_wait_for_status()
204 static void moxart_send_command(struct moxart_host *host, in moxart_send_command() argument
210 RSP_CRC_FAIL | CMD_SENT, host->base + REG_CLEAR); in moxart_send_command()
211 writel(cmd->arg, host->base + REG_ARGUMENT); in moxart_send_command()
225 writel(cmdctrl | CMD_EN, host->base + REG_COMMAND); in moxart_send_command()
227 if (moxart_wait_for_status(host, MASK_RSP, &status) == -ETIMEDOUT) in moxart_send_command()
240 cmd->resp[3] = readl(host->base + REG_RESPONSE0); in moxart_send_command()
241 cmd->resp[2] = readl(host->base + REG_RESPONSE1); in moxart_send_command()
242 cmd->resp[1] = readl(host->base + REG_RESPONSE2); in moxart_send_command()
243 cmd->resp[0] = readl(host->base + REG_RESPONSE3); in moxart_send_command()
245 cmd->resp[0] = readl(host->base + REG_RESPONSE0); in moxart_send_command()
252 struct moxart_host *host = param; in moxart_dma_complete() local
254 complete(&host->dma_complete); in moxart_dma_complete()
257 static bool moxart_use_dma(struct moxart_host *host) in moxart_use_dma() argument
259 return (host->data_len > host->fifo_width) && host->have_dma; in moxart_use_dma()
262 static void moxart_transfer_dma(struct mmc_data *data, struct moxart_host *host) in moxart_transfer_dma() argument
268 if (host->data_len == data->bytes_xfered) in moxart_transfer_dma()
272 dma_chan = host->dma_chan_tx; in moxart_transfer_dma()
275 dma_chan = host->dma_chan_rx; in moxart_transfer_dma()
288 dev_err(mmc_dev(host->mmc), "dma_map_sg returned zero length\n"); in moxart_transfer_dma()
292 host->tx_desc = desc; in moxart_transfer_dma()
294 desc->callback_param = host; in moxart_transfer_dma()
299 wait_for_completion_interruptible_timeout(&host->dma_complete, in moxart_transfer_dma()
300 host->timeout); in moxart_transfer_dma()
302 data->bytes_xfered = host->data_len; in moxart_transfer_dma()
310 static void moxart_transfer_pio(struct moxart_host *host) in moxart_transfer_pio() argument
312 struct mmc_data *data = host->mrq->cmd->data; in moxart_transfer_pio()
315 if (host->data_len == data->bytes_xfered) in moxart_transfer_pio()
318 sgp = sg_virt(host->cur_sg); in moxart_transfer_pio()
319 remain = host->data_remain; in moxart_transfer_pio()
323 if (moxart_wait_for_status(host, FIFO_URUN, &status) in moxart_transfer_pio()
326 complete(&host->pio_complete); in moxart_transfer_pio()
329 for (len = 0; len < remain && len < host->fifo_width;) { in moxart_transfer_pio()
330 iowrite32(*sgp, host->base + REG_DATA_WINDOW); in moxart_transfer_pio()
339 if (moxart_wait_for_status(host, FIFO_ORUN, &status) in moxart_transfer_pio()
342 complete(&host->pio_complete); in moxart_transfer_pio()
345 for (len = 0; len < remain && len < host->fifo_width;) { in moxart_transfer_pio()
346 *sgp = ioread32(host->base + REG_DATA_WINDOW); in moxart_transfer_pio()
354 data->bytes_xfered += host->data_remain - remain; in moxart_transfer_pio()
355 host->data_remain = remain; in moxart_transfer_pio()
357 if (host->data_len != data->bytes_xfered) in moxart_transfer_pio()
358 moxart_next_sg(host); in moxart_transfer_pio()
360 complete(&host->pio_complete); in moxart_transfer_pio()
363 static void moxart_prepare_data(struct moxart_host *host) in moxart_prepare_data() argument
365 struct mmc_data *data = host->mrq->cmd->data; in moxart_prepare_data()
372 host->data_len = data->blocks * data->blksz; in moxart_prepare_data()
376 moxart_init_sg(host, data); in moxart_prepare_data()
383 if (moxart_use_dma(host)) in moxart_prepare_data()
386 writel(DCR_DATA_FIFO_RESET, host->base + REG_DATA_CONTROL); in moxart_prepare_data()
387 writel(MASK_DATA | FIFO_URUN | FIFO_ORUN, host->base + REG_CLEAR); in moxart_prepare_data()
388 writel(host->rate, host->base + REG_DATA_TIMER); in moxart_prepare_data()
389 writel(host->data_len, host->base + REG_DATA_LENGTH); in moxart_prepare_data()
390 writel(datactrl, host->base + REG_DATA_CONTROL); in moxart_prepare_data()
395 struct moxart_host *host = mmc_priv(mmc); in moxart_request() local
399 spin_lock_irqsave(&host->lock, flags); in moxart_request()
401 init_completion(&host->dma_complete); in moxart_request()
402 init_completion(&host->pio_complete); in moxart_request()
404 host->mrq = mrq; in moxart_request()
406 if (readl(host->base + REG_STATUS) & CARD_DETECT) { in moxart_request()
411 moxart_prepare_data(host); in moxart_request()
412 moxart_send_command(host, host->mrq->cmd); in moxart_request()
415 if (moxart_use_dma(host)) { in moxart_request()
417 writel(CARD_CHANGE, host->base + REG_INTERRUPT_MASK); in moxart_request()
419 spin_unlock_irqrestore(&host->lock, flags); in moxart_request()
421 moxart_transfer_dma(mrq->cmd->data, host); in moxart_request()
423 spin_lock_irqsave(&host->lock, flags); in moxart_request()
426 writel(MASK_INTR_PIO, host->base + REG_INTERRUPT_MASK); in moxart_request()
428 spin_unlock_irqrestore(&host->lock, flags); in moxart_request()
431 wait_for_completion_interruptible_timeout(&host->pio_complete, in moxart_request()
432 host->timeout); in moxart_request()
434 spin_lock_irqsave(&host->lock, flags); in moxart_request()
437 if (host->is_removed) { in moxart_request()
438 dev_err(mmc_dev(host->mmc), "card removed\n"); in moxart_request()
443 if (moxart_wait_for_status(host, MASK_DATA, &status) in moxart_request()
453 moxart_send_command(host, mrq->cmd->data->stop); in moxart_request()
457 spin_unlock_irqrestore(&host->lock, flags); in moxart_request()
458 mmc_request_done(host->mmc, mrq); in moxart_request()
463 struct moxart_host *host = (struct moxart_host *)devid; in moxart_irq() local
466 spin_lock(&host->lock); in moxart_irq()
468 status = readl(host->base + REG_STATUS); in moxart_irq()
470 host->is_removed = status & CARD_DETECT; in moxart_irq()
471 if (host->is_removed && host->have_dma) { in moxart_irq()
472 dmaengine_terminate_all(host->dma_chan_tx); in moxart_irq()
473 dmaengine_terminate_all(host->dma_chan_rx); in moxart_irq()
475 host->mrq = NULL; in moxart_irq()
476 writel(MASK_INTR_PIO, host->base + REG_CLEAR); in moxart_irq()
477 writel(CARD_CHANGE, host->base + REG_INTERRUPT_MASK); in moxart_irq()
478 mmc_detect_change(host->mmc, 0); in moxart_irq()
480 if (status & (FIFO_ORUN | FIFO_URUN) && host->mrq) in moxart_irq()
481 moxart_transfer_pio(host); in moxart_irq()
483 spin_unlock(&host->lock); in moxart_irq()
490 struct moxart_host *host = mmc_priv(mmc); in moxart_set_ios() local
495 spin_lock_irqsave(&host->lock, flags); in moxart_set_ios()
499 if (ios->clock >= host->sysclk / (2 * (div + 1))) in moxart_set_ios()
503 host->rate = host->sysclk / (2 * (div + 1)); in moxart_set_ios()
504 if (host->rate > host->sysclk) in moxart_set_ios()
506 writel(ctrl, host->base + REG_CLOCK_CONTROL); in moxart_set_ios()
510 writel(readl(host->base + REG_POWER_CONTROL) & ~SD_POWER_ON, in moxart_set_ios()
511 host->base + REG_POWER_CONTROL); in moxart_set_ios()
519 host->base + REG_POWER_CONTROL); in moxart_set_ios()
524 writel(BUS_WIDTH_4, host->base + REG_BUS_WIDTH); in moxart_set_ios()
527 writel(BUS_WIDTH_1, host->base + REG_BUS_WIDTH); in moxart_set_ios()
531 spin_unlock_irqrestore(&host->lock, flags); in moxart_set_ios()
537 struct moxart_host *host = mmc_priv(mmc); in moxart_get_ro() local
539 return !!(readl(host->base + REG_STATUS) & WRITE_PROT); in moxart_get_ro()
554 struct moxart_host *host = NULL; in moxart_probe() local
597 host = mmc_priv(mmc); in moxart_probe()
598 host->mmc = mmc; in moxart_probe()
599 host->base = reg_mmc; in moxart_probe()
600 host->reg_phys = res_mmc.start; in moxart_probe()
601 host->timeout = msecs_to_jiffies(1000); in moxart_probe()
602 host->sysclk = clk_get_rate(clk); in moxart_probe()
603 host->fifo_width = readl(host->base + REG_FEATURE) << 2; in moxart_probe()
604 host->dma_chan_tx = dma_request_chan(dev, "tx"); in moxart_probe()
605 host->dma_chan_rx = dma_request_chan(dev, "rx"); in moxart_probe()
607 spin_lock_init(&host->lock); in moxart_probe()
610 mmc->f_max = DIV_ROUND_CLOSEST(host->sysclk, 2); in moxart_probe()
611 mmc->f_min = DIV_ROUND_CLOSEST(host->sysclk, CLK_DIV_MASK * 2); in moxart_probe()
617 if (IS_ERR(host->dma_chan_tx) || IS_ERR(host->dma_chan_rx)) { in moxart_probe()
618 if (PTR_ERR(host->dma_chan_tx) == -EPROBE_DEFER || in moxart_probe()
619 PTR_ERR(host->dma_chan_rx) == -EPROBE_DEFER) { in moxart_probe()
623 if (!IS_ERR(host->dma_chan_tx)) { in moxart_probe()
624 dma_release_channel(host->dma_chan_tx); in moxart_probe()
625 host->dma_chan_tx = NULL; in moxart_probe()
627 if (!IS_ERR(host->dma_chan_rx)) { in moxart_probe()
628 dma_release_channel(host->dma_chan_rx); in moxart_probe()
629 host->dma_chan_rx = NULL; in moxart_probe()
632 host->have_dma = false; in moxart_probe()
637 host->dma_chan_tx, host->dma_chan_rx); in moxart_probe()
638 host->have_dma = true; in moxart_probe()
646 cfg.dst_addr = host->reg_phys + REG_DATA_WINDOW; in moxart_probe()
647 dmaengine_slave_config(host->dma_chan_tx, &cfg); in moxart_probe()
650 cfg.src_addr = host->reg_phys + REG_DATA_WINDOW; in moxart_probe()
652 dmaengine_slave_config(host->dma_chan_rx, &cfg); in moxart_probe()
655 dma_get_max_seg_size(host->dma_chan_rx->device->dev), in moxart_probe()
656 dma_get_max_seg_size(host->dma_chan_tx->device->dev)); in moxart_probe()
659 if (readl(host->base + REG_BUS_WIDTH) & BUS_WIDTH_4_SUPPORT) in moxart_probe()
662 writel(0, host->base + REG_INTERRUPT_MASK); in moxart_probe()
664 writel(CMD_SDC_RESET, host->base + REG_COMMAND); in moxart_probe()
666 if (!(readl(host->base + REG_COMMAND) & CMD_SDC_RESET)) in moxart_probe()
671 ret = devm_request_irq(dev, irq, moxart_irq, 0, "moxart-mmc", host); in moxart_probe()
680 dev_dbg(dev, "IRQ=%d, FIFO is %d bytes\n", irq, host->fifo_width); in moxart_probe()
685 if (!IS_ERR_OR_NULL(host->dma_chan_tx)) in moxart_probe()
686 dma_release_channel(host->dma_chan_tx); in moxart_probe()
687 if (!IS_ERR_OR_NULL(host->dma_chan_rx)) in moxart_probe()
688 dma_release_channel(host->dma_chan_rx); in moxart_probe()
698 struct moxart_host *host = mmc_priv(mmc); in moxart_remove() local
700 if (!IS_ERR_OR_NULL(host->dma_chan_tx)) in moxart_remove()
701 dma_release_channel(host->dma_chan_tx); in moxart_remove()
702 if (!IS_ERR_OR_NULL(host->dma_chan_rx)) in moxart_remove()
703 dma_release_channel(host->dma_chan_rx); in moxart_remove()
706 writel(0, host->base + REG_INTERRUPT_MASK); in moxart_remove()
707 writel(0, host->base + REG_POWER_CONTROL); in moxart_remove()
708 writel(readl(host->base + REG_CLOCK_CONTROL) | CLK_OFF, in moxart_remove()
709 host->base + REG_CLOCK_CONTROL); in moxart_remove()