Lines Matching full:host
3 * linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver
23 #include <linux/mmc/host.h>
49 static void mmci_variant_init(struct mmci_host *host);
50 static void ux500_variant_init(struct mmci_host *host);
51 static void ux500v2_variant_init(struct mmci_host *host);
373 struct mmci_host *host = mmc_priv(mmc); in mmci_card_busy() local
377 spin_lock_irqsave(&host->lock, flags); in mmci_card_busy()
378 if (readl(host->base + MMCISTATUS) & host->variant->busy_detect_flag) in mmci_card_busy()
380 spin_unlock_irqrestore(&host->lock, flags); in mmci_card_busy()
385 static void mmci_reg_delay(struct mmci_host *host) in mmci_reg_delay() argument
394 if (host->cclk < 25000000) in mmci_reg_delay()
401 * This must be called with host->lock held
403 void mmci_write_clkreg(struct mmci_host *host, u32 clk) in mmci_write_clkreg() argument
405 if (host->clk_reg != clk) { in mmci_write_clkreg()
406 host->clk_reg = clk; in mmci_write_clkreg()
407 writel(clk, host->base + MMCICLOCK); in mmci_write_clkreg()
412 * This must be called with host->lock held
414 void mmci_write_pwrreg(struct mmci_host *host, u32 pwr) in mmci_write_pwrreg() argument
416 if (host->pwr_reg != pwr) { in mmci_write_pwrreg()
417 host->pwr_reg = pwr; in mmci_write_pwrreg()
418 writel(pwr, host->base + MMCIPOWER); in mmci_write_pwrreg()
423 * This must be called with host->lock held
425 static void mmci_write_datactrlreg(struct mmci_host *host, u32 datactrl) in mmci_write_datactrlreg() argument
428 datactrl |= host->datactrl_reg & (host->variant->busy_dpsm_flag | in mmci_write_datactrlreg()
429 host->variant->datactrl_mask_sdio); in mmci_write_datactrlreg()
431 if (host->datactrl_reg != datactrl) { in mmci_write_datactrlreg()
432 host->datactrl_reg = datactrl; in mmci_write_datactrlreg()
433 writel(datactrl, host->base + MMCIDATACTRL); in mmci_write_datactrlreg()
438 * This must be called with host->lock held
440 static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) in mmci_set_clkreg() argument
442 struct variant_data *variant = host->variant; in mmci_set_clkreg()
446 host->cclk = 0; in mmci_set_clkreg()
450 host->cclk = host->mclk; in mmci_set_clkreg()
451 } else if (desired >= host->mclk) { in mmci_set_clkreg()
455 host->cclk = host->mclk; in mmci_set_clkreg()
463 clk = DIV_ROUND_UP(host->mclk, desired) - 2; in mmci_set_clkreg()
466 host->cclk = host->mclk / (clk + 2); in mmci_set_clkreg()
472 clk = host->mclk / (2 * desired) - 1; in mmci_set_clkreg()
475 host->cclk = host->mclk / (2 * (clk + 1)); in mmci_set_clkreg()
485 host->mmc->actual_clock = host->cclk; in mmci_set_clkreg()
487 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) in mmci_set_clkreg()
489 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) in mmci_set_clkreg()
492 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_set_clkreg()
493 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_set_clkreg()
496 mmci_write_clkreg(host, clk); in mmci_set_clkreg()
499 static void mmci_dma_release(struct mmci_host *host) in mmci_dma_release() argument
501 if (host->ops && host->ops->dma_release) in mmci_dma_release()
502 host->ops->dma_release(host); in mmci_dma_release()
504 host->use_dma = false; in mmci_dma_release()
507 static void mmci_dma_setup(struct mmci_host *host) in mmci_dma_setup() argument
509 if (!host->ops || !host->ops->dma_setup) in mmci_dma_setup()
512 if (host->ops->dma_setup(host)) in mmci_dma_setup()
516 host->next_cookie = 1; in mmci_dma_setup()
518 host->use_dma = true; in mmci_dma_setup()
524 static int mmci_validate_data(struct mmci_host *host, in mmci_validate_data() argument
527 struct variant_data *variant = host->variant; in mmci_validate_data()
532 dev_err(mmc_dev(host->mmc), in mmci_validate_data()
537 if (host->ops && host->ops->validate_data) in mmci_validate_data()
538 return host->ops->validate_data(host, data); in mmci_validate_data()
543 static int mmci_prep_data(struct mmci_host *host, struct mmc_data *data, bool next) in mmci_prep_data() argument
547 if (!host->ops || !host->ops->prep_data) in mmci_prep_data()
550 err = host->ops->prep_data(host, data, next); in mmci_prep_data()
553 data->host_cookie = ++host->next_cookie < 0 ? in mmci_prep_data()
554 1 : host->next_cookie; in mmci_prep_data()
559 static void mmci_unprep_data(struct mmci_host *host, struct mmc_data *data, in mmci_unprep_data() argument
562 if (host->ops && host->ops->unprep_data) in mmci_unprep_data()
563 host->ops->unprep_data(host, data, err); in mmci_unprep_data()
568 static void mmci_get_next_data(struct mmci_host *host, struct mmc_data *data) in mmci_get_next_data() argument
570 WARN_ON(data->host_cookie && data->host_cookie != host->next_cookie); in mmci_get_next_data()
572 if (host->ops && host->ops->get_next_data) in mmci_get_next_data()
573 host->ops->get_next_data(host, data); in mmci_get_next_data()
576 static int mmci_dma_start(struct mmci_host *host, unsigned int datactrl) in mmci_dma_start() argument
578 struct mmc_data *data = host->data; in mmci_dma_start()
581 if (!host->use_dma) in mmci_dma_start()
584 ret = mmci_prep_data(host, data, false); in mmci_dma_start()
588 if (!host->ops || !host->ops->dma_start) in mmci_dma_start()
592 dev_vdbg(mmc_dev(host->mmc), in mmci_dma_start()
596 ret = host->ops->dma_start(host, &datactrl); in mmci_dma_start()
601 mmci_write_datactrlreg(host, datactrl); in mmci_dma_start()
608 writel(readl(host->base + MMCIMASK0) | MCI_DATAENDMASK, in mmci_dma_start()
609 host->base + MMCIMASK0); in mmci_dma_start()
613 static void mmci_dma_finalize(struct mmci_host *host, struct mmc_data *data) in mmci_dma_finalize() argument
615 if (!host->use_dma) in mmci_dma_finalize()
618 if (host->ops && host->ops->dma_finalize) in mmci_dma_finalize()
619 host->ops->dma_finalize(host, data); in mmci_dma_finalize()
622 static void mmci_dma_error(struct mmci_host *host) in mmci_dma_error() argument
624 if (!host->use_dma) in mmci_dma_error()
627 if (host->ops && host->ops->dma_error) in mmci_dma_error()
628 host->ops->dma_error(host); in mmci_dma_error()
632 mmci_request_end(struct mmci_host *host, struct mmc_request *mrq) in mmci_request_end() argument
634 writel(0, host->base + MMCICOMMAND); in mmci_request_end()
636 BUG_ON(host->data); in mmci_request_end()
638 host->mrq = NULL; in mmci_request_end()
639 host->cmd = NULL; in mmci_request_end()
641 mmc_request_done(host->mmc, mrq); in mmci_request_end()
644 static void mmci_set_mask1(struct mmci_host *host, unsigned int mask) in mmci_set_mask1() argument
646 void __iomem *base = host->base; in mmci_set_mask1()
647 struct variant_data *variant = host->variant; in mmci_set_mask1()
649 if (host->singleirq) { in mmci_set_mask1()
661 host->mask1_reg = mask; in mmci_set_mask1()
664 static void mmci_stop_data(struct mmci_host *host) in mmci_stop_data() argument
666 mmci_write_datactrlreg(host, 0); in mmci_stop_data()
667 mmci_set_mask1(host, 0); in mmci_stop_data()
668 host->data = NULL; in mmci_stop_data()
671 static void mmci_init_sg(struct mmci_host *host, struct mmc_data *data) in mmci_init_sg() argument
680 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in mmci_init_sg()
683 static u32 mmci_get_dctrl_cfg(struct mmci_host *host) in mmci_get_dctrl_cfg() argument
685 return MCI_DPSM_ENABLE | mmci_dctrl_blksz(host); in mmci_get_dctrl_cfg()
688 static u32 ux500v2_get_dctrl_cfg(struct mmci_host *host) in ux500v2_get_dctrl_cfg() argument
690 return MCI_DPSM_ENABLE | (host->data->blksz << 16); in ux500v2_get_dctrl_cfg()
693 static void ux500_busy_clear_mask_done(struct mmci_host *host) in ux500_busy_clear_mask_done() argument
695 void __iomem *base = host->base; in ux500_busy_clear_mask_done()
697 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_clear_mask_done()
699 ~host->variant->busy_detect_mask, base + MMCIMASK0); in ux500_busy_clear_mask_done()
700 host->busy_state = MMCI_BUSY_DONE; in ux500_busy_clear_mask_done()
701 host->busy_status = 0; in ux500_busy_clear_mask_done()
707 * host->busy_status until we know the card is not busy any more.
721 static bool ux500_busy_complete(struct mmci_host *host, struct mmc_command *cmd, in ux500_busy_complete() argument
724 void __iomem *base = host->base; in ux500_busy_complete()
729 ux500_busy_clear_mask_done(host); in ux500_busy_complete()
737 switch (host->busy_state) { in ux500_busy_complete()
743 * store the status in host->busy_status. in ux500_busy_complete()
754 * host->busy_status, which is what it should be in IDLE. in ux500_busy_complete()
756 host->busy_status = status & (MCI_CMDSENT | MCI_CMDRESPEND); in ux500_busy_complete()
760 host->busy_status |= status & (MCI_CMDSENT | MCI_CMDRESPEND); in ux500_busy_complete()
761 if (status & host->variant->busy_detect_flag) { in ux500_busy_complete()
763 host->variant->busy_detect_mask, in ux500_busy_complete()
765 host->busy_state = MMCI_BUSY_WAITING_FOR_START_IRQ; in ux500_busy_complete()
766 schedule_delayed_work(&host->ux500_busy_timeout_work, in ux500_busy_complete()
772 dev_dbg(mmc_dev(host->mmc), in ux500_busy_complete()
774 ux500_busy_clear_mask_done(host); in ux500_busy_complete()
789 if (status & host->variant->busy_detect_flag) { in ux500_busy_complete()
790 host->busy_status |= status & (MCI_CMDSENT | MCI_CMDRESPEND); in ux500_busy_complete()
791 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_complete()
792 host->busy_state = MMCI_BUSY_WAITING_FOR_END_IRQ; in ux500_busy_complete()
794 dev_dbg(mmc_dev(host->mmc), in ux500_busy_complete()
797 cancel_delayed_work(&host->ux500_busy_timeout_work); in ux500_busy_complete()
798 ux500_busy_clear_mask_done(host); in ux500_busy_complete()
803 if (!(status & host->variant->busy_detect_flag)) { in ux500_busy_complete()
804 host->busy_status |= status & (MCI_CMDSENT | MCI_CMDRESPEND); in ux500_busy_complete()
805 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_complete()
806 cancel_delayed_work(&host->ux500_busy_timeout_work); in ux500_busy_complete()
807 ux500_busy_clear_mask_done(host); in ux500_busy_complete()
809 dev_dbg(mmc_dev(host->mmc), in ux500_busy_complete()
816 dev_dbg(mmc_dev(host->mmc), "fell through on state %d, CMD%02x\n", in ux500_busy_complete()
817 host->busy_state, cmd->opcode); in ux500_busy_complete()
822 return (host->busy_state == MMCI_BUSY_DONE); in ux500_busy_complete()
844 int mmci_dmae_setup(struct mmci_host *host) in mmci_dmae_setup() argument
849 dmae = devm_kzalloc(mmc_dev(host->mmc), sizeof(*dmae), GFP_KERNEL); in mmci_dmae_setup()
853 host->dma_priv = dmae; in mmci_dmae_setup()
855 dmae->rx_channel = dma_request_chan(mmc_dev(host->mmc), "rx"); in mmci_dmae_setup()
862 dmae->tx_channel = dma_request_chan(mmc_dev(host->mmc), "tx"); in mmci_dmae_setup()
865 dev_warn(mmc_dev(host->mmc), in mmci_dmae_setup()
888 dev_info(mmc_dev(host->mmc), "DMA channels RX %s, TX %s\n", in mmci_dmae_setup()
899 if (max_seg_size < host->mmc->max_seg_size) in mmci_dmae_setup()
900 host->mmc->max_seg_size = max_seg_size; in mmci_dmae_setup()
906 if (max_seg_size < host->mmc->max_seg_size) in mmci_dmae_setup()
907 host->mmc->max_seg_size = max_seg_size; in mmci_dmae_setup()
911 mmci_dmae_release(host); in mmci_dmae_setup()
922 void mmci_dmae_release(struct mmci_host *host) in mmci_dmae_release() argument
924 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_release()
933 static void mmci_dma_unmap(struct mmci_host *host, struct mmc_data *data) in mmci_dma_unmap() argument
935 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dma_unmap()
947 void mmci_dmae_error(struct mmci_host *host) in mmci_dmae_error() argument
949 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_error()
951 if (!dma_inprogress(host)) in mmci_dmae_error()
954 dev_err(mmc_dev(host->mmc), "error during DMA transfer!\n"); in mmci_dmae_error()
956 host->dma_in_progress = false; in mmci_dmae_error()
959 host->data->host_cookie = 0; in mmci_dmae_error()
961 mmci_dma_unmap(host, host->data); in mmci_dmae_error()
964 void mmci_dmae_finalize(struct mmci_host *host, struct mmc_data *data) in mmci_dmae_finalize() argument
966 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_finalize()
970 if (!dma_inprogress(host)) in mmci_dmae_finalize()
975 status = readl(host->base + MMCISTATUS); in mmci_dmae_finalize()
988 mmci_dma_error(host); in mmci_dmae_finalize()
992 mmci_dma_unmap(host, data); in mmci_dmae_finalize()
1000 dev_err(mmc_dev(host->mmc), "buggy DMA detected. Taking evasive action.\n"); in mmci_dmae_finalize()
1001 mmci_dma_release(host); in mmci_dmae_finalize()
1004 host->dma_in_progress = false; in mmci_dmae_finalize()
1010 static int _mmci_dmae_prep_data(struct mmci_host *host, struct mmc_data *data, in _mmci_dmae_prep_data() argument
1014 struct mmci_dmae_priv *dmae = host->dma_priv; in _mmci_dmae_prep_data()
1015 struct variant_data *variant = host->variant; in _mmci_dmae_prep_data()
1017 .src_addr = host->phybase + MMCIFIFO, in _mmci_dmae_prep_data()
1018 .dst_addr = host->phybase + MMCIFIFO, in _mmci_dmae_prep_data()
1056 if (host->variant->dma_power_of_2 && !is_power_of_2(data->blksz)) in _mmci_dmae_prep_data()
1065 if (host->variant->qcom_dml) in _mmci_dmae_prep_data()
1085 int mmci_dmae_prep_data(struct mmci_host *host, in mmci_dmae_prep_data() argument
1089 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_prep_data()
1092 if (!host->use_dma) in mmci_dmae_prep_data()
1096 return _mmci_dmae_prep_data(host, data, &nd->chan, &nd->desc); in mmci_dmae_prep_data()
1102 return _mmci_dmae_prep_data(host, data, &dmae->cur, in mmci_dmae_prep_data()
1106 int mmci_dmae_start(struct mmci_host *host, unsigned int *datactrl) in mmci_dmae_start() argument
1108 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_start()
1111 host->dma_in_progress = true; in mmci_dmae_start()
1114 host->dma_in_progress = false; in mmci_dmae_start()
1124 void mmci_dmae_get_next_data(struct mmci_host *host, struct mmc_data *data) in mmci_dmae_get_next_data() argument
1126 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_get_next_data()
1129 if (!host->use_dma) in mmci_dmae_get_next_data()
1140 void mmci_dmae_unprep_data(struct mmci_host *host, in mmci_dmae_unprep_data() argument
1144 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_unprep_data()
1146 if (!host->use_dma) in mmci_dmae_unprep_data()
1149 mmci_dma_unmap(host, data); in mmci_dmae_unprep_data()
1164 host->dma_in_progress = false; in mmci_dmae_unprep_data()
1190 static void mmci_variant_init(struct mmci_host *host) in mmci_variant_init() argument
1192 host->ops = &mmci_variant_ops; in mmci_variant_init()
1195 static void ux500_variant_init(struct mmci_host *host) in ux500_variant_init() argument
1197 host->ops = &mmci_variant_ops; in ux500_variant_init()
1198 host->ops->busy_complete = ux500_busy_complete; in ux500_variant_init()
1201 static void ux500v2_variant_init(struct mmci_host *host) in ux500v2_variant_init() argument
1203 host->ops = &mmci_variant_ops; in ux500v2_variant_init()
1204 host->ops->busy_complete = ux500_busy_complete; in ux500v2_variant_init()
1205 host->ops->get_datactrl_cfg = ux500v2_get_dctrl_cfg; in ux500v2_variant_init()
1210 struct mmci_host *host = mmc_priv(mmc); in mmci_pre_request() local
1218 if (mmci_validate_data(host, data)) in mmci_pre_request()
1221 mmci_prep_data(host, data, true); in mmci_pre_request()
1227 struct mmci_host *host = mmc_priv(mmc); in mmci_post_request() local
1233 mmci_unprep_data(host, data, err); in mmci_post_request()
1236 static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) in mmci_start_data() argument
1238 struct variant_data *variant = host->variant; in mmci_start_data()
1243 dev_dbg(mmc_dev(host->mmc), "blksz %04x blks %04x flags %08x\n", in mmci_start_data()
1246 host->data = data; in mmci_start_data()
1247 host->size = data->blksz * data->blocks; in mmci_start_data()
1250 clks = (unsigned long long)data->timeout_ns * host->cclk; in mmci_start_data()
1255 base = host->base; in mmci_start_data()
1257 writel(host->size, base + MMCIDATALENGTH); in mmci_start_data()
1259 datactrl = host->ops->get_datactrl_cfg(host); in mmci_start_data()
1260 datactrl |= host->data->flags & MMC_DATA_READ ? MCI_DPSM_DIRECTION : 0; in mmci_start_data()
1262 if (host->mmc->card && mmc_card_sdio(host->mmc->card)) { in mmci_start_data()
1274 (host->size < 8 || in mmci_start_data()
1275 (host->size <= 8 && host->mclk > 50000000))) in mmci_start_data()
1276 clk = host->clk_reg & ~variant->clkreg_enable; in mmci_start_data()
1278 clk = host->clk_reg | variant->clkreg_enable; in mmci_start_data()
1280 mmci_write_clkreg(host, clk); in mmci_start_data()
1283 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_start_data()
1284 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_start_data()
1291 if (!mmci_dma_start(host, datactrl)) in mmci_start_data()
1295 mmci_init_sg(host, data); in mmci_start_data()
1305 if (host->size < variant->fifohalfsize) in mmci_start_data()
1315 mmci_write_datactrlreg(host, datactrl); in mmci_start_data()
1317 mmci_set_mask1(host, irqmask); in mmci_start_data()
1321 mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c) in mmci_start_command() argument
1323 void __iomem *base = host->base; in mmci_start_command()
1327 dev_dbg(mmc_dev(host->mmc), "op %02x arg %08x flags %08x\n", in mmci_start_command()
1330 if (readl(base + MMCICOMMAND) & host->variant->cmdreg_cpsm_enable) { in mmci_start_command()
1332 mmci_reg_delay(host); in mmci_start_command()
1335 if (host->variant->cmdreg_stop && in mmci_start_command()
1337 c |= host->variant->cmdreg_stop; in mmci_start_command()
1339 c |= cmd->opcode | host->variant->cmdreg_cpsm_enable; in mmci_start_command()
1342 c |= host->variant->cmdreg_lrsp_crc; in mmci_start_command()
1344 c |= host->variant->cmdreg_srsp_crc; in mmci_start_command()
1346 c |= host->variant->cmdreg_srsp; in mmci_start_command()
1349 host->busy_status = 0; in mmci_start_command()
1350 host->busy_state = MMCI_BUSY_DONE; in mmci_start_command()
1356 if (busy_resp && host->variant->busy_timeout) { in mmci_start_command()
1357 if (cmd->busy_timeout > host->mmc->max_busy_timeout) in mmci_start_command()
1358 clks = (unsigned long long)host->mmc->max_busy_timeout * host->cclk; in mmci_start_command()
1360 clks = (unsigned long long)cmd->busy_timeout * host->cclk; in mmci_start_command()
1363 writel_relaxed(clks, host->base + MMCIDATATIMER); in mmci_start_command()
1366 if (host->ops->pre_sig_volt_switch && cmd->opcode == SD_SWITCH_VOLTAGE) in mmci_start_command()
1367 host->ops->pre_sig_volt_switch(host); in mmci_start_command()
1373 c |= host->variant->data_cmd_enable; in mmci_start_command()
1375 host->cmd = cmd; in mmci_start_command()
1381 static void mmci_stop_command(struct mmci_host *host) in mmci_stop_command() argument
1383 host->stop_abort.error = 0; in mmci_stop_command()
1384 mmci_start_command(host, &host->stop_abort, 0); in mmci_stop_command()
1388 mmci_data_irq(struct mmci_host *host, struct mmc_data *data, in mmci_data_irq() argument
1398 status_err = status & (host->variant->start_err | in mmci_data_irq()
1406 mmci_dma_error(host); in mmci_data_irq()
1411 * on the MMC bus, not on the host side. On reads, this in mmci_data_irq()
1415 if (!host->variant->datacnt_useless) { in mmci_data_irq()
1416 remain = readl(host->base + MMCIDATACNT); in mmci_data_irq()
1422 dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n", in mmci_data_irq()
1435 if (success > host->variant->fifosize) in mmci_data_irq()
1436 success -= host->variant->fifosize; in mmci_data_irq()
1445 dev_err(mmc_dev(host->mmc), "stray MCI_DATABLOCKEND interrupt\n"); in mmci_data_irq()
1448 mmci_dma_finalize(host, data); in mmci_data_irq()
1450 mmci_stop_data(host); in mmci_data_irq()
1457 if (host->variant->cmdreg_stop && data->error) in mmci_data_irq()
1458 mmci_stop_command(host); in mmci_data_irq()
1460 mmci_request_end(host, data->mrq); in mmci_data_irq()
1461 } else if (host->mrq->sbc && !data->error) { in mmci_data_irq()
1462 mmci_request_end(host, data->mrq); in mmci_data_irq()
1464 mmci_start_command(host, data->stop, 0); in mmci_data_irq()
1470 mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, in mmci_cmd_irq() argument
1474 void __iomem *base = host->base; in mmci_cmd_irq()
1480 sbc = (cmd == host->mrq->sbc); in mmci_cmd_irq()
1488 if (host->variant->busy_timeout && busy_resp) in mmci_cmd_irq()
1491 if (!((status | host->busy_status) & in mmci_cmd_irq()
1496 if (busy_resp && host->variant->busy_detect) in mmci_cmd_irq()
1497 if (!host->ops->busy_complete(host, cmd, status, err_msk)) in mmci_cmd_irq()
1500 host->cmd = NULL; in mmci_cmd_irq()
1506 } else if (host->variant->busy_timeout && busy_resp && in mmci_cmd_irq()
1513 host->irq_action = IRQ_WAKE_THREAD; in mmci_cmd_irq()
1522 if (host->data) { in mmci_cmd_irq()
1524 mmci_dma_error(host); in mmci_cmd_irq()
1526 mmci_stop_data(host); in mmci_cmd_irq()
1527 if (host->variant->cmdreg_stop && cmd->error) { in mmci_cmd_irq()
1528 mmci_stop_command(host); in mmci_cmd_irq()
1533 if (host->irq_action != IRQ_WAKE_THREAD) in mmci_cmd_irq()
1534 mmci_request_end(host, host->mrq); in mmci_cmd_irq()
1537 mmci_start_command(host, host->mrq->cmd, 0); in mmci_cmd_irq()
1538 } else if (!host->variant->datactrl_first && in mmci_cmd_irq()
1540 mmci_start_data(host, cmd->data); in mmci_cmd_irq()
1544 static char *ux500_state_str(struct mmci_host *host) in ux500_state_str() argument
1546 switch (host->busy_state) { in ux500_state_str()
1565 struct mmci_host *host = container_of(work, struct mmci_host, in ux500_busy_timeout_work() local
1570 spin_lock_irqsave(&host->lock, flags); in ux500_busy_timeout_work()
1572 if (host->cmd) { in ux500_busy_timeout_work()
1574 status = readl(host->base + MMCISTATUS); in ux500_busy_timeout_work()
1575 if (status & host->variant->busy_detect_flag) { in ux500_busy_timeout_work()
1577 dev_err(mmc_dev(host->mmc), in ux500_busy_timeout_work()
1579 ux500_state_str(host), host->cmd->opcode); in ux500_busy_timeout_work()
1581 dev_err(mmc_dev(host->mmc), in ux500_busy_timeout_work()
1583 ux500_state_str(host), host->cmd->opcode); in ux500_busy_timeout_work()
1586 mmci_cmd_irq(host, host->cmd, status); in ux500_busy_timeout_work()
1589 spin_unlock_irqrestore(&host->lock, flags); in ux500_busy_timeout_work()
1592 static int mmci_get_rx_fifocnt(struct mmci_host *host, u32 status, int remain) in mmci_get_rx_fifocnt() argument
1594 return remain - (readl(host->base + MMCIFIFOCNT) << 2); in mmci_get_rx_fifocnt()
1597 static int mmci_qcom_get_rx_fifocnt(struct mmci_host *host, u32 status, int r) in mmci_qcom_get_rx_fifocnt() argument
1604 return host->variant->fifohalfsize; in mmci_qcom_get_rx_fifocnt()
1611 static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain) in mmci_pio_read() argument
1613 void __iomem *base = host->base; in mmci_pio_read()
1615 u32 status = readl(host->base + MMCISTATUS); in mmci_pio_read()
1616 int host_remain = host->size; in mmci_pio_read()
1619 int count = host->get_rx_fifocnt(host, status, host_remain); in mmci_pio_read()
1659 static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status) in mmci_pio_write() argument
1661 struct variant_data *variant = host->variant; in mmci_pio_write()
1662 void __iomem *base = host->base; in mmci_pio_write()
1699 struct mmci_host *host = dev_id; in mmci_pio_irq() local
1700 struct sg_mapping_iter *sg_miter = &host->sg_miter; in mmci_pio_irq()
1701 struct variant_data *variant = host->variant; in mmci_pio_irq()
1702 void __iomem *base = host->base; in mmci_pio_irq()
1707 dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status); in mmci_pio_irq()
1731 len = mmci_pio_read(host, buffer, remain); in mmci_pio_irq()
1733 len = mmci_pio_write(host, buffer, remain, status); in mmci_pio_irq()
1737 host->size -= len; in mmci_pio_irq()
1752 if (status & MCI_RXACTIVE && host->size < variant->fifohalfsize) in mmci_pio_irq()
1753 mmci_set_mask1(host, MCI_RXDATAAVLBLMASK); in mmci_pio_irq()
1761 if (host->size == 0) { in mmci_pio_irq()
1762 mmci_set_mask1(host, 0); in mmci_pio_irq()
1769 static void mmci_write_sdio_irq_bit(struct mmci_host *host, int enable) in mmci_write_sdio_irq_bit() argument
1771 void __iomem *base = host->base; in mmci_write_sdio_irq_bit()
1780 static void mmci_signal_sdio_irq(struct mmci_host *host, u32 status) in mmci_signal_sdio_irq() argument
1783 mmci_write_sdio_irq_bit(host, 0); in mmci_signal_sdio_irq()
1784 sdio_signal_irq(host->mmc); in mmci_signal_sdio_irq()
1793 struct mmci_host *host = dev_id; in mmci_irq() local
1796 spin_lock(&host->lock); in mmci_irq()
1797 host->irq_action = IRQ_HANDLED; in mmci_irq()
1800 status = readl(host->base + MMCISTATUS); in mmci_irq()
1804 if (host->singleirq) { in mmci_irq()
1805 if (status & host->mask1_reg) in mmci_irq()
1808 status &= ~host->variant->irq_pio_mask; in mmci_irq()
1815 status &= readl(host->base + MMCIMASK0); in mmci_irq()
1816 if (host->variant->busy_detect) in mmci_irq()
1817 writel(status & ~host->variant->busy_detect_mask, in mmci_irq()
1818 host->base + MMCICLEAR); in mmci_irq()
1820 writel(status, host->base + MMCICLEAR); in mmci_irq()
1822 dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status); in mmci_irq()
1824 if (host->variant->reversed_irq_handling) { in mmci_irq()
1825 mmci_data_irq(host, host->data, status); in mmci_irq()
1826 mmci_cmd_irq(host, host->cmd, status); in mmci_irq()
1828 mmci_cmd_irq(host, host->cmd, status); in mmci_irq()
1829 mmci_data_irq(host, host->data, status); in mmci_irq()
1832 if (host->variant->supports_sdio_irq) in mmci_irq()
1833 mmci_signal_sdio_irq(host, status); in mmci_irq()
1839 if (host->variant->busy_detect_flag) in mmci_irq()
1840 status &= ~host->variant->busy_detect_flag; in mmci_irq()
1844 spin_unlock(&host->lock); in mmci_irq()
1846 return host->irq_action; in mmci_irq()
1857 struct mmci_host *host = dev_id; in mmci_irq_thread() local
1860 if (host->rst) { in mmci_irq_thread()
1861 reset_control_assert(host->rst); in mmci_irq_thread()
1863 reset_control_deassert(host->rst); in mmci_irq_thread()
1866 spin_lock_irqsave(&host->lock, flags); in mmci_irq_thread()
1867 writel(host->clk_reg, host->base + MMCICLOCK); in mmci_irq_thread()
1868 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_irq_thread()
1869 writel(MCI_IRQENABLE | host->variant->start_err, in mmci_irq_thread()
1870 host->base + MMCIMASK0); in mmci_irq_thread()
1872 host->irq_action = IRQ_HANDLED; in mmci_irq_thread()
1873 mmci_request_end(host, host->mrq); in mmci_irq_thread()
1874 spin_unlock_irqrestore(&host->lock, flags); in mmci_irq_thread()
1876 return host->irq_action; in mmci_irq_thread()
1881 struct mmci_host *host = mmc_priv(mmc); in mmci_request() local
1884 WARN_ON(host->mrq != NULL); in mmci_request()
1886 mrq->cmd->error = mmci_validate_data(host, mrq->data); in mmci_request()
1892 spin_lock_irqsave(&host->lock, flags); in mmci_request()
1894 host->mrq = mrq; in mmci_request()
1897 mmci_get_next_data(host, mrq->data); in mmci_request()
1900 (host->variant->datactrl_first || mrq->data->flags & MMC_DATA_READ)) in mmci_request()
1901 mmci_start_data(host, mrq->data); in mmci_request()
1904 mmci_start_command(host, mrq->sbc, 0); in mmci_request()
1906 mmci_start_command(host, mrq->cmd, 0); in mmci_request()
1908 spin_unlock_irqrestore(&host->lock, flags); in mmci_request()
1913 struct mmci_host *host = mmc_priv(mmc); in mmci_set_max_busy_timeout() local
1916 if (!host->variant->busy_detect) in mmci_set_max_busy_timeout()
1919 if (host->variant->busy_timeout && mmc->actual_clock) in mmci_set_max_busy_timeout()
1928 struct mmci_host *host = mmc_priv(mmc); in mmci_set_ios() local
1929 struct variant_data *variant = host->variant; in mmci_set_ios()
1939 if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { in mmci_set_ios()
1941 host->vqmmc_enabled = false; in mmci_set_ios()
1958 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in mmci_set_ios()
1964 host->vqmmc_enabled = true; in mmci_set_ios()
1977 pwr |= host->pwr_reg_add; in mmci_set_ios()
1996 pinctrl_select_state(host->pinctrl, host->pins_opendrain); in mmci_set_ios()
2008 if (host->variant->explicit_mclk_control && in mmci_set_ios()
2009 ios->clock != host->clock_cache) { in mmci_set_ios()
2010 ret = clk_set_rate(host->clk, ios->clock); in mmci_set_ios()
2012 dev_err(mmc_dev(host->mmc), in mmci_set_ios()
2015 host->mclk = clk_get_rate(host->clk); in mmci_set_ios()
2017 host->clock_cache = ios->clock; in mmci_set_ios()
2019 spin_lock_irqsave(&host->lock, flags); in mmci_set_ios()
2021 if (host->ops && host->ops->set_clkreg) in mmci_set_ios()
2022 host->ops->set_clkreg(host, ios->clock); in mmci_set_ios()
2024 mmci_set_clkreg(host, ios->clock); in mmci_set_ios()
2028 if (host->ops && host->ops->set_pwrreg) in mmci_set_ios()
2029 host->ops->set_pwrreg(host, pwr); in mmci_set_ios()
2031 mmci_write_pwrreg(host, pwr); in mmci_set_ios()
2033 mmci_reg_delay(host); in mmci_set_ios()
2035 spin_unlock_irqrestore(&host->lock, flags); in mmci_set_ios()
2040 struct mmci_host *host = mmc_priv(mmc); in mmci_get_cd() local
2041 struct mmci_platform_data *plat = host->plat; in mmci_get_cd()
2048 status = plat->status(mmc_dev(host->mmc)); in mmci_get_cd()
2055 struct mmci_host *host = mmc_priv(mmc); in mmci_sig_volt_switch() local
2060 if (!ret && host->ops && host->ops->post_sig_volt_switch) in mmci_sig_volt_switch()
2061 ret = host->ops->post_sig_volt_switch(host, ios); in mmci_sig_volt_switch()
2073 struct mmci_host *host = mmc_priv(mmc); in mmci_enable_sdio_irq() local
2080 spin_lock_irqsave(&host->lock, flags); in mmci_enable_sdio_irq()
2081 mmci_write_sdio_irq_bit(host, enable); in mmci_enable_sdio_irq()
2082 spin_unlock_irqrestore(&host->lock, flags); in mmci_enable_sdio_irq()
2092 struct mmci_host *host = mmc_priv(mmc); in mmci_ack_sdio_irq() local
2095 spin_lock_irqsave(&host->lock, flags); in mmci_ack_sdio_irq()
2096 mmci_write_sdio_irq_bit(host, 1); in mmci_ack_sdio_irq()
2097 spin_unlock_irqrestore(&host->lock, flags); in mmci_ack_sdio_irq()
2113 struct mmci_host *host = mmc_priv(mmc); in mmci_probe_level_translator() local
2123 host->clk_reg_add |= MCI_STM32_CLK_SELCKIN; in mmci_probe_level_translator()
2154 host->clk_reg_add &= ~MCI_STM32_CLK_SELCKIN; in mmci_probe_level_translator()
2171 struct mmci_host *host = mmc_priv(mmc); in mmci_of_parse() local
2178 host->pwr_reg_add |= MCI_ST_DATA0DIREN; in mmci_of_parse()
2180 host->pwr_reg_add |= MCI_ST_DATA2DIREN; in mmci_of_parse()
2182 host->pwr_reg_add |= MCI_ST_DATA31DIREN; in mmci_of_parse()
2184 host->pwr_reg_add |= MCI_ST_DATA74DIREN; in mmci_of_parse()
2186 host->pwr_reg_add |= MCI_ST_CMDDIREN; in mmci_of_parse()
2188 host->pwr_reg_add |= MCI_ST_FBCLKEN; in mmci_of_parse()
2190 host->pwr_reg_add |= MCI_STM32_DIRPOL; in mmci_of_parse()
2192 host->clk_reg_add |= MCI_STM32_CLK_NEGEDGE; in mmci_of_parse()
2210 struct mmci_host *host; in mmci_probe() local
2230 host = mmc_priv(mmc); in mmci_probe()
2231 host->mmc = mmc; in mmci_probe()
2232 host->mmc_ops = &mmci_ops; in mmci_probe()
2244 host->pinctrl = devm_pinctrl_get(&dev->dev); in mmci_probe()
2245 if (IS_ERR(host->pinctrl)) { in mmci_probe()
2247 ret = PTR_ERR(host->pinctrl); in mmci_probe()
2251 host->pins_opendrain = pinctrl_lookup_state(host->pinctrl, in mmci_probe()
2253 if (IS_ERR(host->pins_opendrain)) { in mmci_probe()
2255 ret = PTR_ERR(host->pins_opendrain); in mmci_probe()
2260 host->hw_designer = amba_manf(dev); in mmci_probe()
2261 host->hw_revision = amba_rev(dev); in mmci_probe()
2262 dev_dbg(mmc_dev(mmc), "designer ID = 0x%02x\n", host->hw_designer); in mmci_probe()
2263 dev_dbg(mmc_dev(mmc), "revision = 0x%01x\n", host->hw_revision); in mmci_probe()
2265 host->clk = devm_clk_get(&dev->dev, NULL); in mmci_probe()
2266 if (IS_ERR(host->clk)) { in mmci_probe()
2267 ret = PTR_ERR(host->clk); in mmci_probe()
2271 ret = clk_prepare_enable(host->clk); in mmci_probe()
2276 host->get_rx_fifocnt = mmci_qcom_get_rx_fifocnt; in mmci_probe()
2278 host->get_rx_fifocnt = mmci_get_rx_fifocnt; in mmci_probe()
2280 host->plat = plat; in mmci_probe()
2281 host->variant = variant; in mmci_probe()
2282 host->mclk = clk_get_rate(host->clk); in mmci_probe()
2288 if (host->mclk > variant->f_max) { in mmci_probe()
2289 ret = clk_set_rate(host->clk, variant->f_max); in mmci_probe()
2292 host->mclk = clk_get_rate(host->clk); in mmci_probe()
2294 host->mclk); in mmci_probe()
2297 host->phybase = dev->res.start; in mmci_probe()
2298 host->base = devm_ioremap_resource(&dev->dev, &dev->res); in mmci_probe()
2299 if (IS_ERR(host->base)) { in mmci_probe()
2300 ret = PTR_ERR(host->base); in mmci_probe()
2305 variant->init(host); in mmci_probe()
2314 mmc->f_min = DIV_ROUND_UP(host->mclk, 257); in mmci_probe()
2316 mmc->f_min = DIV_ROUND_UP(host->mclk, 2046); in mmci_probe()
2318 mmc->f_min = clk_round_rate(host->clk, 100000); in mmci_probe()
2320 mmc->f_min = DIV_ROUND_UP(host->mclk, 512); in mmci_probe()
2330 min(host->mclk, mmc->f_max); in mmci_probe()
2333 fmax : min(host->mclk, fmax); in mmci_probe()
2338 host->rst = devm_reset_control_get_optional_exclusive(&dev->dev, NULL); in mmci_probe()
2339 if (IS_ERR(host->rst)) { in mmci_probe()
2340 ret = PTR_ERR(host->rst); in mmci_probe()
2343 ret = reset_control_deassert(host->rst); in mmci_probe()
2370 mmci_write_datactrlreg(host, in mmci_probe()
2371 host->variant->busy_dpsm_flag); in mmci_probe()
2375 if (variant->supports_sdio_irq && host->mmc->caps & MMC_CAP_SDIO_IRQ) { in mmci_probe()
2381 mmci_write_datactrlreg(host, in mmci_probe()
2382 host->variant->datactrl_mask_sdio); in mmci_probe()
2390 host->stop_abort.opcode = MMC_STOP_TRANSMISSION; in mmci_probe()
2391 host->stop_abort.arg = 0; in mmci_probe()
2392 host->stop_abort.flags = MMC_RSP_R1B | MMC_CMD_AC; in mmci_probe()
2426 spin_lock_init(&host->lock); in mmci_probe()
2428 writel(0, host->base + MMCIMASK0); in mmci_probe()
2431 writel(0, host->base + MMCIMASK1); in mmci_probe()
2433 writel(0xfff, host->base + MMCICLEAR); in mmci_probe()
2454 DRIVER_NAME " (cmd)", host); in mmci_probe()
2459 host->singleirq = true; in mmci_probe()
2462 IRQF_SHARED, DRIVER_NAME " (pio)", host); in mmci_probe()
2467 if (host->variant->busy_detect) in mmci_probe()
2468 INIT_DELAYED_WORK(&host->ux500_busy_timeout_work, in mmci_probe()
2471 writel(MCI_IRQENABLE | variant->start_err, host->base + MMCIMASK0); in mmci_probe()
2480 mmci_dma_setup(host); in mmci_probe()
2493 clk_disable_unprepare(host->clk); in mmci_probe()
2504 struct mmci_host *host = mmc_priv(mmc); in mmci_remove() local
2505 struct variant_data *variant = host->variant; in mmci_remove()
2515 writel(0, host->base + MMCIMASK0); in mmci_remove()
2518 writel(0, host->base + MMCIMASK1); in mmci_remove()
2520 writel(0, host->base + MMCICOMMAND); in mmci_remove()
2521 writel(0, host->base + MMCIDATACTRL); in mmci_remove()
2523 mmci_dma_release(host); in mmci_remove()
2524 clk_disable_unprepare(host->clk); in mmci_remove()
2530 static void mmci_save(struct mmci_host *host) in mmci_save() argument
2534 spin_lock_irqsave(&host->lock, flags); in mmci_save()
2536 writel(0, host->base + MMCIMASK0); in mmci_save()
2537 if (host->variant->pwrreg_nopower) { in mmci_save()
2538 writel(0, host->base + MMCIDATACTRL); in mmci_save()
2539 writel(0, host->base + MMCIPOWER); in mmci_save()
2540 writel(0, host->base + MMCICLOCK); in mmci_save()
2542 mmci_reg_delay(host); in mmci_save()
2544 spin_unlock_irqrestore(&host->lock, flags); in mmci_save()
2547 static void mmci_restore(struct mmci_host *host) in mmci_restore() argument
2551 spin_lock_irqsave(&host->lock, flags); in mmci_restore()
2553 if (host->variant->pwrreg_nopower) { in mmci_restore()
2554 writel(host->clk_reg, host->base + MMCICLOCK); in mmci_restore()
2555 writel(host->datactrl_reg, host->base + MMCIDATACTRL); in mmci_restore()
2556 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_restore()
2558 writel(MCI_IRQENABLE | host->variant->start_err, in mmci_restore()
2559 host->base + MMCIMASK0); in mmci_restore()
2560 mmci_reg_delay(host); in mmci_restore()
2562 spin_unlock_irqrestore(&host->lock, flags); in mmci_restore()
2571 struct mmci_host *host = mmc_priv(mmc); in mmci_runtime_suspend() local
2573 mmci_save(host); in mmci_runtime_suspend()
2574 clk_disable_unprepare(host->clk); in mmci_runtime_suspend()
2586 struct mmci_host *host = mmc_priv(mmc); in mmci_runtime_resume() local
2587 clk_prepare_enable(host->clk); in mmci_runtime_resume()
2588 mmci_restore(host); in mmci_runtime_resume()