Lines Matching full:host
31 #include <linux/mmc/host.h>
117 spin_lock_bh(&slot->host->lock); in dw_mci_req_show()
143 spin_unlock_bh(&slot->host->lock); in dw_mci_req_show()
151 struct dw_mci *host = s->private; in dw_mci_regs_show() local
153 pm_runtime_get_sync(host->dev); in dw_mci_regs_show()
155 seq_printf(s, "STATUS:\t0x%08x\n", mci_readl(host, STATUS)); in dw_mci_regs_show()
156 seq_printf(s, "RINTSTS:\t0x%08x\n", mci_readl(host, RINTSTS)); in dw_mci_regs_show()
157 seq_printf(s, "CMD:\t0x%08x\n", mci_readl(host, CMD)); in dw_mci_regs_show()
158 seq_printf(s, "CTRL:\t0x%08x\n", mci_readl(host, CTRL)); in dw_mci_regs_show()
159 seq_printf(s, "INTMASK:\t0x%08x\n", mci_readl(host, INTMASK)); in dw_mci_regs_show()
160 seq_printf(s, "CLKENA:\t0x%08x\n", mci_readl(host, CLKENA)); in dw_mci_regs_show()
162 pm_runtime_put_autosuspend(host->dev); in dw_mci_regs_show()
171 struct dw_mci *host = slot->host; in dw_mci_init_debugfs() local
178 debugfs_create_file("regs", S_IRUSR, root, host, &dw_mci_regs_fops); in dw_mci_init_debugfs()
180 debugfs_create_u32("state", S_IRUSR, root, &host->state); in dw_mci_init_debugfs()
182 &host->pending_events); in dw_mci_init_debugfs()
184 &host->completed_events); in dw_mci_init_debugfs()
186 fault_create_debugfs_attr("fail_data_crc", root, &host->fail_data_crc); in dw_mci_init_debugfs()
191 static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset) in dw_mci_ctrl_reset() argument
195 ctrl = mci_readl(host, CTRL); in dw_mci_ctrl_reset()
197 mci_writel(host, CTRL, ctrl); in dw_mci_ctrl_reset()
200 if (readl_poll_timeout_atomic(host->regs + SDMMC_CTRL, ctrl, in dw_mci_ctrl_reset()
203 dev_err(host->dev, in dw_mci_ctrl_reset()
212 static void dw_mci_wait_while_busy(struct dw_mci *host, u32 cmd_flags) in dw_mci_wait_while_busy() argument
226 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_wait_while_busy()
230 dev_err(host->dev, "Busy; trying anyway\n"); in dw_mci_wait_while_busy()
236 struct dw_mci *host = slot->host; in mci_send_cmd() local
239 mci_writel(host, CMDARG, arg); in mci_send_cmd()
241 dw_mci_wait_while_busy(host, cmd); in mci_send_cmd()
242 mci_writel(host, CMD, SDMMC_CMD_START | cmd); in mci_send_cmd()
244 if (readl_poll_timeout_atomic(host->regs + SDMMC_CMD, cmd_status, in mci_send_cmd()
255 struct dw_mci *host = slot->host; in dw_mci_prepare_command() local
277 WARN_ON(slot->host->state != STATE_SENDING_CMD); in dw_mci_prepare_command()
278 slot->host->state = STATE_SENDING_CMD11; in dw_mci_prepare_command()
291 clk_en_a = mci_readl(host, CLKENA); in dw_mci_prepare_command()
293 mci_writel(host, CLKENA, clk_en_a); in dw_mci_prepare_command()
320 static u32 dw_mci_prep_stop_abort(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_prep_stop_abort() argument
328 stop = &host->stop_abort; in dw_mci_prep_stop_abort()
353 if (!test_bit(DW_MMC_CARD_NO_USE_HOLD, &host->slot->flags)) in dw_mci_prep_stop_abort()
359 static inline void dw_mci_set_cto(struct dw_mci *host) in dw_mci_set_cto() argument
366 cto_clks = mci_readl(host, TMOUT) & 0xff; in dw_mci_set_cto()
367 cto_div = (mci_readl(host, CLKDIV) & 0xff) * 2; in dw_mci_set_cto()
372 host->bus_hz); in dw_mci_set_cto()
390 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_cto()
391 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_set_cto()
392 mod_timer(&host->cto_timer, in dw_mci_set_cto()
394 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_cto()
397 static void dw_mci_start_command(struct dw_mci *host, in dw_mci_start_command() argument
400 host->cmd = cmd; in dw_mci_start_command()
401 dev_vdbg(host->dev, in dw_mci_start_command()
405 mci_writel(host, CMDARG, cmd->arg); in dw_mci_start_command()
407 dw_mci_wait_while_busy(host, cmd_flags); in dw_mci_start_command()
409 mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); in dw_mci_start_command()
413 dw_mci_set_cto(host); in dw_mci_start_command()
416 static inline void send_stop_abort(struct dw_mci *host, struct mmc_data *data) in send_stop_abort() argument
418 struct mmc_command *stop = &host->stop_abort; in send_stop_abort()
420 dw_mci_start_command(host, stop, host->stop_cmdr); in send_stop_abort()
424 static void dw_mci_stop_dma(struct dw_mci *host) in dw_mci_stop_dma() argument
426 if (host->using_dma) { in dw_mci_stop_dma()
427 host->dma_ops->stop(host); in dw_mci_stop_dma()
428 host->dma_ops->cleanup(host); in dw_mci_stop_dma()
432 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_stop_dma()
435 static void dw_mci_dma_cleanup(struct dw_mci *host) in dw_mci_dma_cleanup() argument
437 struct mmc_data *data = host->data; in dw_mci_dma_cleanup()
440 dma_unmap_sg(host->dev, in dw_mci_dma_cleanup()
448 static void dw_mci_idmac_reset(struct dw_mci *host) in dw_mci_idmac_reset() argument
450 u32 bmod = mci_readl(host, BMOD); in dw_mci_idmac_reset()
453 mci_writel(host, BMOD, bmod); in dw_mci_idmac_reset()
456 static void dw_mci_idmac_stop_dma(struct dw_mci *host) in dw_mci_idmac_stop_dma() argument
461 temp = mci_readl(host, CTRL); in dw_mci_idmac_stop_dma()
464 mci_writel(host, CTRL, temp); in dw_mci_idmac_stop_dma()
467 temp = mci_readl(host, BMOD); in dw_mci_idmac_stop_dma()
470 mci_writel(host, BMOD, temp); in dw_mci_idmac_stop_dma()
475 struct dw_mci *host = arg; in dw_mci_dmac_complete_dma() local
476 struct mmc_data *data = host->data; in dw_mci_dmac_complete_dma()
478 dev_vdbg(host->dev, "DMA complete\n"); in dw_mci_dmac_complete_dma()
480 if ((host->use_dma == TRANS_MODE_EDMAC) && in dw_mci_dmac_complete_dma()
483 dma_sync_sg_for_cpu(mmc_dev(host->slot->mmc), in dw_mci_dmac_complete_dma()
488 host->dma_ops->cleanup(host); in dw_mci_dmac_complete_dma()
495 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_dmac_complete_dma()
496 queue_work(system_bh_wq, &host->bh_work); in dw_mci_dmac_complete_dma()
500 static int dw_mci_idmac_init(struct dw_mci *host) in dw_mci_idmac_init() argument
504 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
507 host->ring_size = in dw_mci_idmac_init()
511 for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; in dw_mci_idmac_init()
513 p->des6 = (host->sg_dma + in dw_mci_idmac_init()
517 p->des7 = (u64)(host->sg_dma + in dw_mci_idmac_init()
528 p->des6 = host->sg_dma & 0xffffffff; in dw_mci_idmac_init()
529 p->des7 = (u64)host->sg_dma >> 32; in dw_mci_idmac_init()
535 host->ring_size = in dw_mci_idmac_init()
539 for (i = 0, p = host->sg_cpu; in dw_mci_idmac_init()
540 i < host->ring_size - 1; in dw_mci_idmac_init()
542 p->des3 = cpu_to_le32(host->sg_dma + in dw_mci_idmac_init()
549 p->des3 = cpu_to_le32(host->sg_dma); in dw_mci_idmac_init()
553 dw_mci_idmac_reset(host); in dw_mci_idmac_init()
555 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
557 mci_writel(host, IDSTS64, IDMAC_INT_CLR); in dw_mci_idmac_init()
558 mci_writel(host, IDINTEN64, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
562 mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff); in dw_mci_idmac_init()
563 mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32); in dw_mci_idmac_init()
567 mci_writel(host, IDSTS, IDMAC_INT_CLR); in dw_mci_idmac_init()
568 mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
572 mci_writel(host, DBADDR, host->sg_dma); in dw_mci_idmac_init()
578 static inline int dw_mci_prepare_desc64(struct dw_mci *host, in dw_mci_prepare_desc64() argument
587 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc64()
643 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc64()
644 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc64()
645 dw_mci_idmac_init(host); in dw_mci_prepare_desc64()
650 static inline int dw_mci_prepare_desc32(struct dw_mci *host, in dw_mci_prepare_desc32() argument
659 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc32()
717 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc32()
718 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc32()
719 dw_mci_idmac_init(host); in dw_mci_prepare_desc32()
723 static int dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) in dw_mci_idmac_start_dma() argument
728 if (host->dma_64bit_address == 1) in dw_mci_idmac_start_dma()
729 ret = dw_mci_prepare_desc64(host, host->data, sg_len); in dw_mci_idmac_start_dma()
731 ret = dw_mci_prepare_desc32(host, host->data, sg_len); in dw_mci_idmac_start_dma()
740 dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET); in dw_mci_idmac_start_dma()
741 dw_mci_idmac_reset(host); in dw_mci_idmac_start_dma()
744 temp = mci_readl(host, CTRL); in dw_mci_idmac_start_dma()
746 mci_writel(host, CTRL, temp); in dw_mci_idmac_start_dma()
752 temp = mci_readl(host, BMOD); in dw_mci_idmac_start_dma()
754 mci_writel(host, BMOD, temp); in dw_mci_idmac_start_dma()
757 mci_writel(host, PLDMND, 1); in dw_mci_idmac_start_dma()
771 static void dw_mci_edmac_stop_dma(struct dw_mci *host) in dw_mci_edmac_stop_dma() argument
773 dmaengine_terminate_async(host->dms->ch); in dw_mci_edmac_stop_dma()
776 static int dw_mci_edmac_start_dma(struct dw_mci *host, in dw_mci_edmac_start_dma() argument
781 struct scatterlist *sgl = host->data->sg; in dw_mci_edmac_start_dma()
783 u32 sg_elems = host->data->sg_len; in dw_mci_edmac_start_dma()
785 u32 fifo_offset = host->fifo_reg - host->regs; in dw_mci_edmac_start_dma()
790 cfg.dst_addr = host->phy_regs + fifo_offset; in dw_mci_edmac_start_dma()
796 fifoth_val = mci_readl(host, FIFOTH); in dw_mci_edmac_start_dma()
800 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
805 ret = dmaengine_slave_config(host->dms->ch, &cfg); in dw_mci_edmac_start_dma()
807 dev_err(host->dev, "Failed to config edmac.\n"); in dw_mci_edmac_start_dma()
811 desc = dmaengine_prep_slave_sg(host->dms->ch, sgl, in dw_mci_edmac_start_dma()
815 dev_err(host->dev, "Can't prepare slave sg.\n"); in dw_mci_edmac_start_dma()
821 desc->callback_param = (void *)host; in dw_mci_edmac_start_dma()
825 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
826 dma_sync_sg_for_device(mmc_dev(host->slot->mmc), sgl, in dw_mci_edmac_start_dma()
829 dma_async_issue_pending(host->dms->ch); in dw_mci_edmac_start_dma()
834 static int dw_mci_edmac_init(struct dw_mci *host) in dw_mci_edmac_init() argument
837 host->dms = kzalloc(sizeof(struct dw_mci_dma_slave), GFP_KERNEL); in dw_mci_edmac_init()
838 if (!host->dms) in dw_mci_edmac_init()
841 host->dms->ch = dma_request_chan(host->dev, "rx-tx"); in dw_mci_edmac_init()
842 if (IS_ERR(host->dms->ch)) { in dw_mci_edmac_init()
843 int ret = PTR_ERR(host->dms->ch); in dw_mci_edmac_init()
845 dev_err(host->dev, "Failed to get external DMA channel.\n"); in dw_mci_edmac_init()
846 kfree(host->dms); in dw_mci_edmac_init()
847 host->dms = NULL; in dw_mci_edmac_init()
854 static void dw_mci_edmac_exit(struct dw_mci *host) in dw_mci_edmac_exit() argument
856 if (host->dms) { in dw_mci_edmac_exit()
857 if (host->dms->ch) { in dw_mci_edmac_exit()
858 dma_release_channel(host->dms->ch); in dw_mci_edmac_exit()
859 host->dms->ch = NULL; in dw_mci_edmac_exit()
861 kfree(host->dms); in dw_mci_edmac_exit()
862 host->dms = NULL; in dw_mci_edmac_exit()
875 static int dw_mci_pre_dma_transfer(struct dw_mci *host, in dw_mci_pre_dma_transfer() argument
901 sg_len = dma_map_sg(host->dev, in dw_mci_pre_dma_transfer()
919 if (!slot->host->use_dma || !data) in dw_mci_pre_req()
925 if (dw_mci_pre_dma_transfer(slot->host, mrq->data, in dw_mci_pre_req()
937 if (!slot->host->use_dma || !data) in dw_mci_post_req()
941 dma_unmap_sg(slot->host->dev, in dw_mci_post_req()
952 struct dw_mci *host = slot->host; in dw_mci_get_cd() local
975 present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) in dw_mci_get_cd()
978 spin_lock_bh(&host->lock); in dw_mci_get_cd()
984 spin_unlock_bh(&host->lock); in dw_mci_get_cd()
989 static void dw_mci_adjust_fifoth(struct dw_mci *host, struct mmc_data *data) in dw_mci_adjust_fifoth() argument
993 u32 fifo_width = 1 << host->data_shift; in dw_mci_adjust_fifoth()
999 if (!host->use_dma) in dw_mci_adjust_fifoth()
1002 tx_wmark = (host->fifo_depth) / 2; in dw_mci_adjust_fifoth()
1003 tx_wmark_invers = host->fifo_depth - tx_wmark; in dw_mci_adjust_fifoth()
1026 mci_writel(host, FIFOTH, fifoth_val); in dw_mci_adjust_fifoth()
1029 static void dw_mci_ctrl_thld(struct dw_mci *host, struct mmc_data *data) in dw_mci_ctrl_thld() argument
1040 if (host->verid < DW_MMC_240A || in dw_mci_ctrl_thld()
1041 (host->verid < DW_MMC_280A && data->flags & MMC_DATA_WRITE)) in dw_mci_ctrl_thld()
1049 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1057 if (host->timing != MMC_TIMING_MMC_HS200 && in dw_mci_ctrl_thld()
1058 host->timing != MMC_TIMING_UHS_SDR104 && in dw_mci_ctrl_thld()
1059 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1062 blksz_depth = blksz / (1 << host->data_shift); in dw_mci_ctrl_thld()
1063 fifo_depth = host->fifo_depth; in dw_mci_ctrl_thld()
1074 mci_writel(host, CDTHRCTL, SDMMC_SET_THLD(thld_size, enable)); in dw_mci_ctrl_thld()
1078 mci_writel(host, CDTHRCTL, 0); in dw_mci_ctrl_thld()
1081 static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) in dw_mci_submit_data_dma() argument
1087 host->using_dma = 0; in dw_mci_submit_data_dma()
1090 if (!host->use_dma) in dw_mci_submit_data_dma()
1093 sg_len = dw_mci_pre_dma_transfer(host, data, COOKIE_MAPPED); in dw_mci_submit_data_dma()
1095 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1099 host->using_dma = 1; in dw_mci_submit_data_dma()
1101 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_submit_data_dma()
1102 dev_vdbg(host->dev, in dw_mci_submit_data_dma()
1104 (unsigned long)host->sg_cpu, in dw_mci_submit_data_dma()
1105 (unsigned long)host->sg_dma, in dw_mci_submit_data_dma()
1113 if (host->prev_blksz != data->blksz) in dw_mci_submit_data_dma()
1114 dw_mci_adjust_fifoth(host, data); in dw_mci_submit_data_dma()
1117 temp = mci_readl(host, CTRL); in dw_mci_submit_data_dma()
1119 mci_writel(host, CTRL, temp); in dw_mci_submit_data_dma()
1122 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1123 temp = mci_readl(host, INTMASK); in dw_mci_submit_data_dma()
1125 mci_writel(host, INTMASK, temp); in dw_mci_submit_data_dma()
1126 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1128 if (host->dma_ops->start(host, sg_len)) { in dw_mci_submit_data_dma()
1129 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1131 dev_dbg(host->dev, in dw_mci_submit_data_dma()
1140 static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) in dw_mci_submit_data() argument
1148 WARN_ON(host->data); in dw_mci_submit_data()
1149 host->sg = NULL; in dw_mci_submit_data()
1150 host->data = data; in dw_mci_submit_data()
1153 host->dir_status = DW_MCI_RECV_STATUS; in dw_mci_submit_data()
1155 host->dir_status = DW_MCI_SEND_STATUS; in dw_mci_submit_data()
1157 dw_mci_ctrl_thld(host, data); in dw_mci_submit_data()
1159 if (dw_mci_submit_data_dma(host, data)) { in dw_mci_submit_data()
1160 if (host->data->flags & MMC_DATA_READ) in dw_mci_submit_data()
1165 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in dw_mci_submit_data()
1166 host->sg = data->sg; in dw_mci_submit_data()
1167 host->part_buf_start = 0; in dw_mci_submit_data()
1168 host->part_buf_count = 0; in dw_mci_submit_data()
1170 mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); in dw_mci_submit_data()
1172 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data()
1173 temp = mci_readl(host, INTMASK); in dw_mci_submit_data()
1175 mci_writel(host, INTMASK, temp); in dw_mci_submit_data()
1176 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data()
1178 temp = mci_readl(host, CTRL); in dw_mci_submit_data()
1180 mci_writel(host, CTRL, temp); in dw_mci_submit_data()
1188 if (host->wm_aligned) in dw_mci_submit_data()
1189 dw_mci_adjust_fifoth(host, data); in dw_mci_submit_data()
1191 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_submit_data()
1192 host->prev_blksz = 0; in dw_mci_submit_data()
1199 host->prev_blksz = data->blksz; in dw_mci_submit_data()
1205 struct dw_mci *host = slot->host; in dw_mci_setup_bus() local
1212 if (host->state == STATE_WAITING_CMD11_DONE) in dw_mci_setup_bus()
1218 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1220 } else if (clock != host->current_speed || force_clkinit) { in dw_mci_setup_bus()
1221 div = host->bus_hz / clock; in dw_mci_setup_bus()
1222 if (host->bus_hz % clock && host->bus_hz > clock) in dw_mci_setup_bus()
1229 div = (host->bus_hz != clock) ? DIV_ROUND_UP(div, 2) : 0; in dw_mci_setup_bus()
1238 slot->id, host->bus_hz, clock, in dw_mci_setup_bus()
1239 div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1240 host->bus_hz, div); in dw_mci_setup_bus()
1252 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1253 mci_writel(host, CLKSRC, 0); in dw_mci_setup_bus()
1259 mci_writel(host, CLKDIV, div); in dw_mci_setup_bus()
1268 mci_writel(host, CLKENA, clk_en_a); in dw_mci_setup_bus()
1275 slot->mmc->actual_clock = div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1276 host->bus_hz; in dw_mci_setup_bus()
1279 host->current_speed = clock; in dw_mci_setup_bus()
1282 mci_writel(host, CTYPE, (slot->ctype << slot->id)); in dw_mci_setup_bus()
1285 static void dw_mci_set_data_timeout(struct dw_mci *host, in dw_mci_set_data_timeout() argument
1288 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_set_data_timeout()
1293 return drv_data->set_data_timeout(host, timeout_ns); in dw_mci_set_data_timeout()
1295 clk_div = (mci_readl(host, CLKDIV) & 0xFF) * 2; in dw_mci_set_data_timeout()
1299 tmp = DIV_ROUND_UP_ULL((u64)timeout_ns * host->bus_hz, NSEC_PER_SEC); in dw_mci_set_data_timeout()
1311 mci_writel(host, TMOUT, tmout); in dw_mci_set_data_timeout()
1312 dev_dbg(host->dev, "timeout_ns: %u => TMOUT[31:8]: %#08x", in dw_mci_set_data_timeout()
1316 static void __dw_mci_start_request(struct dw_mci *host, in __dw_mci_start_request() argument
1326 host->mrq = mrq; in __dw_mci_start_request()
1328 host->pending_events = 0; in __dw_mci_start_request()
1329 host->completed_events = 0; in __dw_mci_start_request()
1330 host->cmd_status = 0; in __dw_mci_start_request()
1331 host->data_status = 0; in __dw_mci_start_request()
1332 host->dir_status = 0; in __dw_mci_start_request()
1336 dw_mci_set_data_timeout(host, data->timeout_ns); in __dw_mci_start_request()
1337 mci_writel(host, BYTCNT, data->blksz*data->blocks); in __dw_mci_start_request()
1338 mci_writel(host, BLKSIZ, data->blksz); in __dw_mci_start_request()
1348 dw_mci_submit_data(host, data); in __dw_mci_start_request()
1352 dw_mci_start_command(host, cmd, cmdflags); in __dw_mci_start_request()
1367 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_start_request()
1368 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in __dw_mci_start_request()
1369 mod_timer(&host->cmd11_timer, in __dw_mci_start_request()
1371 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_start_request()
1374 host->stop_cmdr = dw_mci_prep_stop_abort(host, cmd); in __dw_mci_start_request()
1377 static void dw_mci_start_request(struct dw_mci *host, in dw_mci_start_request() argument
1384 __dw_mci_start_request(host, slot, cmd); in dw_mci_start_request()
1387 /* must be called with host->lock held */
1388 static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, in dw_mci_queue_request() argument
1392 host->state); in dw_mci_queue_request()
1396 if (host->state == STATE_WAITING_CMD11_DONE) { in dw_mci_queue_request()
1404 host->state = STATE_IDLE; in dw_mci_queue_request()
1407 if (host->state == STATE_IDLE) { in dw_mci_queue_request()
1408 host->state = STATE_SENDING_CMD; in dw_mci_queue_request()
1409 dw_mci_start_request(host, slot); in dw_mci_queue_request()
1411 list_add_tail(&slot->queue_node, &host->queue); in dw_mci_queue_request()
1418 struct dw_mci *host = slot->host; in dw_mci_request() local
1434 spin_lock_bh(&host->lock); in dw_mci_request()
1436 dw_mci_queue_request(host, slot, mrq); in dw_mci_request()
1438 spin_unlock_bh(&host->lock); in dw_mci_request()
1444 const struct dw_mci_drv_data *drv_data = slot->host->drv_data; in dw_mci_set_ios()
1460 regs = mci_readl(slot->host, UHS_REG); in dw_mci_set_ios()
1470 mci_writel(slot->host, UHS_REG, regs); in dw_mci_set_ios()
1471 slot->host->timing = ios->timing; in dw_mci_set_ios()
1480 drv_data->set_ios(slot->host, ios); in dw_mci_set_ios()
1488 dev_err(slot->host->dev, in dw_mci_set_ios()
1495 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1497 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1500 if (!slot->host->vqmmc_enabled) { in dw_mci_set_ios()
1504 dev_err(slot->host->dev, in dw_mci_set_ios()
1507 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1511 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1515 dw_mci_ctrl_reset(slot->host, in dw_mci_set_ios()
1530 if (!IS_ERR(mmc->supply.vqmmc) && slot->host->vqmmc_enabled) in dw_mci_set_ios()
1532 slot->host->vqmmc_enabled = false; in dw_mci_set_ios()
1534 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1536 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1542 if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0) in dw_mci_set_ios()
1543 slot->host->state = STATE_IDLE; in dw_mci_set_ios()
1555 status = mci_readl(slot->host, STATUS); in dw_mci_card_busy()
1563 struct dw_mci *host = slot->host; in dw_mci_switch_voltage() local
1564 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_switch_voltage()
1577 uhs = mci_readl(host, UHS_REG); in dw_mci_switch_voltage()
1592 mci_writel(host, UHS_REG, uhs); in dw_mci_switch_voltage()
1608 mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; in dw_mci_get_ro()
1619 struct dw_mci *host = slot->host; in dw_mci_hw_reset() local
1620 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_hw_reset()
1623 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_hw_reset()
1624 dw_mci_idmac_reset(host); in dw_mci_hw_reset()
1626 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET | in dw_mci_hw_reset()
1631 drv_data->hw_reset(host); in dw_mci_hw_reset()
1641 reset = mci_readl(host, RST_N); in dw_mci_hw_reset()
1643 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1646 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1652 struct dw_mci *host = slot->host; in dw_mci_prepare_sdio_irq() local
1663 clk_en_a_old = mci_readl(host, CLKENA); in dw_mci_prepare_sdio_irq()
1673 mci_writel(host, CLKENA, clk_en_a); in dw_mci_prepare_sdio_irq()
1681 struct dw_mci *host = slot->host; in __dw_mci_enable_sdio_irq() local
1685 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1688 int_mask = mci_readl(host, INTMASK); in __dw_mci_enable_sdio_irq()
1693 mci_writel(host, INTMASK, int_mask); in __dw_mci_enable_sdio_irq()
1695 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1701 struct dw_mci *host = slot->host; in dw_mci_enable_sdio_irq() local
1708 pm_runtime_get_noresume(host->dev); in dw_mci_enable_sdio_irq()
1710 pm_runtime_put_noidle(host->dev); in dw_mci_enable_sdio_irq()
1723 struct dw_mci *host = slot->host; in dw_mci_execute_tuning() local
1724 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_execute_tuning()
1736 struct dw_mci *host = slot->host; in dw_mci_prepare_hs400_tuning() local
1737 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_prepare_hs400_tuning()
1740 return drv_data->prepare_hs400_tuning(host, ios); in dw_mci_prepare_hs400_tuning()
1745 static bool dw_mci_reset(struct dw_mci *host) in dw_mci_reset() argument
1755 if (host->sg) { in dw_mci_reset()
1756 sg_miter_stop(&host->sg_miter); in dw_mci_reset()
1757 host->sg = NULL; in dw_mci_reset()
1760 if (host->use_dma) in dw_mci_reset()
1763 if (dw_mci_ctrl_reset(host, flags)) { in dw_mci_reset()
1768 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_reset()
1770 if (!host->use_dma) { in dw_mci_reset()
1776 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_reset()
1780 dev_err(host->dev, in dw_mci_reset()
1787 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_FIFO_RESET)) in dw_mci_reset()
1791 if (!(mci_readl(host, CTRL) & SDMMC_CTRL_RESET)) { in dw_mci_reset()
1792 dev_err(host->dev, in dw_mci_reset()
1799 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_reset()
1801 dw_mci_idmac_init(host); in dw_mci_reset()
1807 mci_send_cmd(host->slot, SDMMC_CMD_UPD_CLK, 0); in dw_mci_reset()
1831 struct dw_mci *host = container_of(t, struct dw_mci, fault_timer); in dw_mci_fault_timer() local
1834 spin_lock_irqsave(&host->irq_lock, flags); in dw_mci_fault_timer()
1840 if (!host->data_status) { in dw_mci_fault_timer()
1841 host->data_status = SDMMC_INT_DCRC; in dw_mci_fault_timer()
1842 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_fault_timer()
1843 queue_work(system_bh_wq, &host->bh_work); in dw_mci_fault_timer()
1846 spin_unlock_irqrestore(&host->irq_lock, flags); in dw_mci_fault_timer()
1851 static void dw_mci_start_fault_timer(struct dw_mci *host) in dw_mci_start_fault_timer() argument
1853 struct mmc_data *data = host->data; in dw_mci_start_fault_timer()
1858 if (!should_fail(&host->fail_data_crc, 1)) in dw_mci_start_fault_timer()
1864 hrtimer_start(&host->fault_timer, in dw_mci_start_fault_timer()
1869 static void dw_mci_stop_fault_timer(struct dw_mci *host) in dw_mci_stop_fault_timer() argument
1871 hrtimer_cancel(&host->fault_timer); in dw_mci_stop_fault_timer()
1874 static void dw_mci_init_fault(struct dw_mci *host) in dw_mci_init_fault() argument
1876 host->fail_data_crc = (struct fault_attr) FAULT_ATTR_INITIALIZER; in dw_mci_init_fault()
1878 hrtimer_init(&host->fault_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); in dw_mci_init_fault()
1879 host->fault_timer.function = dw_mci_fault_timer; in dw_mci_init_fault()
1882 static void dw_mci_init_fault(struct dw_mci *host) in dw_mci_init_fault() argument
1886 static void dw_mci_start_fault_timer(struct dw_mci *host) in dw_mci_start_fault_timer() argument
1890 static void dw_mci_stop_fault_timer(struct dw_mci *host) in dw_mci_stop_fault_timer() argument
1895 static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) in dw_mci_request_end() argument
1896 __releases(&host->lock) in dw_mci_request_end()
1897 __acquires(&host->lock) in dw_mci_request_end()
1900 struct mmc_host *prev_mmc = host->slot->mmc; in dw_mci_request_end()
1902 WARN_ON(host->cmd || host->data); in dw_mci_request_end()
1904 host->slot->mrq = NULL; in dw_mci_request_end()
1905 host->mrq = NULL; in dw_mci_request_end()
1906 if (!list_empty(&host->queue)) { in dw_mci_request_end()
1907 slot = list_entry(host->queue.next, in dw_mci_request_end()
1910 dev_vdbg(host->dev, "list not empty: %s is next\n", in dw_mci_request_end()
1912 host->state = STATE_SENDING_CMD; in dw_mci_request_end()
1913 dw_mci_start_request(host, slot); in dw_mci_request_end()
1915 dev_vdbg(host->dev, "list empty\n"); in dw_mci_request_end()
1917 if (host->state == STATE_SENDING_CMD11) in dw_mci_request_end()
1918 host->state = STATE_WAITING_CMD11_DONE; in dw_mci_request_end()
1920 host->state = STATE_IDLE; in dw_mci_request_end()
1923 spin_unlock(&host->lock); in dw_mci_request_end()
1925 spin_lock(&host->lock); in dw_mci_request_end()
1928 static int dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_command_complete() argument
1930 u32 status = host->cmd_status; in dw_mci_command_complete()
1932 host->cmd_status = 0; in dw_mci_command_complete()
1937 cmd->resp[3] = mci_readl(host, RESP0); in dw_mci_command_complete()
1938 cmd->resp[2] = mci_readl(host, RESP1); in dw_mci_command_complete()
1939 cmd->resp[1] = mci_readl(host, RESP2); in dw_mci_command_complete()
1940 cmd->resp[0] = mci_readl(host, RESP3); in dw_mci_command_complete()
1942 cmd->resp[0] = mci_readl(host, RESP0); in dw_mci_command_complete()
1961 static int dw_mci_data_complete(struct dw_mci *host, struct mmc_data *data) in dw_mci_data_complete() argument
1963 u32 status = host->data_status; in dw_mci_data_complete()
1971 if (host->dir_status == in dw_mci_data_complete()
1980 } else if (host->dir_status == in dw_mci_data_complete()
1989 dev_dbg(host->dev, "data error, status 0x%08x\n", status); in dw_mci_data_complete()
1995 dw_mci_reset(host); in dw_mci_data_complete()
2004 static void dw_mci_set_drto(struct dw_mci *host) in dw_mci_set_drto() argument
2006 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_set_drto()
2013 drto_clks = drv_data->get_drto_clks(host); in dw_mci_set_drto()
2015 drto_clks = mci_readl(host, TMOUT) >> 8; in dw_mci_set_drto()
2016 drto_div = (mci_readl(host, CLKDIV) & 0xff) * 2; in dw_mci_set_drto()
2021 host->bus_hz); in dw_mci_set_drto()
2023 dev_dbg(host->dev, "drto_ms: %u\n", drto_ms); in dw_mci_set_drto()
2028 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_drto()
2029 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_set_drto()
2030 mod_timer(&host->dto_timer, in dw_mci_set_drto()
2032 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_drto()
2035 static bool dw_mci_clear_pending_cmd_complete(struct dw_mci *host) in dw_mci_clear_pending_cmd_complete() argument
2037 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_cmd_complete()
2047 WARN_ON(del_timer_sync(&host->cto_timer)); in dw_mci_clear_pending_cmd_complete()
2048 clear_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_clear_pending_cmd_complete()
2053 static bool dw_mci_clear_pending_data_complete(struct dw_mci *host) in dw_mci_clear_pending_data_complete() argument
2055 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_data_complete()
2059 WARN_ON(del_timer_sync(&host->dto_timer)); in dw_mci_clear_pending_data_complete()
2060 clear_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_clear_pending_data_complete()
2067 struct dw_mci *host = from_work(host, t, bh_work); in dw_mci_work_func() local
2075 spin_lock(&host->lock); in dw_mci_work_func()
2077 state = host->state; in dw_mci_work_func()
2078 data = host->data; in dw_mci_work_func()
2079 mrq = host->mrq; in dw_mci_work_func()
2091 if (!dw_mci_clear_pending_cmd_complete(host)) in dw_mci_work_func()
2094 cmd = host->cmd; in dw_mci_work_func()
2095 host->cmd = NULL; in dw_mci_work_func()
2096 set_bit(EVENT_CMD_COMPLETE, &host->completed_events); in dw_mci_work_func()
2097 err = dw_mci_command_complete(host, cmd); in dw_mci_work_func()
2099 __dw_mci_start_request(host, host->slot, in dw_mci_work_func()
2127 host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_work_func()
2132 send_stop_abort(host, data); in dw_mci_work_func()
2133 dw_mci_stop_dma(host); in dw_mci_work_func()
2139 dw_mci_request_end(host, mrq); in dw_mci_work_func()
2156 &host->pending_events)) { in dw_mci_work_func()
2157 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_work_func()
2159 send_stop_abort(host, data); in dw_mci_work_func()
2160 dw_mci_stop_dma(host); in dw_mci_work_func()
2166 &host->pending_events)) { in dw_mci_work_func()
2171 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_work_func()
2172 dw_mci_set_drto(host); in dw_mci_work_func()
2176 set_bit(EVENT_XFER_COMPLETE, &host->completed_events); in dw_mci_work_func()
2192 &host->pending_events)) { in dw_mci_work_func()
2193 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_work_func()
2195 send_stop_abort(host, data); in dw_mci_work_func()
2196 dw_mci_stop_dma(host); in dw_mci_work_func()
2205 if (!dw_mci_clear_pending_data_complete(host)) { in dw_mci_work_func()
2211 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_work_func()
2212 dw_mci_set_drto(host); in dw_mci_work_func()
2216 dw_mci_stop_fault_timer(host); in dw_mci_work_func()
2217 host->data = NULL; in dw_mci_work_func()
2218 set_bit(EVENT_DATA_COMPLETE, &host->completed_events); in dw_mci_work_func()
2219 err = dw_mci_data_complete(host, data); in dw_mci_work_func()
2225 dw_mci_request_end(host, mrq); in dw_mci_work_func()
2231 send_stop_abort(host, data); in dw_mci_work_func()
2243 &host->pending_events)) { in dw_mci_work_func()
2244 host->cmd = NULL; in dw_mci_work_func()
2245 dw_mci_request_end(host, mrq); in dw_mci_work_func()
2259 if (!dw_mci_clear_pending_cmd_complete(host)) in dw_mci_work_func()
2264 dw_mci_reset(host); in dw_mci_work_func()
2266 dw_mci_stop_fault_timer(host); in dw_mci_work_func()
2267 host->cmd = NULL; in dw_mci_work_func()
2268 host->data = NULL; in dw_mci_work_func()
2271 dw_mci_command_complete(host, mrq->stop); in dw_mci_work_func()
2273 host->cmd_status = 0; in dw_mci_work_func()
2275 dw_mci_request_end(host, mrq); in dw_mci_work_func()
2280 &host->pending_events)) in dw_mci_work_func()
2288 host->state = state; in dw_mci_work_func()
2290 spin_unlock(&host->lock); in dw_mci_work_func()
2295 static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_set_part_bytes() argument
2297 memcpy((void *)&host->part_buf, buf, cnt); in dw_mci_set_part_bytes()
2298 host->part_buf_count = cnt; in dw_mci_set_part_bytes()
2302 static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_part_bytes() argument
2304 cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); in dw_mci_push_part_bytes()
2305 memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); in dw_mci_push_part_bytes()
2306 host->part_buf_count += cnt; in dw_mci_push_part_bytes()
2311 static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_part_bytes() argument
2313 cnt = min_t(int, cnt, host->part_buf_count); in dw_mci_pull_part_bytes()
2315 memcpy(buf, (void *)&host->part_buf + host->part_buf_start, in dw_mci_pull_part_bytes()
2317 host->part_buf_count -= cnt; in dw_mci_pull_part_bytes()
2318 host->part_buf_start += cnt; in dw_mci_pull_part_bytes()
2324 static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_final_bytes() argument
2326 memcpy(buf, &host->part_buf, cnt); in dw_mci_pull_final_bytes()
2327 host->part_buf_start = cnt; in dw_mci_pull_final_bytes()
2328 host->part_buf_count = (1 << host->data_shift) - cnt; in dw_mci_pull_final_bytes()
2331 static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data16() argument
2333 struct mmc_data *data = host->data; in dw_mci_push_data16()
2337 if (unlikely(host->part_buf_count)) { in dw_mci_push_data16()
2338 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data16()
2342 if (host->part_buf_count == 2) { in dw_mci_push_data16()
2343 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2344 host->part_buf_count = 0; in dw_mci_push_data16()
2360 mci_fifo_writew(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data16()
2368 mci_fifo_writew(host->fifo_reg, *pdata++); in dw_mci_push_data16()
2373 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data16()
2377 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2381 static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data16() argument
2393 aligned_buf[i] = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2405 *pdata++ = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2409 host->part_buf16 = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2410 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data16()
2414 static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data32() argument
2416 struct mmc_data *data = host->data; in dw_mci_push_data32()
2420 if (unlikely(host->part_buf_count)) { in dw_mci_push_data32()
2421 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data32()
2425 if (host->part_buf_count == 4) { in dw_mci_push_data32()
2426 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2427 host->part_buf_count = 0; in dw_mci_push_data32()
2443 mci_fifo_writel(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data32()
2451 mci_fifo_writel(host->fifo_reg, *pdata++); in dw_mci_push_data32()
2456 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data32()
2460 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2464 static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data32() argument
2476 aligned_buf[i] = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2488 *pdata++ = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2492 host->part_buf32 = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2493 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data32()
2497 static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data64() argument
2499 struct mmc_data *data = host->data; in dw_mci_push_data64()
2503 if (unlikely(host->part_buf_count)) { in dw_mci_push_data64()
2504 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data64()
2509 if (host->part_buf_count == 8) { in dw_mci_push_data64()
2510 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2511 host->part_buf_count = 0; in dw_mci_push_data64()
2527 mci_fifo_writeq(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data64()
2535 mci_fifo_writeq(host->fifo_reg, *pdata++); in dw_mci_push_data64()
2540 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data64()
2544 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2548 static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data64() argument
2560 aligned_buf[i] = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2573 *pdata++ = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2577 host->part_buf = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2578 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data64()
2582 static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data() argument
2587 len = dw_mci_pull_part_bytes(host, buf, cnt); in dw_mci_pull_data()
2594 host->pull_data(host, buf, cnt); in dw_mci_pull_data()
2597 static void dw_mci_read_data_pio(struct dw_mci *host, bool dto) in dw_mci_read_data_pio() argument
2599 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_read_data_pio()
2602 struct mmc_data *data = host->data; in dw_mci_read_data_pio()
2603 int shift = host->data_shift; in dw_mci_read_data_pio()
2612 host->sg = sg_miter->piter.sg; in dw_mci_read_data_pio()
2618 fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS)) in dw_mci_read_data_pio()
2619 << shift) + host->part_buf_count; in dw_mci_read_data_pio()
2623 dw_mci_pull_data(host, (void *)(buf + offset), len); in dw_mci_read_data_pio()
2630 status = mci_readl(host, MINTSTS); in dw_mci_read_data_pio()
2631 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_read_data_pio()
2634 (dto && SDMMC_GET_FCNT(mci_readl(host, STATUS)))); in dw_mci_read_data_pio()
2646 host->sg = NULL; in dw_mci_read_data_pio()
2648 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_read_data_pio()
2651 static void dw_mci_write_data_pio(struct dw_mci *host) in dw_mci_write_data_pio() argument
2653 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_write_data_pio()
2656 struct mmc_data *data = host->data; in dw_mci_write_data_pio()
2657 int shift = host->data_shift; in dw_mci_write_data_pio()
2660 unsigned int fifo_depth = host->fifo_depth; in dw_mci_write_data_pio()
2667 host->sg = sg_miter->piter.sg; in dw_mci_write_data_pio()
2674 SDMMC_GET_FCNT(mci_readl(host, STATUS))) in dw_mci_write_data_pio()
2675 << shift) - host->part_buf_count; in dw_mci_write_data_pio()
2679 host->push_data(host, (void *)(buf + offset), len); in dw_mci_write_data_pio()
2686 status = mci_readl(host, MINTSTS); in dw_mci_write_data_pio()
2687 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_write_data_pio()
2700 host->sg = NULL; in dw_mci_write_data_pio()
2702 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_write_data_pio()
2705 static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) in dw_mci_cmd_interrupt() argument
2707 del_timer(&host->cto_timer); in dw_mci_cmd_interrupt()
2709 if (!host->cmd_status) in dw_mci_cmd_interrupt()
2710 host->cmd_status = status; in dw_mci_cmd_interrupt()
2714 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd_interrupt()
2715 queue_work(system_bh_wq, &host->bh_work); in dw_mci_cmd_interrupt()
2717 dw_mci_start_fault_timer(host); in dw_mci_cmd_interrupt()
2720 static void dw_mci_handle_cd(struct dw_mci *host) in dw_mci_handle_cd() argument
2722 struct dw_mci_slot *slot = host->slot; in dw_mci_handle_cd()
2725 msecs_to_jiffies(host->pdata->detect_delay_ms)); in dw_mci_handle_cd()
2730 struct dw_mci *host = dev_id; in dw_mci_interrupt() local
2732 struct dw_mci_slot *slot = host->slot; in dw_mci_interrupt()
2734 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_interrupt()
2738 if ((host->state == STATE_SENDING_CMD11) && in dw_mci_interrupt()
2740 mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH); in dw_mci_interrupt()
2747 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2748 dw_mci_cmd_interrupt(host, pending); in dw_mci_interrupt()
2749 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2751 del_timer(&host->cmd11_timer); in dw_mci_interrupt()
2755 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2757 del_timer(&host->cto_timer); in dw_mci_interrupt()
2758 mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); in dw_mci_interrupt()
2759 host->cmd_status = pending; in dw_mci_interrupt()
2761 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2763 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2767 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2769 if (host->quirks & DW_MMC_QUIRK_EXTENDED_TMOUT) in dw_mci_interrupt()
2770 del_timer(&host->dto_timer); in dw_mci_interrupt()
2773 mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); in dw_mci_interrupt()
2774 host->data_status = pending; in dw_mci_interrupt()
2776 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_interrupt()
2778 if (host->quirks & DW_MMC_QUIRK_EXTENDED_TMOUT) in dw_mci_interrupt()
2781 &host->pending_events); in dw_mci_interrupt()
2783 queue_work(system_bh_wq, &host->bh_work); in dw_mci_interrupt()
2785 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2789 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2791 del_timer(&host->dto_timer); in dw_mci_interrupt()
2793 mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); in dw_mci_interrupt()
2794 if (!host->data_status) in dw_mci_interrupt()
2795 host->data_status = pending; in dw_mci_interrupt()
2797 if (host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_interrupt()
2798 if (host->sg != NULL) in dw_mci_interrupt()
2799 dw_mci_read_data_pio(host, true); in dw_mci_interrupt()
2801 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2802 queue_work(system_bh_wq, &host->bh_work); in dw_mci_interrupt()
2804 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2808 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_interrupt()
2809 if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) in dw_mci_interrupt()
2810 dw_mci_read_data_pio(host, false); in dw_mci_interrupt()
2814 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_interrupt()
2815 if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) in dw_mci_interrupt()
2816 dw_mci_write_data_pio(host); in dw_mci_interrupt()
2820 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2822 mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); in dw_mci_interrupt()
2823 dw_mci_cmd_interrupt(host, pending); in dw_mci_interrupt()
2825 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2829 mci_writel(host, RINTSTS, SDMMC_INT_CD); in dw_mci_interrupt()
2830 dw_mci_handle_cd(host); in dw_mci_interrupt()
2834 mci_writel(host, RINTSTS, in dw_mci_interrupt()
2842 if (host->use_dma != TRANS_MODE_IDMAC) in dw_mci_interrupt()
2846 if (host->dma_64bit_address == 1) { in dw_mci_interrupt()
2847 pending = mci_readl(host, IDSTS64); in dw_mci_interrupt()
2849 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2851 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
2852 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2853 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2856 pending = mci_readl(host, IDSTS); in dw_mci_interrupt()
2858 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2860 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
2861 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2862 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2871 struct dw_mci *host = slot->host; in dw_mci_init_slot_caps() local
2872 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_init_slot_caps()
2876 if (host->pdata->caps) in dw_mci_init_slot_caps()
2877 mmc->caps = host->pdata->caps; in dw_mci_init_slot_caps()
2879 if (host->pdata->pm_caps) in dw_mci_init_slot_caps()
2880 mmc->pm_caps = host->pdata->pm_caps; in dw_mci_init_slot_caps()
2885 if (host->dev->of_node) { in dw_mci_init_slot_caps()
2886 ctrl_id = of_alias_get_id(host->dev->of_node, "mshc"); in dw_mci_init_slot_caps()
2890 ctrl_id = to_platform_device(host->dev)->id; in dw_mci_init_slot_caps()
2895 dev_err(host->dev, "invalid controller id %d\n", in dw_mci_init_slot_caps()
2902 if (host->pdata->caps2) in dw_mci_init_slot_caps()
2903 mmc->caps2 = host->pdata->caps2; in dw_mci_init_slot_caps()
2905 /* if host has set a minimum_freq, we should respect it */ in dw_mci_init_slot_caps()
2906 if (host->minimum_speed) in dw_mci_init_slot_caps()
2907 mmc->f_min = host->minimum_speed; in dw_mci_init_slot_caps()
2921 static int dw_mci_init_slot(struct dw_mci *host) in dw_mci_init_slot() argument
2927 mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev); in dw_mci_init_slot()
2933 slot->sdio_id = host->sdio_id0 + slot->id; in dw_mci_init_slot()
2935 slot->host = host; in dw_mci_init_slot()
2936 host->slot = slot; in dw_mci_init_slot()
2957 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_slot()
2958 mmc->max_segs = host->ring_size; in dw_mci_init_slot()
2961 mmc->max_req_size = mmc->max_seg_size * host->ring_size; in dw_mci_init_slot()
2963 } else if (host->use_dma == TRANS_MODE_EDMAC) { in dw_mci_init_slot()
3001 slot->host->slot = NULL; in dw_mci_cleanup_slot()
3005 static void dw_mci_init_dma(struct dw_mci *host) in dw_mci_init_dma() argument
3008 struct device *dev = host->dev; in dw_mci_init_dma()
3021 host->use_dma = SDMMC_GET_TRANS_MODE(mci_readl(host, HCON)); in dw_mci_init_dma()
3022 if (host->use_dma == DMA_INTERFACE_IDMA) { in dw_mci_init_dma()
3023 host->use_dma = TRANS_MODE_IDMAC; in dw_mci_init_dma()
3024 } else if (host->use_dma == DMA_INTERFACE_DWDMA || in dw_mci_init_dma()
3025 host->use_dma == DMA_INTERFACE_GDMA) { in dw_mci_init_dma()
3026 host->use_dma = TRANS_MODE_EDMAC; in dw_mci_init_dma()
3032 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_dma()
3037 addr_config = SDMMC_GET_ADDR_CONFIG(mci_readl(host, HCON)); in dw_mci_init_dma()
3040 /* host supports IDMAC in 64-bit address mode */ in dw_mci_init_dma()
3041 host->dma_64bit_address = 1; in dw_mci_init_dma()
3042 dev_info(host->dev, in dw_mci_init_dma()
3044 if (!dma_set_mask(host->dev, DMA_BIT_MASK(64))) in dw_mci_init_dma()
3045 dma_set_coherent_mask(host->dev, in dw_mci_init_dma()
3048 /* host supports IDMAC in 32-bit address mode */ in dw_mci_init_dma()
3049 host->dma_64bit_address = 0; in dw_mci_init_dma()
3050 dev_info(host->dev, in dw_mci_init_dma()
3055 host->sg_cpu = dmam_alloc_coherent(host->dev, in dw_mci_init_dma()
3057 &host->sg_dma, GFP_KERNEL); in dw_mci_init_dma()
3058 if (!host->sg_cpu) { in dw_mci_init_dma()
3059 dev_err(host->dev, in dw_mci_init_dma()
3065 host->dma_ops = &dw_mci_idmac_ops; in dw_mci_init_dma()
3066 dev_info(host->dev, "Using internal DMA controller.\n"); in dw_mci_init_dma()
3073 host->dma_ops = &dw_mci_edmac_ops; in dw_mci_init_dma()
3074 dev_info(host->dev, "Using external DMA controller.\n"); in dw_mci_init_dma()
3077 if (host->dma_ops->init && host->dma_ops->start && in dw_mci_init_dma()
3078 host->dma_ops->stop && host->dma_ops->cleanup) { in dw_mci_init_dma()
3079 if (host->dma_ops->init(host)) { in dw_mci_init_dma()
3080 dev_err(host->dev, "%s: Unable to initialize DMA Controller.\n", in dw_mci_init_dma()
3085 dev_err(host->dev, "DMA initialization not found.\n"); in dw_mci_init_dma()
3092 dev_info(host->dev, "Using PIO mode.\n"); in dw_mci_init_dma()
3093 host->use_dma = TRANS_MODE_PIO; in dw_mci_init_dma()
3098 struct dw_mci *host = from_timer(host, t, cmd11_timer); in dw_mci_cmd11_timer() local
3100 if (host->state != STATE_SENDING_CMD11) { in dw_mci_cmd11_timer()
3101 dev_warn(host->dev, "Unexpected CMD11 timeout\n"); in dw_mci_cmd11_timer()
3105 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cmd11_timer()
3106 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd11_timer()
3107 queue_work(system_bh_wq, &host->bh_work); in dw_mci_cmd11_timer()
3112 struct dw_mci *host = from_timer(host, t, cto_timer); in dw_mci_cto_timer() local
3116 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_cto_timer()
3126 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_cto_timer()
3129 dev_warn(host->dev, "Unexpected interrupt latency\n"); in dw_mci_cto_timer()
3132 if (test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) { in dw_mci_cto_timer()
3134 dev_warn(host->dev, "CTO timeout when already completed\n"); in dw_mci_cto_timer()
3142 switch (host->state) { in dw_mci_cto_timer()
3151 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cto_timer()
3152 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cto_timer()
3153 queue_work(system_bh_wq, &host->bh_work); in dw_mci_cto_timer()
3156 dev_warn(host->dev, "Unexpected command timeout, state %d\n", in dw_mci_cto_timer()
3157 host->state); in dw_mci_cto_timer()
3162 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_cto_timer()
3167 struct dw_mci *host = from_timer(host, t, dto_timer); in dw_mci_dto_timer() local
3171 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3177 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_dto_timer()
3180 dev_warn(host->dev, "Unexpected data interrupt latency\n"); in dw_mci_dto_timer()
3183 if (test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) { in dw_mci_dto_timer()
3185 dev_warn(host->dev, "DTO timeout when already completed\n"); in dw_mci_dto_timer()
3193 switch (host->state) { in dw_mci_dto_timer()
3201 host->data_status = SDMMC_INT_DRTO; in dw_mci_dto_timer()
3202 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_dto_timer()
3203 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_dto_timer()
3204 queue_work(system_bh_wq, &host->bh_work); in dw_mci_dto_timer()
3207 dev_warn(host->dev, "Unexpected data timeout, state %d\n", in dw_mci_dto_timer()
3208 host->state); in dw_mci_dto_timer()
3213 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3217 static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) in dw_mci_parse_dt() argument
3220 struct device *dev = host->dev; in dw_mci_parse_dt()
3221 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_parse_dt()
3241 device_property_read_u32(dev, "data-addr", &host->data_addr_override); in dw_mci_parse_dt()
3244 host->wm_aligned = true; in dw_mci_parse_dt()
3250 ret = drv_data->parse_dt(host); in dw_mci_parse_dt()
3259 static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) in dw_mci_parse_dt() argument
3265 static void dw_mci_enable_cd(struct dw_mci *host) in dw_mci_enable_cd() argument
3274 if (host->slot->mmc->caps & MMC_CAP_NEEDS_POLL) in dw_mci_enable_cd()
3277 if (mmc_gpio_get_cd(host->slot->mmc) < 0) { in dw_mci_enable_cd()
3278 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3279 temp = mci_readl(host, INTMASK); in dw_mci_enable_cd()
3281 mci_writel(host, INTMASK, temp); in dw_mci_enable_cd()
3282 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3286 int dw_mci_probe(struct dw_mci *host) in dw_mci_probe() argument
3288 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_probe()
3292 if (!host->pdata) { in dw_mci_probe()
3293 host->pdata = dw_mci_parse_dt(host); in dw_mci_probe()
3294 if (IS_ERR(host->pdata)) in dw_mci_probe()
3295 return dev_err_probe(host->dev, PTR_ERR(host->pdata), in dw_mci_probe()
3299 host->biu_clk = devm_clk_get(host->dev, "biu"); in dw_mci_probe()
3300 if (IS_ERR(host->biu_clk)) { in dw_mci_probe()
3301 dev_dbg(host->dev, "biu clock not available\n"); in dw_mci_probe()
3302 ret = PTR_ERR(host->biu_clk); in dw_mci_probe()
3307 ret = clk_prepare_enable(host->biu_clk); in dw_mci_probe()
3309 dev_err(host->dev, "failed to enable biu clock\n"); in dw_mci_probe()
3314 host->ciu_clk = devm_clk_get(host->dev, "ciu"); in dw_mci_probe()
3315 if (IS_ERR(host->ciu_clk)) { in dw_mci_probe()
3316 dev_dbg(host->dev, "ciu clock not available\n"); in dw_mci_probe()
3317 ret = PTR_ERR(host->ciu_clk); in dw_mci_probe()
3321 host->bus_hz = host->pdata->bus_hz; in dw_mci_probe()
3323 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_probe()
3325 dev_err(host->dev, "failed to enable ciu clock\n"); in dw_mci_probe()
3329 if (host->pdata->bus_hz) { in dw_mci_probe()
3330 ret = clk_set_rate(host->ciu_clk, host->pdata->bus_hz); in dw_mci_probe()
3332 dev_warn(host->dev, in dw_mci_probe()
3334 host->pdata->bus_hz); in dw_mci_probe()
3336 host->bus_hz = clk_get_rate(host->ciu_clk); in dw_mci_probe()
3339 if (!host->bus_hz) { in dw_mci_probe()
3340 dev_err(host->dev, in dw_mci_probe()
3346 if (host->pdata->rstc) { in dw_mci_probe()
3347 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3349 reset_control_deassert(host->pdata->rstc); in dw_mci_probe()
3353 ret = drv_data->init(host); in dw_mci_probe()
3355 dev_err(host->dev, in dw_mci_probe()
3361 timer_setup(&host->cmd11_timer, dw_mci_cmd11_timer, 0); in dw_mci_probe()
3362 timer_setup(&host->cto_timer, dw_mci_cto_timer, 0); in dw_mci_probe()
3363 timer_setup(&host->dto_timer, dw_mci_dto_timer, 0); in dw_mci_probe()
3365 spin_lock_init(&host->lock); in dw_mci_probe()
3366 spin_lock_init(&host->irq_lock); in dw_mci_probe()
3367 INIT_LIST_HEAD(&host->queue); in dw_mci_probe()
3369 dw_mci_init_fault(host); in dw_mci_probe()
3372 * Get the host data width - this assumes that HCON has been set with in dw_mci_probe()
3375 i = SDMMC_GET_HDATA_WIDTH(mci_readl(host, HCON)); in dw_mci_probe()
3377 host->push_data = dw_mci_push_data16; in dw_mci_probe()
3378 host->pull_data = dw_mci_pull_data16; in dw_mci_probe()
3380 host->data_shift = 1; in dw_mci_probe()
3382 host->push_data = dw_mci_push_data64; in dw_mci_probe()
3383 host->pull_data = dw_mci_pull_data64; in dw_mci_probe()
3385 host->data_shift = 3; in dw_mci_probe()
3389 "HCON reports a reserved host data width!\n" in dw_mci_probe()
3391 host->push_data = dw_mci_push_data32; in dw_mci_probe()
3392 host->pull_data = dw_mci_pull_data32; in dw_mci_probe()
3394 host->data_shift = 2; in dw_mci_probe()
3398 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { in dw_mci_probe()
3403 host->dma_ops = host->pdata->dma_ops; in dw_mci_probe()
3404 dw_mci_init_dma(host); in dw_mci_probe()
3406 /* Clear the interrupts for the host controller */ in dw_mci_probe()
3407 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_probe()
3408 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_probe()
3411 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_probe()
3417 if (!host->pdata->fifo_depth) { in dw_mci_probe()
3424 fifo_size = mci_readl(host, FIFOTH); in dw_mci_probe()
3427 fifo_size = host->pdata->fifo_depth; in dw_mci_probe()
3429 host->fifo_depth = fifo_size; in dw_mci_probe()
3430 host->fifoth_val = in dw_mci_probe()
3432 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_probe()
3435 mci_writel(host, CLKENA, 0); in dw_mci_probe()
3436 mci_writel(host, CLKSRC, 0); in dw_mci_probe()
3442 host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); in dw_mci_probe()
3443 dev_info(host->dev, "Version ID is %04x\n", host->verid); in dw_mci_probe()
3445 if (host->data_addr_override) in dw_mci_probe()
3446 host->fifo_reg = host->regs + host->data_addr_override; in dw_mci_probe()
3447 else if (host->verid < DW_MMC_240A) in dw_mci_probe()
3448 host->fifo_reg = host->regs + DATA_OFFSET; in dw_mci_probe()
3450 host->fifo_reg = host->regs + DATA_240A_OFFSET; in dw_mci_probe()
3452 INIT_WORK(&host->bh_work, dw_mci_work_func); in dw_mci_probe()
3453 ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt, in dw_mci_probe()
3454 host->irq_flags, "dw-mci", host); in dw_mci_probe()
3462 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_probe()
3466 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_probe()
3468 dev_info(host->dev, in dw_mci_probe()
3469 "DW MMC controller at irq %d,%d bit host data width,%u deep fifo\n", in dw_mci_probe()
3470 host->irq, width, fifo_size); in dw_mci_probe()
3473 ret = dw_mci_init_slot(host); in dw_mci_probe()
3475 dev_dbg(host->dev, "slot %d init failed\n", i); in dw_mci_probe()
3480 dw_mci_enable_cd(host); in dw_mci_probe()
3485 if (host->use_dma && host->dma_ops->exit) in dw_mci_probe()
3486 host->dma_ops->exit(host); in dw_mci_probe()
3488 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3491 clk_disable_unprepare(host->ciu_clk); in dw_mci_probe()
3494 clk_disable_unprepare(host->biu_clk); in dw_mci_probe()
3500 void dw_mci_remove(struct dw_mci *host) in dw_mci_remove() argument
3502 dev_dbg(host->dev, "remove slot\n"); in dw_mci_remove()
3503 if (host->slot) in dw_mci_remove()
3504 dw_mci_cleanup_slot(host->slot); in dw_mci_remove()
3506 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_remove()
3507 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_remove()
3510 mci_writel(host, CLKENA, 0); in dw_mci_remove()
3511 mci_writel(host, CLKSRC, 0); in dw_mci_remove()
3513 if (host->use_dma && host->dma_ops->exit) in dw_mci_remove()
3514 host->dma_ops->exit(host); in dw_mci_remove()
3516 reset_control_assert(host->pdata->rstc); in dw_mci_remove()
3518 clk_disable_unprepare(host->ciu_clk); in dw_mci_remove()
3519 clk_disable_unprepare(host->biu_clk); in dw_mci_remove()
3528 struct dw_mci *host = dev_get_drvdata(dev); in dw_mci_runtime_suspend() local
3530 if (host->use_dma && host->dma_ops->exit) in dw_mci_runtime_suspend()
3531 host->dma_ops->exit(host); in dw_mci_runtime_suspend()
3533 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_suspend()
3535 if (host->slot && in dw_mci_runtime_suspend()
3536 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_suspend()
3537 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_suspend()
3538 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_suspend()
3547 struct dw_mci *host = dev_get_drvdata(dev); in dw_mci_runtime_resume() local
3549 if (host->slot && in dw_mci_runtime_resume()
3550 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3551 !mmc_card_is_removable(host->slot->mmc))) { in dw_mci_runtime_resume()
3552 ret = clk_prepare_enable(host->biu_clk); in dw_mci_runtime_resume()
3557 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_runtime_resume()
3561 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { in dw_mci_runtime_resume()
3562 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_resume()
3567 if (host->use_dma && host->dma_ops->init) in dw_mci_runtime_resume()
3568 host->dma_ops->init(host); in dw_mci_runtime_resume()
3574 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_runtime_resume()
3575 host->prev_blksz = 0; in dw_mci_runtime_resume()
3578 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_runtime_resume()
3580 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_runtime_resume()
3581 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_runtime_resume()
3584 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_runtime_resume()
3587 if (host->slot && host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER) in dw_mci_runtime_resume()
3588 dw_mci_set_ios(host->slot->mmc, &host->slot->mmc->ios); in dw_mci_runtime_resume()
3591 dw_mci_setup_bus(host->slot, true); in dw_mci_runtime_resume()
3594 if (sdio_irq_claimed(host->slot->mmc)) in dw_mci_runtime_resume()
3595 __dw_mci_enable_sdio_irq(host->slot, 1); in dw_mci_runtime_resume()
3598 dw_mci_enable_cd(host); in dw_mci_runtime_resume()
3603 if (host->slot && in dw_mci_runtime_resume()
3604 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3605 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_resume()
3606 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_resume()