mmc/host/dw_mmc-pltfm.c

1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include <linux/mfd/altera-sysmgr.h>
24 #include "dw_mmc-pltfm.h"
36 	host = devm_kzalloc(&pdev->dev, sizeof(struct dw_mci), GFP_KERNEL);  in dw_mci_pltfm_register()
38 		return -ENOMEM;  in dw_mci_pltfm_register()
40 	host->irq = platform_get_irq(pdev, 0);  in dw_mci_pltfm_register()
41 	if (host->irq < 0)  in dw_mci_pltfm_register()
42 		return host->irq;  in dw_mci_pltfm_register()
44 	host->drv_data = drv_data;  in dw_mci_pltfm_register()
45 	host->dev = &pdev->dev;  in dw_mci_pltfm_register()
46 	host->irq_flags = 0;  in dw_mci_pltfm_register()
47 	host->pdata = pdev->dev.platform_data;  in dw_mci_pltfm_register()
49 	host->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &regs);  in dw_mci_pltfm_register()
50 	if (IS_ERR(host->regs))  in dw_mci_pltfm_register()
51 		return PTR_ERR(host->regs);  in dw_mci_pltfm_register()
54 	host->phy_regs = regs->start;  in dw_mci_pltfm_register()
72 	struct device_node *np = host->dev->of_node;  in dw_mci_socfpga_priv_init()
77 	rc = of_property_read_variable_u32_array(np, "clk-phase-sd-hs", &clk_phase[0], 2, 0);  in dw_mci_socfpga_priv_init()
81 	sys_mgr_base_addr = altr_sysmgr_regmap_lookup_by_phandle(np, "altr,sysmgr-syscon");  in dw_mci_socfpga_priv_init()
83 		dev_warn(host->dev, "clk-phase-sd-hs was specified, but failed to find altr,sys-mgr regmap!\n");  in dw_mci_socfpga_priv_init()
87 	of_property_read_u32_index(np, "altr,sysmgr-syscon", 1, &reg_offset);  in dw_mci_socfpga_priv_init()
88 	of_property_read_u32_index(np, "altr,sysmgr-syscon", 2, &reg_shift);  in dw_mci_socfpga_priv_init()
104 	{ .compatible = "snps,dw-mshc", },
105 	{ .compatible = "altr,socfpga-dw-mshc", .data = &socfpga_drv_data, },
106 	{ .compatible = "img,pistachio-dw-mshc", },
116 	if (pdev->dev.of_node) {  in dw_mci_pltfm_probe()
117 		match = of_match_node(dw_mci_pltfm_match, pdev->dev.of_node);  in dw_mci_pltfm_probe()
118 		drv_data = match->data;  in dw_mci_pltfm_probe()