Lines Matching full:phase
222 struct mmc_clk_phase *phase) in mmc_of_parse_timing_phase() argument
228 phase->valid = !rc; in mmc_of_parse_timing_phase()
229 if (phase->valid) { in mmc_of_parse_timing_phase()
230 phase->in_deg = degrees[0]; in mmc_of_parse_timing_phase()
231 phase->out_deg = degrees[1]; in mmc_of_parse_timing_phase()
238 mmc_of_parse_timing_phase(dev, "clk-phase-legacy", in mmc_of_parse_clk_phase()
239 &map->phase[MMC_TIMING_LEGACY]); in mmc_of_parse_clk_phase()
240 mmc_of_parse_timing_phase(dev, "clk-phase-mmc-hs", in mmc_of_parse_clk_phase()
241 &map->phase[MMC_TIMING_MMC_HS]); in mmc_of_parse_clk_phase()
242 mmc_of_parse_timing_phase(dev, "clk-phase-sd-hs", in mmc_of_parse_clk_phase()
243 &map->phase[MMC_TIMING_SD_HS]); in mmc_of_parse_clk_phase()
244 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr12", in mmc_of_parse_clk_phase()
245 &map->phase[MMC_TIMING_UHS_SDR12]); in mmc_of_parse_clk_phase()
246 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr25", in mmc_of_parse_clk_phase()
247 &map->phase[MMC_TIMING_UHS_SDR25]); in mmc_of_parse_clk_phase()
248 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr50", in mmc_of_parse_clk_phase()
249 &map->phase[MMC_TIMING_UHS_SDR50]); in mmc_of_parse_clk_phase()
250 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr104", in mmc_of_parse_clk_phase()
251 &map->phase[MMC_TIMING_UHS_SDR104]); in mmc_of_parse_clk_phase()
252 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-ddr50", in mmc_of_parse_clk_phase()
253 &map->phase[MMC_TIMING_UHS_DDR50]); in mmc_of_parse_clk_phase()
254 mmc_of_parse_timing_phase(dev, "clk-phase-mmc-ddr52", in mmc_of_parse_clk_phase()
255 &map->phase[MMC_TIMING_MMC_DDR52]); in mmc_of_parse_clk_phase()
256 mmc_of_parse_timing_phase(dev, "clk-phase-mmc-hs200", in mmc_of_parse_clk_phase()
257 &map->phase[MMC_TIMING_MMC_HS200]); in mmc_of_parse_clk_phase()
258 mmc_of_parse_timing_phase(dev, "clk-phase-mmc-hs400", in mmc_of_parse_clk_phase()
259 &map->phase[MMC_TIMING_MMC_HS400]); in mmc_of_parse_clk_phase()