313 	unsigned long mmr = 0;  in gru_chiplet_cpu_to_mmr()  local
327 		mmr = UVH_GR0_TLB_INT0_CONFIG +  in gru_chiplet_cpu_to_mmr()
330 		mmr = UVH_GR1_TLB_INT0_CONFIG +  in gru_chiplet_cpu_to_mmr()
337 	return mmr;  in gru_chiplet_cpu_to_mmr()
343 	unsigned long mmr;  in gru_chiplet_setup_tlb_irq()  local
347 	mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core);  in gru_chiplet_setup_tlb_irq()
348 	if (mmr == 0)  in gru_chiplet_setup_tlb_irq()
351 	irq = uv_setup_irq(irq_name, cpu, blade, mmr, UV_AFFINITY_CPU);  in gru_chiplet_setup_tlb_irq()
372 	unsigned long mmr;  in gru_chiplet_teardown_tlb_irq()  local
374 	mmr = gru_chiplet_cpu_to_mmr(chiplet, cpu, &core);  in gru_chiplet_teardown_tlb_irq()
375 	if (mmr) {  in gru_chiplet_teardown_tlb_irq()