Lines Matching full:chip

138  * @chip:		Pointer to the PHUB register structure
143 static void pch_phub_read_modify_write_reg(struct pch_phub_reg *chip, in pch_phub_read_modify_write_reg() argument
147 void __iomem *reg_addr = chip->pch_phub_base_address + reg_addr_offset; in pch_phub_read_modify_write_reg()
155 struct pch_phub_reg *chip = pci_get_drvdata(pdev); in pch_phub_save_reg_conf() local
157 void __iomem *p = chip->pch_phub_base_address; in pch_phub_save_reg_conf()
159 chip->phub_id_reg = ioread32(p + PCH_PHUB_ID_REG); in pch_phub_save_reg_conf()
160 chip->q_pri_val_reg = ioread32(p + PCH_PHUB_QUEUE_PRI_VAL_REG); in pch_phub_save_reg_conf()
161 chip->rc_q_maxsize_reg = ioread32(p + PCH_PHUB_RC_QUEUE_MAXSIZE_REG); in pch_phub_save_reg_conf()
162 chip->bri_q_maxsize_reg = ioread32(p + PCH_PHUB_BRI_QUEUE_MAXSIZE_REG); in pch_phub_save_reg_conf()
163 chip->comp_resp_timeout_reg = in pch_phub_save_reg_conf()
165 chip->bus_slave_control_reg = in pch_phub_save_reg_conf()
167 chip->deadlock_avoid_type_reg = in pch_phub_save_reg_conf()
169 chip->intpin_reg_wpermit_reg0 = in pch_phub_save_reg_conf()
171 chip->intpin_reg_wpermit_reg1 = in pch_phub_save_reg_conf()
173 chip->intpin_reg_wpermit_reg2 = in pch_phub_save_reg_conf()
175 chip->intpin_reg_wpermit_reg3 = in pch_phub_save_reg_conf()
178 "chip->phub_id_reg=%x, " in pch_phub_save_reg_conf()
179 "chip->q_pri_val_reg=%x, " in pch_phub_save_reg_conf()
180 "chip->rc_q_maxsize_reg=%x, " in pch_phub_save_reg_conf()
181 "chip->bri_q_maxsize_reg=%x, " in pch_phub_save_reg_conf()
182 "chip->comp_resp_timeout_reg=%x, " in pch_phub_save_reg_conf()
183 "chip->bus_slave_control_reg=%x, " in pch_phub_save_reg_conf()
184 "chip->deadlock_avoid_type_reg=%x, " in pch_phub_save_reg_conf()
185 "chip->intpin_reg_wpermit_reg0=%x, " in pch_phub_save_reg_conf()
186 "chip->intpin_reg_wpermit_reg1=%x, " in pch_phub_save_reg_conf()
187 "chip->intpin_reg_wpermit_reg2=%x, " in pch_phub_save_reg_conf()
188 "chip->intpin_reg_wpermit_reg3=%x\n", __func__, in pch_phub_save_reg_conf()
189 chip->phub_id_reg, in pch_phub_save_reg_conf()
190 chip->q_pri_val_reg, in pch_phub_save_reg_conf()
191 chip->rc_q_maxsize_reg, in pch_phub_save_reg_conf()
192 chip->bri_q_maxsize_reg, in pch_phub_save_reg_conf()
193 chip->comp_resp_timeout_reg, in pch_phub_save_reg_conf()
194 chip->bus_slave_control_reg, in pch_phub_save_reg_conf()
195 chip->deadlock_avoid_type_reg, in pch_phub_save_reg_conf()
196 chip->intpin_reg_wpermit_reg0, in pch_phub_save_reg_conf()
197 chip->intpin_reg_wpermit_reg1, in pch_phub_save_reg_conf()
198 chip->intpin_reg_wpermit_reg2, in pch_phub_save_reg_conf()
199 chip->intpin_reg_wpermit_reg3); in pch_phub_save_reg_conf()
201 chip->int_reduce_control_reg[i] = in pch_phub_save_reg_conf()
204 "chip->int_reduce_control_reg[%d]=%x\n", in pch_phub_save_reg_conf()
205 __func__, i, chip->int_reduce_control_reg[i]); in pch_phub_save_reg_conf()
207 chip->clkcfg_reg = ioread32(p + CLKCFG_REG_OFFSET); in pch_phub_save_reg_conf()
208 if ((chip->ioh_type == 2) || (chip->ioh_type == 4)) in pch_phub_save_reg_conf()
209 chip->funcsel_reg = ioread32(p + FUNCSEL_REG_OFFSET); in pch_phub_save_reg_conf()
216 struct pch_phub_reg *chip = pci_get_drvdata(pdev); in pch_phub_restore_reg_conf() local
218 p = chip->pch_phub_base_address; in pch_phub_restore_reg_conf()
220 iowrite32(chip->phub_id_reg, p + PCH_PHUB_ID_REG); in pch_phub_restore_reg_conf()
221 iowrite32(chip->q_pri_val_reg, p + PCH_PHUB_QUEUE_PRI_VAL_REG); in pch_phub_restore_reg_conf()
222 iowrite32(chip->rc_q_maxsize_reg, p + PCH_PHUB_RC_QUEUE_MAXSIZE_REG); in pch_phub_restore_reg_conf()
223 iowrite32(chip->bri_q_maxsize_reg, p + PCH_PHUB_BRI_QUEUE_MAXSIZE_REG); in pch_phub_restore_reg_conf()
224 iowrite32(chip->comp_resp_timeout_reg, in pch_phub_restore_reg_conf()
226 iowrite32(chip->bus_slave_control_reg, in pch_phub_restore_reg_conf()
228 iowrite32(chip->deadlock_avoid_type_reg, in pch_phub_restore_reg_conf()
230 iowrite32(chip->intpin_reg_wpermit_reg0, in pch_phub_restore_reg_conf()
232 iowrite32(chip->intpin_reg_wpermit_reg1, in pch_phub_restore_reg_conf()
234 iowrite32(chip->intpin_reg_wpermit_reg2, in pch_phub_restore_reg_conf()
236 iowrite32(chip->intpin_reg_wpermit_reg3, in pch_phub_restore_reg_conf()
239 "chip->phub_id_reg=%x, " in pch_phub_restore_reg_conf()
240 "chip->q_pri_val_reg=%x, " in pch_phub_restore_reg_conf()
241 "chip->rc_q_maxsize_reg=%x, " in pch_phub_restore_reg_conf()
242 "chip->bri_q_maxsize_reg=%x, " in pch_phub_restore_reg_conf()
243 "chip->comp_resp_timeout_reg=%x, " in pch_phub_restore_reg_conf()
244 "chip->bus_slave_control_reg=%x, " in pch_phub_restore_reg_conf()
245 "chip->deadlock_avoid_type_reg=%x, " in pch_phub_restore_reg_conf()
246 "chip->intpin_reg_wpermit_reg0=%x, " in pch_phub_restore_reg_conf()
247 "chip->intpin_reg_wpermit_reg1=%x, " in pch_phub_restore_reg_conf()
248 "chip->intpin_reg_wpermit_reg2=%x, " in pch_phub_restore_reg_conf()
249 "chip->intpin_reg_wpermit_reg3=%x\n", __func__, in pch_phub_restore_reg_conf()
250 chip->phub_id_reg, in pch_phub_restore_reg_conf()
251 chip->q_pri_val_reg, in pch_phub_restore_reg_conf()
252 chip->rc_q_maxsize_reg, in pch_phub_restore_reg_conf()
253 chip->bri_q_maxsize_reg, in pch_phub_restore_reg_conf()
254 chip->comp_resp_timeout_reg, in pch_phub_restore_reg_conf()
255 chip->bus_slave_control_reg, in pch_phub_restore_reg_conf()
256 chip->deadlock_avoid_type_reg, in pch_phub_restore_reg_conf()
257 chip->intpin_reg_wpermit_reg0, in pch_phub_restore_reg_conf()
258 chip->intpin_reg_wpermit_reg1, in pch_phub_restore_reg_conf()
259 chip->intpin_reg_wpermit_reg2, in pch_phub_restore_reg_conf()
260 chip->intpin_reg_wpermit_reg3); in pch_phub_restore_reg_conf()
262 iowrite32(chip->int_reduce_control_reg[i], in pch_phub_restore_reg_conf()
265 "chip->int_reduce_control_reg[%d]=%x\n", in pch_phub_restore_reg_conf()
266 __func__, i, chip->int_reduce_control_reg[i]); in pch_phub_restore_reg_conf()
269 iowrite32(chip->clkcfg_reg, p + CLKCFG_REG_OFFSET); in pch_phub_restore_reg_conf()
270 if ((chip->ioh_type == 2) || (chip->ioh_type == 4)) in pch_phub_restore_reg_conf()
271 iowrite32(chip->funcsel_reg, p + FUNCSEL_REG_OFFSET); in pch_phub_restore_reg_conf()
276 * @chip: Pointer to the PHUB register structure
280 static void pch_phub_read_serial_rom(struct pch_phub_reg *chip, in pch_phub_read_serial_rom() argument
283 void __iomem *mem_addr = chip->pch_phub_extrom_base_address + in pch_phub_read_serial_rom()
291 * @chip: Pointer to the PHUB register structure
295 static int pch_phub_write_serial_rom(struct pch_phub_reg *chip, in pch_phub_write_serial_rom() argument
298 void __iomem *mem_addr = chip->pch_phub_extrom_base_address + in pch_phub_write_serial_rom()
308 chip->pch_phub_extrom_base_address + PHUB_CONTROL); in pch_phub_write_serial_rom()
314 while (ioread8(chip->pch_phub_extrom_base_address + in pch_phub_write_serial_rom()
323 chip->pch_phub_extrom_base_address + PHUB_CONTROL); in pch_phub_write_serial_rom()
330 * @chip: Pointer to the PHUB register structure
334 static void pch_phub_read_serial_rom_val(struct pch_phub_reg *chip, in pch_phub_read_serial_rom_val() argument
339 mem_addr = chip->pch_mac_start_address + in pch_phub_read_serial_rom_val()
342 pch_phub_read_serial_rom(chip, mem_addr, data); in pch_phub_read_serial_rom_val()
347 * @chip: Pointer to the PHUB register structure
351 static int pch_phub_write_serial_rom_val(struct pch_phub_reg *chip, in pch_phub_write_serial_rom_val() argument
357 mem_addr = chip->pch_mac_start_address + in pch_phub_write_serial_rom_val()
360 retval = pch_phub_write_serial_rom(chip, mem_addr, data); in pch_phub_write_serial_rom_val()
368 static int pch_phub_gbe_serial_rom_conf(struct pch_phub_reg *chip) in pch_phub_gbe_serial_rom_conf() argument
372 retval = pch_phub_write_serial_rom(chip, 0x0b, 0xbc); in pch_phub_gbe_serial_rom_conf()
373 retval |= pch_phub_write_serial_rom(chip, 0x0a, 0x10); in pch_phub_gbe_serial_rom_conf()
374 retval |= pch_phub_write_serial_rom(chip, 0x09, 0x01); in pch_phub_gbe_serial_rom_conf()
375 retval |= pch_phub_write_serial_rom(chip, 0x08, 0x02); in pch_phub_gbe_serial_rom_conf()
377 retval |= pch_phub_write_serial_rom(chip, 0x0f, 0x00); in pch_phub_gbe_serial_rom_conf()
378 retval |= pch_phub_write_serial_rom(chip, 0x0e, 0x00); in pch_phub_gbe_serial_rom_conf()
379 retval |= pch_phub_write_serial_rom(chip, 0x0d, 0x00); in pch_phub_gbe_serial_rom_conf()
380 retval |= pch_phub_write_serial_rom(chip, 0x0c, 0x80); in pch_phub_gbe_serial_rom_conf()
382 retval |= pch_phub_write_serial_rom(chip, 0x13, 0xbc); in pch_phub_gbe_serial_rom_conf()
383 retval |= pch_phub_write_serial_rom(chip, 0x12, 0x10); in pch_phub_gbe_serial_rom_conf()
384 retval |= pch_phub_write_serial_rom(chip, 0x11, 0x01); in pch_phub_gbe_serial_rom_conf()
385 retval |= pch_phub_write_serial_rom(chip, 0x10, 0x18); in pch_phub_gbe_serial_rom_conf()
387 retval |= pch_phub_write_serial_rom(chip, 0x1b, 0xbc); in pch_phub_gbe_serial_rom_conf()
388 retval |= pch_phub_write_serial_rom(chip, 0x1a, 0x10); in pch_phub_gbe_serial_rom_conf()
389 retval |= pch_phub_write_serial_rom(chip, 0x19, 0x01); in pch_phub_gbe_serial_rom_conf()
390 retval |= pch_phub_write_serial_rom(chip, 0x18, 0x19); in pch_phub_gbe_serial_rom_conf()
392 retval |= pch_phub_write_serial_rom(chip, 0x23, 0xbc); in pch_phub_gbe_serial_rom_conf()
393 retval |= pch_phub_write_serial_rom(chip, 0x22, 0x10); in pch_phub_gbe_serial_rom_conf()
394 retval |= pch_phub_write_serial_rom(chip, 0x21, 0x01); in pch_phub_gbe_serial_rom_conf()
395 retval |= pch_phub_write_serial_rom(chip, 0x20, 0x3a); in pch_phub_gbe_serial_rom_conf()
397 retval |= pch_phub_write_serial_rom(chip, 0x27, 0x01); in pch_phub_gbe_serial_rom_conf()
398 retval |= pch_phub_write_serial_rom(chip, 0x26, 0x00); in pch_phub_gbe_serial_rom_conf()
399 retval |= pch_phub_write_serial_rom(chip, 0x25, 0x00); in pch_phub_gbe_serial_rom_conf()
400 retval |= pch_phub_write_serial_rom(chip, 0x24, 0x00); in pch_phub_gbe_serial_rom_conf()
408 static int pch_phub_gbe_serial_rom_conf_mp(struct pch_phub_reg *chip) in pch_phub_gbe_serial_rom_conf_mp() argument
414 retval = pch_phub_write_serial_rom(chip, 0x03 + offset_addr, 0xbc); in pch_phub_gbe_serial_rom_conf_mp()
415 retval |= pch_phub_write_serial_rom(chip, 0x02 + offset_addr, 0x00); in pch_phub_gbe_serial_rom_conf_mp()
416 retval |= pch_phub_write_serial_rom(chip, 0x01 + offset_addr, 0x40); in pch_phub_gbe_serial_rom_conf_mp()
417 retval |= pch_phub_write_serial_rom(chip, 0x00 + offset_addr, 0x02); in pch_phub_gbe_serial_rom_conf_mp()
419 retval |= pch_phub_write_serial_rom(chip, 0x07 + offset_addr, 0x00); in pch_phub_gbe_serial_rom_conf_mp()
420 retval |= pch_phub_write_serial_rom(chip, 0x06 + offset_addr, 0x00); in pch_phub_gbe_serial_rom_conf_mp()
421 retval |= pch_phub_write_serial_rom(chip, 0x05 + offset_addr, 0x00); in pch_phub_gbe_serial_rom_conf_mp()
422 retval |= pch_phub_write_serial_rom(chip, 0x04 + offset_addr, 0x80); in pch_phub_gbe_serial_rom_conf_mp()
424 retval |= pch_phub_write_serial_rom(chip, 0x0b + offset_addr, 0xbc); in pch_phub_gbe_serial_rom_conf_mp()
425 retval |= pch_phub_write_serial_rom(chip, 0x0a + offset_addr, 0x00); in pch_phub_gbe_serial_rom_conf_mp()
426 retval |= pch_phub_write_serial_rom(chip, 0x09 + offset_addr, 0x40); in pch_phub_gbe_serial_rom_conf_mp()
427 retval |= pch_phub_write_serial_rom(chip, 0x08 + offset_addr, 0x18); in pch_phub_gbe_serial_rom_conf_mp()
429 retval |= pch_phub_write_serial_rom(chip, 0x13 + offset_addr, 0xbc); in pch_phub_gbe_serial_rom_conf_mp()
430 retval |= pch_phub_write_serial_rom(chip, 0x12 + offset_addr, 0x00); in pch_phub_gbe_serial_rom_conf_mp()
431 retval |= pch_phub_write_serial_rom(chip, 0x11 + offset_addr, 0x40); in pch_phub_gbe_serial_rom_conf_mp()
432 retval |= pch_phub_write_serial_rom(chip, 0x10 + offset_addr, 0x19); in pch_phub_gbe_serial_rom_conf_mp()
434 retval |= pch_phub_write_serial_rom(chip, 0x1b + offset_addr, 0xbc); in pch_phub_gbe_serial_rom_conf_mp()
435 retval |= pch_phub_write_serial_rom(chip, 0x1a + offset_addr, 0x00); in pch_phub_gbe_serial_rom_conf_mp()
436 retval |= pch_phub_write_serial_rom(chip, 0x19 + offset_addr, 0x40); in pch_phub_gbe_serial_rom_conf_mp()
437 retval |= pch_phub_write_serial_rom(chip, 0x18 + offset_addr, 0x3a); in pch_phub_gbe_serial_rom_conf_mp()
439 retval |= pch_phub_write_serial_rom(chip, 0x1f + offset_addr, 0x01); in pch_phub_gbe_serial_rom_conf_mp()
440 retval |= pch_phub_write_serial_rom(chip, 0x1e + offset_addr, 0x00); in pch_phub_gbe_serial_rom_conf_mp()
441 retval |= pch_phub_write_serial_rom(chip, 0x1d + offset_addr, 0x00); in pch_phub_gbe_serial_rom_conf_mp()
442 retval |= pch_phub_write_serial_rom(chip, 0x1c + offset_addr, 0x00); in pch_phub_gbe_serial_rom_conf_mp()
449 * @chip: Pointer to the PHUB register structure
452 static void pch_phub_read_gbe_mac_addr(struct pch_phub_reg *chip, u8 *data) in pch_phub_read_gbe_mac_addr() argument
456 pch_phub_read_serial_rom_val(chip, i, &data[i]); in pch_phub_read_gbe_mac_addr()
461 * @chip: Pointer to the PHUB register structure
464 static int pch_phub_write_gbe_mac_addr(struct pch_phub_reg *chip, u8 *data) in pch_phub_write_gbe_mac_addr() argument
469 if ((chip->ioh_type == 1) || (chip->ioh_type == 5)) /* EG20T or ML7831*/ in pch_phub_write_gbe_mac_addr()
470 retval = pch_phub_gbe_serial_rom_conf(chip); in pch_phub_write_gbe_mac_addr()
472 retval = pch_phub_gbe_serial_rom_conf_mp(chip); in pch_phub_write_gbe_mac_addr()
477 retval = pch_phub_write_serial_rom_val(chip, i, data[i]); in pch_phub_write_gbe_mac_addr()
498 struct pch_phub_reg *chip = dev_get_drvdata(kobj_to_dev(kobj)); in pch_phub_bin_read() local
507 chip->pch_phub_extrom_base_address = pci_map_rom(chip->pdev, &rom_size); in pch_phub_bin_read()
508 if (!chip->pch_phub_extrom_base_address) { in pch_phub_bin_read()
513 pch_phub_read_serial_rom(chip, chip->pch_opt_rom_start_address, in pch_phub_bin_read()
516 pch_phub_read_serial_rom(chip, chip->pch_opt_rom_start_address + 1, in pch_phub_bin_read()
520 pch_phub_read_serial_rom(chip, in pch_phub_bin_read()
521 chip->pch_opt_rom_start_address + 2, in pch_phub_bin_read()
534 pch_phub_read_serial_rom(chip, in pch_phub_bin_read()
535 chip->pch_opt_rom_start_address + addr_offset + off, in pch_phub_bin_read()
543 pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); in pch_phub_bin_read()
548 pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); in pch_phub_bin_read()
563 struct pch_phub_reg *chip = dev_get_drvdata(kobj_to_dev(kobj)); in pch_phub_bin_write() local
578 chip->pch_phub_extrom_base_address = pci_map_rom(chip->pdev, &rom_size); in pch_phub_bin_write()
579 if (!chip->pch_phub_extrom_base_address) { in pch_phub_bin_write()
588 ret = pch_phub_write_serial_rom(chip, in pch_phub_bin_write()
589 chip->pch_opt_rom_start_address + addr_offset + off, in pch_phub_bin_write()
598 pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); in pch_phub_bin_write()
603 pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); in pch_phub_bin_write()
614 struct pch_phub_reg *chip = dev_get_drvdata(dev); in show_pch_mac() local
617 chip->pch_phub_extrom_base_address = pci_map_rom(chip->pdev, &rom_size); in show_pch_mac()
618 if (!chip->pch_phub_extrom_base_address) in show_pch_mac()
621 pch_phub_read_gbe_mac_addr(chip, mac); in show_pch_mac()
622 pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); in show_pch_mac()
632 struct pch_phub_reg *chip = dev_get_drvdata(dev); in store_pch_mac() local
638 chip->pch_phub_extrom_base_address = pci_map_rom(chip->pdev, &rom_size); in store_pch_mac()
639 if (!chip->pch_phub_extrom_base_address) in store_pch_mac()
642 ret = pch_phub_write_gbe_mac_addr(chip, mac); in store_pch_mac()
643 pci_unmap_rom(chip->pdev, chip->pch_phub_extrom_base_address); in store_pch_mac()
666 struct pch_phub_reg *chip; in pch_phub_probe() local
668 chip = kzalloc(sizeof(struct pch_phub_reg), GFP_KERNEL); in pch_phub_probe()
669 if (chip == NULL) in pch_phub_probe()
690 chip->pch_phub_base_address = pci_iomap(pdev, 1, 0); in pch_phub_probe()
693 if (chip->pch_phub_base_address == NULL) { in pch_phub_probe()
700 chip->pch_phub_base_address); in pch_phub_probe()
702 chip->pdev = pdev; /* Save pci device struct */ in pch_phub_probe()
722 pch_phub_read_modify_write_reg(chip, in pch_phub_probe()
730 pch_phub_read_modify_write_reg(chip, in pch_phub_probe()
737 iowrite32(prefetch, chip->pch_phub_base_address + 0x14); in pch_phub_probe()
739 iowrite32(0x25, chip->pch_phub_base_address + 0x44); in pch_phub_probe()
740 chip->pch_opt_rom_start_address = PCH_PHUB_ROM_START_ADDR_EG20T; in pch_phub_probe()
741 chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_EG20T; in pch_phub_probe()
746 pch_phub_read_modify_write_reg(chip, in pch_phub_probe()
762 iowrite32(0x000affa0, chip->pch_phub_base_address + 0x14); in pch_phub_probe()
763 chip->pch_opt_rom_start_address =\ in pch_phub_probe()
769 iowrite32(0x000a0000, chip->pch_phub_base_address + 0x14); in pch_phub_probe()
771 iowrite32(0x25, chip->pch_phub_base_address + 0x140); in pch_phub_probe()
772 chip->pch_opt_rom_start_address =\ in pch_phub_probe()
774 chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223; in pch_phub_probe()
788 iowrite32(0x0000ffa0, chip->pch_phub_base_address + 0x14); in pch_phub_probe()
789 chip->pch_opt_rom_start_address =\ in pch_phub_probe()
791 chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223; in pch_phub_probe()
803 iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14); in pch_phub_probe()
805 iowrite32(0x25, chip->pch_phub_base_address + 0x44); in pch_phub_probe()
806 chip->pch_opt_rom_start_address = PCH_PHUB_ROM_START_ADDR_EG20T; in pch_phub_probe()
807 chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_EG20T; in pch_phub_probe()
810 chip->ioh_type = id->driver_data; in pch_phub_probe()
811 pci_set_drvdata(pdev, chip); in pch_phub_probe()
818 pci_iounmap(pdev, chip->pch_phub_base_address); in pch_phub_probe()
824 kfree(chip); in pch_phub_probe()
831 struct pch_phub_reg *chip = pci_get_drvdata(pdev); in pch_phub_remove() local
835 pci_iounmap(pdev, chip->pch_phub_base_address); in pch_phub_remove()
838 kfree(chip); in pch_phub_remove()