Lines Matching +full:per +full:- +full:channel
1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2008 Hewlett-Packard Development Company, L.P.
16 /* max number of open channel control blocks per device, hw limited to 32 */
18 /* min number of open channel control blocks per device, hw limited to 32 */
26 /* per spin wait time in usec */
32 * Per device, used to track global memory allocations.
41 /* shared memory on device used for channel control blocks */
52 * -> alloc_lock used when adding/removing/searching ccb_alloc,
54 * --> fifo_lock controls access to fifo queues shared with hw
75 * Channel control block. Used to manage hardware queues.
107 u64 channel; member
130 * Per fd structure used to track the ccb allocated to that dev file.
169 u64 reset; /* set to non-zero when the target device resets */
170 u8 pad_0[ILO_CACHE_SZ - (sizeof(u64) * 4)];
173 u8 pad_1[ILO_CACHE_SZ - (sizeof(u64))];
176 u8 pad_2[ILO_CACHE_SZ - (sizeof(u64))];
184 ((struct fifo *)(((char *)(_fifo)) - FIFOHANDLESIZE))
204 #define ENTRY_MASK ((1 << ENTRY_BITS_TOTAL) - 1)
205 #define ENTRY_MASK_C (((1 << ENTRY_BITS_C) - 1) << ENTRY_BITPOS_C)
206 #define ENTRY_MASK_O (((1 << ENTRY_BITS_O) - 1) << ENTRY_BITPOS_O)
208 (((1 << ENTRY_BITS_QWORDS) - 1) << ENTRY_BITPOS_QWORDS)
210 (((1 << ENTRY_BITS_DESCRIPTOR) - 1) << ENTRY_BITPOS_DESCRIPTOR)