21 	return val & 0x0F;  in rts5229_get_ic_version()
30 	pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);  in rts5229_fetch_vendor_settings()
38 	pcr->card_drive_sel &= 0x3F;  in rts5229_fetch_vendor_settings()
42 	pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);  in rts5229_fetch_vendor_settings()
49 	rtsx_pci_write_register(pcr, FPDCTL, 0x03, 0x03);  in rts5229_force_power_down()
57 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02);  in rts5229_extra_init_hw()
59 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0);  in rts5229_extra_init_hw()
60 	/* Force CLKREQ# PIN to drive 0 to request clock */  in rts5229_extra_init_hw()
61 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08);  in rts5229_extra_init_hw()
63 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00);  in rts5229_extra_init_hw()
64 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01);  in rts5229_extra_init_hw()
66 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02);  in rts5229_extra_init_hw()
69 			0xFF, pcr->sd30_drive_sel_3v3);  in rts5229_extra_init_hw()
77 	return rtsx_pci_write_phy_register(pcr, 0x00, 0xBA42);  in rts5229_optimize_phy()
82 	return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02);  in rts5229_turn_on_led()
87 	return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00);  in rts5229_turn_off_led()
92 	return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08);  in rts5229_enable_auto_blink()
97 	return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00);  in rts5229_disable_auto_blink()
108 			LDO3318_PWR_MASK, 0x02);  in rts5229_card_power_on()
110 	if (err < 0)  in rts5229_card_power_on()
120 			LDO3318_PWR_MASK, 0x06);  in rts5229_card_power_on()
131 			LDO3318_PWR_MASK, 0x00);  in rts5229_card_power_off()
141 				SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_3v3);  in rts5229_switch_output_voltage()
142 		if (err < 0)  in rts5229_switch_output_voltage()
144 		err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24);  in rts5229_switch_output_voltage()
145 		if (err < 0)  in rts5229_switch_output_voltage()
149 				SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_1v8);  in rts5229_switch_output_voltage()
150 		if (err < 0)  in rts5229_switch_output_voltage()
152 		err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C40 | 0x24);  in rts5229_switch_output_voltage()
153 		if (err < 0)  in rts5229_switch_output_voltage()
159 	return 0;  in rts5229_switch_output_voltage()
179  *     SD_DAT[3:0] ==> pull up
186 	RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
187 	RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9),
188 	0,
193 	RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
194 	RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD9),
195 	0,
199  *     SD_DAT[3:0] ==> pull down
206 	RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
207 	RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5),
208 	0,
213 	RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
214 	RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE5),
215 	0,
223 	RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
224 	RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
225 	0,
233 	RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
234 	RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
235 	0,
244 	pcr->flags = 0;  in rts5229_init_params()