Lines Matching +full:0 +full:xfffffe00
53 #define ACPIBASE 0x40
54 #define ACPIBASE_GPE_OFF 0x28
55 #define ACPIBASE_GPE_END 0x2f
56 #define ACPIBASE_SMI_OFF 0x30
57 #define ACPIBASE_SMI_END 0x33
58 #define ACPIBASE_PMC_OFF 0x08
59 #define ACPIBASE_PMC_END 0x0c
60 #define ACPIBASE_TCO_OFF 0x60
61 #define ACPIBASE_TCO_END 0x7f
62 #define ACPICTRL_PMCBASE 0x44
64 #define ACPIBASE_GCS_OFF 0x3410
65 #define ACPIBASE_GCS_END 0x3414
67 #define SPIBASE_BYT 0x54
70 #define BYT_BCR 0xfc
71 #define BYT_BCR_WPD BIT(0)
73 #define SPIBASE_LPT 0x3800
75 #define BCR 0xdc
76 #define BCR_WPD BIT(0)
78 #define GPIOBASE_ICH0 0x58
79 #define GPIOCTRL_ICH0 0x5C
80 #define GPIOBASE_ICH6 0x48
81 #define GPIOCTRL_ICH6 0x4C
83 #define RCBABASE 0xf0
85 #define wdt_io_res(i) wdt_res(0, i)
135 #define INTEL_GPIO_RESOURCE_SIZE 0x1000
146 #define APL_GPIO_NORTH 0
156 [APL_GPIO_NORTH] = 0xc50000,
157 [APL_GPIO_NORTHWEST] = 0xc40000,
158 [APL_GPIO_WEST] = 0xc70000,
159 [APL_GPIO_SOUTHWEST] = 0xc00000,
166 DEFINE_RES_MEM(0, 0),
170 DEFINE_RES_MEM(0, 0),
174 DEFINE_RES_MEM(0, 0),
178 DEFINE_RES_MEM(0, 0),
184 [APL_GPIO_NORTH] = &apl_gpio_resources[APL_GPIO_NORTH][0],
185 [APL_GPIO_NORTHWEST] = &apl_gpio_resources[APL_GPIO_NORTHWEST][0],
186 [APL_GPIO_WEST] = &apl_gpio_resources[APL_GPIO_WEST][0],
187 [APL_GPIO_SOUTHWEST] = &apl_gpio_resources[APL_GPIO_SOUTHWEST][0],
230 #define DNV_GPIO_NORTH 0
238 [DNV_GPIO_NORTH] = 0xc20000,
239 [DNV_GPIO_SOUTH] = 0xc50000,
245 [DNV_GPIO_NORTH] = DEFINE_RES_MEM(0, 0),
246 [DNV_GPIO_SOUTH] = DEFINE_RES_MEM(0, 0),
282 LPC_ICH = 0, /* ICH */
717 { PCI_VDEVICE(INTEL, 0x0f1c), LPC_BAYTRAIL},
718 { PCI_VDEVICE(INTEL, 0x19dc), LPC_DNV},
719 { PCI_VDEVICE(INTEL, 0x1c41), LPC_CPT},
720 { PCI_VDEVICE(INTEL, 0x1c42), LPC_CPTD},
721 { PCI_VDEVICE(INTEL, 0x1c43), LPC_CPTM},
722 { PCI_VDEVICE(INTEL, 0x1c44), LPC_CPT},
723 { PCI_VDEVICE(INTEL, 0x1c45), LPC_CPT},
724 { PCI_VDEVICE(INTEL, 0x1c46), LPC_CPT},
725 { PCI_VDEVICE(INTEL, 0x1c47), LPC_CPT},
726 { PCI_VDEVICE(INTEL, 0x1c48), LPC_CPT},
727 { PCI_VDEVICE(INTEL, 0x1c49), LPC_CPT},
728 { PCI_VDEVICE(INTEL, 0x1c4a), LPC_CPT},
729 { PCI_VDEVICE(INTEL, 0x1c4b), LPC_CPT},
730 { PCI_VDEVICE(INTEL, 0x1c4c), LPC_CPT},
731 { PCI_VDEVICE(INTEL, 0x1c4d), LPC_CPT},
732 { PCI_VDEVICE(INTEL, 0x1c4e), LPC_CPT},
733 { PCI_VDEVICE(INTEL, 0x1c4f), LPC_CPT},
734 { PCI_VDEVICE(INTEL, 0x1c50), LPC_CPT},
735 { PCI_VDEVICE(INTEL, 0x1c51), LPC_CPT},
736 { PCI_VDEVICE(INTEL, 0x1c52), LPC_CPT},
737 { PCI_VDEVICE(INTEL, 0x1c53), LPC_CPT},
738 { PCI_VDEVICE(INTEL, 0x1c54), LPC_CPT},
739 { PCI_VDEVICE(INTEL, 0x1c55), LPC_CPT},
740 { PCI_VDEVICE(INTEL, 0x1c56), LPC_CPT},
741 { PCI_VDEVICE(INTEL, 0x1c57), LPC_CPT},
742 { PCI_VDEVICE(INTEL, 0x1c58), LPC_CPT},
743 { PCI_VDEVICE(INTEL, 0x1c59), LPC_CPT},
744 { PCI_VDEVICE(INTEL, 0x1c5a), LPC_CPT},
745 { PCI_VDEVICE(INTEL, 0x1c5b), LPC_CPT},
746 { PCI_VDEVICE(INTEL, 0x1c5c), LPC_CPT},
747 { PCI_VDEVICE(INTEL, 0x1c5d), LPC_CPT},
748 { PCI_VDEVICE(INTEL, 0x1c5e), LPC_CPT},
749 { PCI_VDEVICE(INTEL, 0x1c5f), LPC_CPT},
750 { PCI_VDEVICE(INTEL, 0x1d40), LPC_PBG},
751 { PCI_VDEVICE(INTEL, 0x1d41), LPC_PBG},
752 { PCI_VDEVICE(INTEL, 0x1e40), LPC_PPT},
753 { PCI_VDEVICE(INTEL, 0x1e41), LPC_PPT},
754 { PCI_VDEVICE(INTEL, 0x1e42), LPC_PPT},
755 { PCI_VDEVICE(INTEL, 0x1e43), LPC_PPT},
756 { PCI_VDEVICE(INTEL, 0x1e44), LPC_PPT},
757 { PCI_VDEVICE(INTEL, 0x1e45), LPC_PPT},
758 { PCI_VDEVICE(INTEL, 0x1e46), LPC_PPT},
759 { PCI_VDEVICE(INTEL, 0x1e47), LPC_PPT},
760 { PCI_VDEVICE(INTEL, 0x1e48), LPC_PPT},
761 { PCI_VDEVICE(INTEL, 0x1e49), LPC_PPT},
762 { PCI_VDEVICE(INTEL, 0x1e4a), LPC_PPT},
763 { PCI_VDEVICE(INTEL, 0x1e4b), LPC_PPT},
764 { PCI_VDEVICE(INTEL, 0x1e4c), LPC_PPT},
765 { PCI_VDEVICE(INTEL, 0x1e4d), LPC_PPT},
766 { PCI_VDEVICE(INTEL, 0x1e4e), LPC_PPT},
767 { PCI_VDEVICE(INTEL, 0x1e4f), LPC_PPT},
768 { PCI_VDEVICE(INTEL, 0x1e50), LPC_PPT},
769 { PCI_VDEVICE(INTEL, 0x1e51), LPC_PPT},
770 { PCI_VDEVICE(INTEL, 0x1e52), LPC_PPT},
771 { PCI_VDEVICE(INTEL, 0x1e53), LPC_PPT},
772 { PCI_VDEVICE(INTEL, 0x1e54), LPC_PPT},
773 { PCI_VDEVICE(INTEL, 0x1e55), LPC_PPT},
774 { PCI_VDEVICE(INTEL, 0x1e56), LPC_PPT},
775 { PCI_VDEVICE(INTEL, 0x1e57), LPC_PPT},
776 { PCI_VDEVICE(INTEL, 0x1e58), LPC_PPT},
777 { PCI_VDEVICE(INTEL, 0x1e59), LPC_PPT},
778 { PCI_VDEVICE(INTEL, 0x1e5a), LPC_PPT},
779 { PCI_VDEVICE(INTEL, 0x1e5b), LPC_PPT},
780 { PCI_VDEVICE(INTEL, 0x1e5c), LPC_PPT},
781 { PCI_VDEVICE(INTEL, 0x1e5d), LPC_PPT},
782 { PCI_VDEVICE(INTEL, 0x1e5e), LPC_PPT},
783 { PCI_VDEVICE(INTEL, 0x1e5f), LPC_PPT},
784 { PCI_VDEVICE(INTEL, 0x1f38), LPC_AVN},
785 { PCI_VDEVICE(INTEL, 0x1f39), LPC_AVN},
786 { PCI_VDEVICE(INTEL, 0x1f3a), LPC_AVN},
787 { PCI_VDEVICE(INTEL, 0x1f3b), LPC_AVN},
788 { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL},
789 { PCI_VDEVICE(INTEL, 0x2310), LPC_DH89XXCC},
790 { PCI_VDEVICE(INTEL, 0x2390), LPC_COLETO},
791 { PCI_VDEVICE(INTEL, 0x2410), LPC_ICH},
792 { PCI_VDEVICE(INTEL, 0x2420), LPC_ICH0},
793 { PCI_VDEVICE(INTEL, 0x2440), LPC_ICH2},
794 { PCI_VDEVICE(INTEL, 0x244c), LPC_ICH2M},
795 { PCI_VDEVICE(INTEL, 0x2450), LPC_CICH},
796 { PCI_VDEVICE(INTEL, 0x2480), LPC_ICH3},
797 { PCI_VDEVICE(INTEL, 0x248c), LPC_ICH3M},
798 { PCI_VDEVICE(INTEL, 0x24c0), LPC_ICH4},
799 { PCI_VDEVICE(INTEL, 0x24cc), LPC_ICH4M},
800 { PCI_VDEVICE(INTEL, 0x24d0), LPC_ICH5},
801 { PCI_VDEVICE(INTEL, 0x25a1), LPC_6300ESB},
802 { PCI_VDEVICE(INTEL, 0x2640), LPC_ICH6},
803 { PCI_VDEVICE(INTEL, 0x2641), LPC_ICH6M},
804 { PCI_VDEVICE(INTEL, 0x2642), LPC_ICH6W},
805 { PCI_VDEVICE(INTEL, 0x2670), LPC_631XESB},
806 { PCI_VDEVICE(INTEL, 0x2671), LPC_631XESB},
807 { PCI_VDEVICE(INTEL, 0x2672), LPC_631XESB},
808 { PCI_VDEVICE(INTEL, 0x2673), LPC_631XESB},
809 { PCI_VDEVICE(INTEL, 0x2674), LPC_631XESB},
810 { PCI_VDEVICE(INTEL, 0x2675), LPC_631XESB},
811 { PCI_VDEVICE(INTEL, 0x2676), LPC_631XESB},
812 { PCI_VDEVICE(INTEL, 0x2677), LPC_631XESB},
813 { PCI_VDEVICE(INTEL, 0x2678), LPC_631XESB},
814 { PCI_VDEVICE(INTEL, 0x2679), LPC_631XESB},
815 { PCI_VDEVICE(INTEL, 0x267a), LPC_631XESB},
816 { PCI_VDEVICE(INTEL, 0x267b), LPC_631XESB},
817 { PCI_VDEVICE(INTEL, 0x267c), LPC_631XESB},
818 { PCI_VDEVICE(INTEL, 0x267d), LPC_631XESB},
819 { PCI_VDEVICE(INTEL, 0x267e), LPC_631XESB},
820 { PCI_VDEVICE(INTEL, 0x267f), LPC_631XESB},
821 { PCI_VDEVICE(INTEL, 0x27b0), LPC_ICH7DH},
822 { PCI_VDEVICE(INTEL, 0x27b8), LPC_ICH7},
823 { PCI_VDEVICE(INTEL, 0x27b9), LPC_ICH7M},
824 { PCI_VDEVICE(INTEL, 0x27bc), LPC_NM10},
825 { PCI_VDEVICE(INTEL, 0x27bd), LPC_ICH7MDH},
826 { PCI_VDEVICE(INTEL, 0x2810), LPC_ICH8},
827 { PCI_VDEVICE(INTEL, 0x2811), LPC_ICH8ME},
828 { PCI_VDEVICE(INTEL, 0x2812), LPC_ICH8DH},
829 { PCI_VDEVICE(INTEL, 0x2814), LPC_ICH8DO},
830 { PCI_VDEVICE(INTEL, 0x2815), LPC_ICH8M},
831 { PCI_VDEVICE(INTEL, 0x2912), LPC_ICH9DH},
832 { PCI_VDEVICE(INTEL, 0x2914), LPC_ICH9DO},
833 { PCI_VDEVICE(INTEL, 0x2916), LPC_ICH9R},
834 { PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME},
835 { PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9},
836 { PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M},
837 { PCI_VDEVICE(INTEL, 0x3197), LPC_GLK},
838 { PCI_VDEVICE(INTEL, 0x2b9c), LPC_COUGARMOUNTAIN},
839 { PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO},
840 { PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R},
841 { PCI_VDEVICE(INTEL, 0x3a18), LPC_ICH10},
842 { PCI_VDEVICE(INTEL, 0x3a1a), LPC_ICH10D},
843 { PCI_VDEVICE(INTEL, 0x3b00), LPC_PCH},
844 { PCI_VDEVICE(INTEL, 0x3b01), LPC_PCHM},
845 { PCI_VDEVICE(INTEL, 0x3b02), LPC_P55},
846 { PCI_VDEVICE(INTEL, 0x3b03), LPC_PM55},
847 { PCI_VDEVICE(INTEL, 0x3b06), LPC_H55},
848 { PCI_VDEVICE(INTEL, 0x3b07), LPC_QM57},
849 { PCI_VDEVICE(INTEL, 0x3b08), LPC_H57},
850 { PCI_VDEVICE(INTEL, 0x3b09), LPC_HM55},
851 { PCI_VDEVICE(INTEL, 0x3b0a), LPC_Q57},
852 { PCI_VDEVICE(INTEL, 0x3b0b), LPC_HM57},
853 { PCI_VDEVICE(INTEL, 0x3b0d), LPC_PCHMSFF},
854 { PCI_VDEVICE(INTEL, 0x3b0f), LPC_QS57},
855 { PCI_VDEVICE(INTEL, 0x3b12), LPC_3400},
856 { PCI_VDEVICE(INTEL, 0x3b14), LPC_3420},
857 { PCI_VDEVICE(INTEL, 0x3b16), LPC_3450},
858 { PCI_VDEVICE(INTEL, 0x5031), LPC_EP80579},
859 { PCI_VDEVICE(INTEL, 0x5ae8), LPC_APL},
860 { PCI_VDEVICE(INTEL, 0x8c40), LPC_LPT},
861 { PCI_VDEVICE(INTEL, 0x8c41), LPC_LPT},
862 { PCI_VDEVICE(INTEL, 0x8c42), LPC_LPT},
863 { PCI_VDEVICE(INTEL, 0x8c43), LPC_LPT},
864 { PCI_VDEVICE(INTEL, 0x8c44), LPC_LPT},
865 { PCI_VDEVICE(INTEL, 0x8c45), LPC_LPT},
866 { PCI_VDEVICE(INTEL, 0x8c46), LPC_LPT},
867 { PCI_VDEVICE(INTEL, 0x8c47), LPC_LPT},
868 { PCI_VDEVICE(INTEL, 0x8c48), LPC_LPT},
869 { PCI_VDEVICE(INTEL, 0x8c49), LPC_LPT},
870 { PCI_VDEVICE(INTEL, 0x8c4a), LPC_LPT},
871 { PCI_VDEVICE(INTEL, 0x8c4b), LPC_LPT},
872 { PCI_VDEVICE(INTEL, 0x8c4c), LPC_LPT},
873 { PCI_VDEVICE(INTEL, 0x8c4d), LPC_LPT},
874 { PCI_VDEVICE(INTEL, 0x8c4e), LPC_LPT},
875 { PCI_VDEVICE(INTEL, 0x8c4f), LPC_LPT},
876 { PCI_VDEVICE(INTEL, 0x8c50), LPC_LPT},
877 { PCI_VDEVICE(INTEL, 0x8c51), LPC_LPT},
878 { PCI_VDEVICE(INTEL, 0x8c52), LPC_LPT},
879 { PCI_VDEVICE(INTEL, 0x8c53), LPC_LPT},
880 { PCI_VDEVICE(INTEL, 0x8c54), LPC_LPT},
881 { PCI_VDEVICE(INTEL, 0x8c55), LPC_LPT},
882 { PCI_VDEVICE(INTEL, 0x8c56), LPC_LPT},
883 { PCI_VDEVICE(INTEL, 0x8c57), LPC_LPT},
884 { PCI_VDEVICE(INTEL, 0x8c58), LPC_LPT},
885 { PCI_VDEVICE(INTEL, 0x8c59), LPC_LPT},
886 { PCI_VDEVICE(INTEL, 0x8c5a), LPC_LPT},
887 { PCI_VDEVICE(INTEL, 0x8c5b), LPC_LPT},
888 { PCI_VDEVICE(INTEL, 0x8c5c), LPC_LPT},
889 { PCI_VDEVICE(INTEL, 0x8c5d), LPC_LPT},
890 { PCI_VDEVICE(INTEL, 0x8c5e), LPC_LPT},
891 { PCI_VDEVICE(INTEL, 0x8c5f), LPC_LPT},
892 { PCI_VDEVICE(INTEL, 0x8cc1), LPC_9S},
893 { PCI_VDEVICE(INTEL, 0x8cc2), LPC_9S},
894 { PCI_VDEVICE(INTEL, 0x8cc3), LPC_9S},
895 { PCI_VDEVICE(INTEL, 0x8cc4), LPC_9S},
896 { PCI_VDEVICE(INTEL, 0x8cc6), LPC_9S},
897 { PCI_VDEVICE(INTEL, 0x8d40), LPC_WBG},
898 { PCI_VDEVICE(INTEL, 0x8d41), LPC_WBG},
899 { PCI_VDEVICE(INTEL, 0x8d42), LPC_WBG},
900 { PCI_VDEVICE(INTEL, 0x8d43), LPC_WBG},
901 { PCI_VDEVICE(INTEL, 0x8d44), LPC_WBG},
902 { PCI_VDEVICE(INTEL, 0x8d45), LPC_WBG},
903 { PCI_VDEVICE(INTEL, 0x8d46), LPC_WBG},
904 { PCI_VDEVICE(INTEL, 0x8d47), LPC_WBG},
905 { PCI_VDEVICE(INTEL, 0x8d48), LPC_WBG},
906 { PCI_VDEVICE(INTEL, 0x8d49), LPC_WBG},
907 { PCI_VDEVICE(INTEL, 0x8d4a), LPC_WBG},
908 { PCI_VDEVICE(INTEL, 0x8d4b), LPC_WBG},
909 { PCI_VDEVICE(INTEL, 0x8d4c), LPC_WBG},
910 { PCI_VDEVICE(INTEL, 0x8d4d), LPC_WBG},
911 { PCI_VDEVICE(INTEL, 0x8d4e), LPC_WBG},
912 { PCI_VDEVICE(INTEL, 0x8d4f), LPC_WBG},
913 { PCI_VDEVICE(INTEL, 0x8d50), LPC_WBG},
914 { PCI_VDEVICE(INTEL, 0x8d51), LPC_WBG},
915 { PCI_VDEVICE(INTEL, 0x8d52), LPC_WBG},
916 { PCI_VDEVICE(INTEL, 0x8d53), LPC_WBG},
917 { PCI_VDEVICE(INTEL, 0x8d54), LPC_WBG},
918 { PCI_VDEVICE(INTEL, 0x8d55), LPC_WBG},
919 { PCI_VDEVICE(INTEL, 0x8d56), LPC_WBG},
920 { PCI_VDEVICE(INTEL, 0x8d57), LPC_WBG},
921 { PCI_VDEVICE(INTEL, 0x8d58), LPC_WBG},
922 { PCI_VDEVICE(INTEL, 0x8d59), LPC_WBG},
923 { PCI_VDEVICE(INTEL, 0x8d5a), LPC_WBG},
924 { PCI_VDEVICE(INTEL, 0x8d5b), LPC_WBG},
925 { PCI_VDEVICE(INTEL, 0x8d5c), LPC_WBG},
926 { PCI_VDEVICE(INTEL, 0x8d5d), LPC_WBG},
927 { PCI_VDEVICE(INTEL, 0x8d5e), LPC_WBG},
928 { PCI_VDEVICE(INTEL, 0x8d5f), LPC_WBG},
929 { PCI_VDEVICE(INTEL, 0x9c40), LPC_LPT_LP},
930 { PCI_VDEVICE(INTEL, 0x9c41), LPC_LPT_LP},
931 { PCI_VDEVICE(INTEL, 0x9c42), LPC_LPT_LP},
932 { PCI_VDEVICE(INTEL, 0x9c43), LPC_LPT_LP},
933 { PCI_VDEVICE(INTEL, 0x9c44), LPC_LPT_LP},
934 { PCI_VDEVICE(INTEL, 0x9c45), LPC_LPT_LP},
935 { PCI_VDEVICE(INTEL, 0x9c46), LPC_LPT_LP},
936 { PCI_VDEVICE(INTEL, 0x9c47), LPC_LPT_LP},
937 { PCI_VDEVICE(INTEL, 0x9cc1), LPC_WPT_LP},
938 { PCI_VDEVICE(INTEL, 0x9cc2), LPC_WPT_LP},
939 { PCI_VDEVICE(INTEL, 0x9cc3), LPC_WPT_LP},
940 { PCI_VDEVICE(INTEL, 0x9cc5), LPC_WPT_LP},
941 { PCI_VDEVICE(INTEL, 0x9cc6), LPC_WPT_LP},
942 { PCI_VDEVICE(INTEL, 0x9cc7), LPC_WPT_LP},
943 { PCI_VDEVICE(INTEL, 0x9cc9), LPC_WPT_LP},
944 { PCI_VDEVICE(INTEL, 0xa1c1), LPC_LEWISBURG},
945 { PCI_VDEVICE(INTEL, 0xa1c2), LPC_LEWISBURG},
946 { PCI_VDEVICE(INTEL, 0xa1c3), LPC_LEWISBURG},
947 { PCI_VDEVICE(INTEL, 0xa1c4), LPC_LEWISBURG},
948 { PCI_VDEVICE(INTEL, 0xa1c5), LPC_LEWISBURG},
949 { PCI_VDEVICE(INTEL, 0xa1c6), LPC_LEWISBURG},
950 { PCI_VDEVICE(INTEL, 0xa1c7), LPC_LEWISBURG},
951 { PCI_VDEVICE(INTEL, 0xa242), LPC_LEWISBURG},
952 { PCI_VDEVICE(INTEL, 0xa243), LPC_LEWISBURG},
953 { 0, }, /* End of list */
961 if (priv->abase_save >= 0) { in lpc_ich_restore_config_space()
966 if (priv->actrl_pbase_save >= 0) { in lpc_ich_restore_config_space()
972 if (priv->gctrl_save >= 0) { in lpc_ich_restore_config_space()
990 pci_write_config_byte(dev, priv->abase, reg_save | 0x2); in lpc_ich_enable_acpi_space()
999 pci_write_config_byte(dev, priv->actrl_pbase, reg_save | 0x80); in lpc_ich_enable_acpi_space()
1011 pci_write_config_byte(dev, priv->gctrl, reg_save | 0x10); in lpc_ich_enable_gpio_space()
1021 pci_write_config_byte(dev, priv->actrl_pbase, reg_save | 0x2); in lpc_ich_enable_pmc_space()
1044 return 0; in lpc_ich_finalize_wdt_cell()
1064 u8 use_gpio = 0; in lpc_ich_check_conflict_gpio()
1066 if (resource_size(res) >= 0x50 && in lpc_ich_check_conflict_gpio()
1067 !acpi_check_region(res->start + 0x40, 0x10, "LPC ICH GPIO3")) in lpc_ich_check_conflict_gpio()
1070 if (!acpi_check_region(res->start + 0x30, 0x10, "LPC ICH GPIO2")) in lpc_ich_check_conflict_gpio()
1073 ret = acpi_check_region(res->start + 0x00, 0x30, "LPC ICH GPIO1"); in lpc_ich_check_conflict_gpio()
1075 use_gpio |= 1 << 0; in lpc_ich_check_conflict_gpio()
1091 base_addr = base_addr_cfg & 0x0000ff80; in lpc_ich_init_gpio()
1117 base_addr = base_addr_cfg & 0x0000ff80; in lpc_ich_init_gpio()
1138 if (ret < 0) { in lpc_ich_init_gpio()
1148 &lpc_ich_gpio_cell, 1, NULL, 0, NULL); in lpc_ich_init_gpio()
1171 base_addr = base_addr_cfg & 0x0000ff80; in lpc_ich_init_wdt()
1191 * we have to read RCBA from PCI Config space 0xf0 and use in lpc_ich_init_wdt()
1192 * it as base. GCS = RCBA + ICH6_GCS(0x3410). in lpc_ich_init_wdt()
1197 * the register at offset 0x8. in lpc_ich_init_wdt()
1204 base_addr = base_addr_cfg & 0xffffc000; in lpc_ich_init_wdt()
1217 base_addr = base_addr_cfg & 0xfffffe00; in lpc_ich_init_wdt()
1229 &lpc_ich_wdt_cell, 1, NULL, 0, NULL); in lpc_ich_init_wdt()
1247 ret = p2sb_bar(dev->bus, 0, &base); in lpc_ich_init_pinctrl()
1251 for (i = 0; i < info->nr_resources; i++) { in lpc_ich_init_pinctrl()
1261 return mfd_add_devices(&dev->dev, 0, info->devices, info->nr_devices, in lpc_ich_init_pinctrl()
1262 NULL, 0, NULL); in lpc_ich_init_pinctrl()
1310 struct resource *res = &intel_spi_res[0]; in lpc_ich_init_spi()
1369 &lpc_ich_spi_cell, 1, NULL, 0, NULL); in lpc_ich_init_spi()
1437 return 0; in lpc_ich_probe()